JPS63220558A - Method of mounting and wiring terminal resistance for high-density integrated element - Google Patents
Method of mounting and wiring terminal resistance for high-density integrated elementInfo
- Publication number
- JPS63220558A JPS63220558A JP5474787A JP5474787A JPS63220558A JP S63220558 A JPS63220558 A JP S63220558A JP 5474787 A JP5474787 A JP 5474787A JP 5474787 A JP5474787 A JP 5474787A JP S63220558 A JPS63220558 A JP S63220558A
- Authority
- JP
- Japan
- Prior art keywords
- mounting
- board
- signal
- connection pad
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 24
- 230000008054 signal transmission Effects 0.000 claims abstract description 21
- 238000012986 modification Methods 0.000 claims abstract description 20
- 230000004048 modification Effects 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 4
- 239000010408 film Substances 0.000 claims description 2
- 239000010409 thin film Substances 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 abstract description 4
- 230000000694 effects Effects 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 101100108457 Arabidopsis thaliana AIL5 gene Proteins 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 210000003127 knee Anatomy 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
高密度集積素子を実装した接続パッドの内信号用パッド
と裏面に配設した終端抵抗をＶｉＡで接続して、その周
囲に配設した改造用パターンと信号伝送用ＶｉＡを接続
パッドに接続し、その専用基板の信号伝送用ＶｉＡをプ
リント配線基板の信号用のＶｉＡとを結合して信号伝送
路を形成し、電源用のＶｉＡとプリント配線基板の電源
用Ｖ１Ａを結合して電源供給回路を形成する方法の高速
信号伝送に適した高密度実装。 。[Detailed Description of the Invention] [Summary] The signal pad of the connection pad on which a high-density integrated element is mounted and the terminating resistor arranged on the back side are connected by ViA, and the modification pattern and signal arranged around it are connected. Connect the transmission ViA to the connection pad, and connect the signal transmission ViA of the dedicated board to the signal ViA of the printed wiring board to form a signal transmission path, and connect the power supply ViA and the printed wiring board power supply. High-density mounting suitable for high-speed signal transmission by combining V1A to form a power supply circuit. .
本発明は各種電子機器の構成に広く使用されるプリント
板の実装方法に関するものである。The present invention relates to a printed board mounting method widely used in the construction of various electronic devices.
多数の高密度集積素子（以下ＬＳＩと略す）を実装する
プリント配線基板は、設計変更等の信号配線接続に対処
するために改造用のパターンが設けられており、高速信
号を伝送するために終端抵抗を設けて信号の反射が生じ
ないようにすることが一般的に行われている。Printed wiring boards on which a large number of high-density integrated devices (hereinafter referred to as LSI) are mounted are provided with patterns for modification in order to cope with signal wiring connections due to design changes, etc., and termination patterns are provided to transmit high-speed signals. It is common practice to provide a resistor to prevent signal reflection.
最近、特にＬＳＩの性能向上が著しく集積度の向上につ
れて信号端子数は増加すると共に、速度の向上につれて
各端子間の信号伝送の高速化が必要となっている。その
ため改造パターン、及び終端抵抗が高密度に配設でき、
且つ信号の高速伝送に適した高密度集積素子用終端抵抗
の実装、配線方法が要求されている。Recently, the performance of LSI has been significantly improved, and as the degree of integration has improved, the number of signal terminals has increased, and as the speed has improved, it has become necessary to increase the speed of signal transmission between each terminal. Therefore, modified patterns and terminating resistors can be arranged in high density.
Additionally, there is a need for a method for mounting and wiring a terminating resistor for high-density integrated devices that is suitable for high-speed signal transmission.
〔従来の技術〕
従来広く使用されている高密度集積素子用終端抵抗の実
装、配線方法は、第４図（ａ）示すように信号層と電源
層を内層したプリント配線基板１１の主面に、入出力端
子の接続パッド１１−３をＬＳ１１３の実装する周囲に
設けて、その外側に改造用パターン１１−４と終端抵抗
１４を配設し、信号伝送回路は信号層と接続したＶ １
ＡＩＬ５から配線１１−６により改造用パターン１１−
４に接続され、その改造用パターン１１−４から分岐さ
せた一方の配線１１−７を接続パッド１１−３に接続し
、他方の配線１１−８を終端抵抗１４に接続した前記プ
リント配線基板１１に、フラットパッケージの入出力端
子１３−１を前記接続パッド１１−３に溶着してＬＳ１
１３を実装している。[Prior Art] As shown in FIG. 4(a), the mounting and wiring method of a termination resistor for high-density integrated devices, which has been widely used in the past, is to mount and wire a terminal resistor on the main surface of a printed wiring board 11 having a signal layer and a power supply layer as inner layers. , an input/output terminal connection pad 11-3 is provided around the LS 113, a modification pattern 11-4 and a terminating resistor 14 are provided on the outside thereof, and the signal transmission circuit is connected to the signal layer V1.
Modification pattern 11- by wiring 11-6 from AIL5
4, one wiring 11-7 branched from the modification pattern 11-4 is connected to the connection pad 11-3, and the other wiring 11-8 is connected to the terminating resistor 14. Then, the input/output terminal 13-1 of the flat package is welded to the connection pad 11-3, and the LS1
13 is implemented.
又、（ｂ）図に示すように実装しようとするＬＳ１１３
の入出力端子と対向する位置に接続パッド２１−３を形
成して、上記と同じように改造用パターン２１−４と終
端抵抗２４をＬＳ１１３の実装領域外に設けてそれぞれ
を配線２１−６．２１−７．２１−８により接続し、そ
のプリント配線基板２１に端子がアレイ状のＬＳＩ
１３を実装する方法がある。In addition, (b) LS113 to be implemented as shown in the figure
A connection pad 21-3 is formed at a position facing the input/output terminal of the LS 113, and a modification pattern 21-4 and a terminating resistor 24 are provided outside the mounting area of the LS 113 in the same manner as described above, and each is connected to the wiring 21-6. 21-7.21-8, and the printed wiring board 21 has an array of terminals.
There is a way to implement 13.
更に、分岐配線をなくす方法として、第５図＋ａ）に示
すようにそれぞれの改造用パターン３１−４と終端抵抗
３４を、接続パッド３１−３から配線３１−７と３１−
８により接続方法と、ｆｂ１図に示すようにＬＳ１１３
の実装領域内に接続パッド４１−３と終端抵抗３４とを
配設して、配線４１−７と４１−８とによりそれぞれを
直列に接続する方法と、（０１図に示すように主面に設
けたそれぞれ接続パッド５１−３の裏面に終端抵抗５４
を配設し、接続パッド５１−３と終端抵抗４４をＶｉＡ
５１−３にて接続したプリント配線基板５１に、ＬＳ１
１３を実装する他の従来例がある。Furthermore, as a method of eliminating branch wiring, as shown in FIG.
8 shows the connection method and LS113 as shown in fb1 diagram.
There is a method of arranging a connection pad 41-3 and a terminating resistor 34 in the mounting area of , and connecting them in series with wiring 41-7 and 41-8, A terminating resistor 54 is installed on the back surface of each connecting pad 51-3 provided.
The connecting pad 51-3 and the terminating resistor 44 are connected to ViA.
LS1 is connected to the printed wiring board 51 connected at 51-3.
There are other conventional examples implementing 13.
上記説明した従来の高密度集積素子用終端抵抗の実装、
配線方法で問題となるのは、第４１１９（ａＬ及び山）
の方法はＬＳＩの入出力端子数が多くなると改造用パタ
ーンの配設領域は増大し、且つ改造用パターンと信号端
子を接続する信号配線が長くなって、分岐配線による反
射が生じることにより波形が乱れ高速伝送が不可能とな
る点である。Implementation of the conventional termination resistor for high-density integrated devices as explained above,
The problem with the wiring method is No. 4119 (aL and mountain)
In this method, as the number of LSI input/output terminals increases, the installation area for the modification pattern increases, and the signal wiring that connects the modification pattern and the signal terminal becomes longer, causing reflections from branch wiring and waveforms to deteriorate. This is the point where high-speed transmission becomes impossible.
又、第５図（ａ）の方法は、改造用パターン５及び終端
抵抗と接続パッドとを接続するために２本の配線が必要
となり、入出力端子数が多くなると実装配線が困難とな
る欠点があり、（ｂ）図の方法は、ＬＳＩの実装領域内
に終端抵抗を配設しているため、接続パッド数が多くな
るとその終端抵抗間に他の接続用の配線ができなくなる
欠点がある。In addition, the method shown in FIG. 5(a) requires two wires to connect the modification pattern 5, the terminating resistor, and the connection pad, and has the disadvantage that mounting wiring becomes difficult when the number of input/output terminals increases. The method shown in Figure (b) has the disadvantage that the termination resistor is placed within the LSI mounting area, so if the number of connection pads increases, it becomes impossible to wire for other connections between the termination resistors. .
更に、（Ｃ）図の方法は、接続パッドと終端抵抗を接続
するＶｉＡがプリント配線基板を貫通する配線であるた
め、内層の他の信号配線と特性インピーダンスを一致さ
せることが困難であり、且つ裏面に終端抵抗５４を配設
しているのでプリント配線基板の両面にＬＳＩを実装さ
せることが不可能となる点である。Furthermore, in the method shown in Figure (C), since the ViA connecting the connection pad and the termination resistor is a wiring that passes through the printed wiring board, it is difficult to match the characteristic impedance with other signal wiring on the inner layer. Since the terminating resistor 54 is provided on the back side, it is impossible to mount LSI on both sides of the printed wiring board.
本発明は以上のような状況から信号の高速伝送が可能で
あり且つ、ＬＳＩを高密度実装が行える新しい高密度集
積素子用終端抵抗用実装、配線方法の提供を目ｊ＋、
−１−１″子、・）である。The present invention aims to provide a new mounting and wiring method for terminating resistors for high-density integrated elements, which enables high-speed signal transmission and high-density mounting of LSIs.
−1−1″ child, ·).
上記問題点は第１図に示すように、主面側にエフＳ１１
．３を実装する接続バッド１２１を配設して信号用の接
続パット′１２１にＶ ｉ Ａ１２３−２を、電源用の
接続パッド１２１はＶ ｉ Ａｌ２３−３を形成し、実
装領域外に改造用パターン１２２とその近傍にＶｉＡ１
２３−１を設けて配線１２４−１ 、１２４−２により
改造用パターン１２２．接続パッド１２１ とを接続し
た薄い板厚の専用基板１２０と、主面より内層の信号層
１１１．及び電源層１１２と接続するＶ ｉ Ａ１１３
−１．及び１１３−２を形成したプリント配線基板１１
０とで構成し、Ｌ Ｓｌ １３を実装した上記専用基
板１２０の裏面に終端抵抗１４０を配設してＶ ｉ Ａ
１２３−２と接続し、上記プリント配線基板１１０の信
号用Ｖ ｉ Ａ１１３−１と専用基板１２０のＶ ｉ
Ａ１２３−１を結合して、更にプリント配線基板１１０
の電源用Ｖ ｉ Ａ１１３−２と専用基板１２０のＶ
ｉ Ａ１２３−３を結合して保持する本発明の高密度集
積素子用終端抵抗の実装、配線方法により解決される。As shown in Figure 1, the above problem is caused by the F-S11 on the main surface side.
．． A connection pad 121 for mounting 3 is arranged, a V i A123-2 is formed on the signal connection pad '121, a V i A123-3 is formed on the power supply connection pad 121, and a modification pattern is formed outside the mounting area. 122 and ViA1 near it
23-1 is provided, and the modification pattern 122. A thin dedicated board 120 connected to a connection pad 121 and a signal layer 111 . and V i A 113 connected to the power supply layer 112
-1. and printed wiring board 11 formed with 113-2.
0, and a terminating resistor 140 is arranged on the back surface of the dedicated board 120 on which the L Sl 13 is mounted.
123-2, and the signal Vi A113-1 of the printed wiring board 110 and the Vi of the dedicated board 120.
A123-1 is combined and further printed wiring board 110
V i A113-2 for power supply and V of dedicated board 120
The problem is solved by the method of mounting and wiring a termination resistor for a high-density integrated device according to the present invention, which combines and holds i A123-3.
本発明においては、専用基板１２０のＶ ｉ Ａ１２３
−１とプリント配線基板１１０のＶ ｉ Ａ１１３〜１
を半田バンプ１５２で結合することにより、Ｖ ｉ Ａ
ｌ２３−１と配線１２４−Ｌ １２４−２で信号層１１
１から改造用パターン１２２を経由して信号用接続バッ
ド１２１に信号伝送回路が形成され、又、専用基板１２
０のＶｉＡ１２３−３とプリント配線基板１１０のＶ
ｉ Ａ１１３−２を結合すると、電源層１１２と電源用
接続バッド１２１の間に電源供給回路が形成される。In the present invention, the V i A 123 of the dedicated board 120
-1 and V i A113-1 of the printed wiring board 110
By connecting them with solder bumps 152, V i A
Signal layer 11 with l23-1 and wiring 124-L 124-2
1, a signal transmission circuit is formed on the signal connection pad 121 via the modification pattern 122, and the dedicated board 12
0 ViA123-3 and printed wiring board 110 V
When iA113-2 is combined, a power supply circuit is formed between the power supply layer 112 and the power supply connection pad 121.
そのため、信号伝送回路は配線１２４〜１，１２４−２
が直列となって接続パッド１２１に対してそれぞれ１木
となり、終端抵抗】４０は裏面に実装されるので高密度
の実装、配線が可能となる。又、専用基板１２０の板厚
はＬＳＩｌ３を実装する機械的強度を有すれば良いので
薄くすることができ、従って■ｉ Ａ １２３−Ｌ １
２３−２は非常に短く、信号伝送回路は分岐配線の存在
なしに改造用パターン１２２．接続バッド１２１Ｊ端抵
抗１４０に最短距離で接続されるので信号の高速伝送が
可能となる。Therefore, the signal transmission circuit is wired 124 to 1,124-2.
are connected in series to form one tree for each connection pad 121, and the terminating resistor [40] is mounted on the back surface, enabling high-density mounting and wiring. In addition, the thickness of the dedicated board 120 can be made thin as long as it has the mechanical strength to mount the LSI13, so ■i A 123-L 1
23-2 is very short, and the signal transmission circuit can be modified into the modification pattern 122.2 without the presence of branch wiring. Since the connecting pad 121J is connected to the resistor 140 at the shortest distance, high-speed signal transmission is possible.
更に、改造用パターン１２２はＬＳＩｌ３の実装領域外
に設けられておるのでＬＳＩｌ３を取り外すことなく改
造ができると共に、プリン）・配線基板１１０の両面に
専用基板１２０を設けることができてＬＳＩｌ３を両面
に実装することも可能となる。Furthermore, since the modification pattern 122 is provided outside the mounting area of the LSI 3, it is possible to modify the LSI 3 without removing it, and the dedicated board 120 can be provided on both sides of the printed wiring board 110, allowing the LSI 3 to be mounted on both sides. It is also possible to implement it.
以下第１図〜第３図について本発明の詳細な説明する。 The present invention will be described in detail below with reference to FIGS. 1 to 3.
第１図は本実施例による高密度集積素子用終端抵抗の実
装、配線方法を斜視図で示し、図中において第４図と同
一部材には同一記号が付しであるが、その他の１１０は
各種電子部品を実装して回路を構成するプリント配線基
板、１２０は高密度集積素子を搭載する専用基板、１４
０ば高速信号を伝送するだめの終端抵抗である。FIG. 1 is a perspective view showing the mounting and wiring method of a terminating resistor for a high-density integrated device according to this embodiment. In the figure, the same members as in FIG. 4 are given the same symbols, and the other 110 A printed wiring board on which various electronic components are mounted to form a circuit, 120 is a dedicated board on which high-density integrated elements are mounted, 14
0 is a terminating resistor for transmitting high-speed signals.
プリント配線基板１１０は、積層した内部の信号層１１
１と接続した信号伝送用のＶ ｉ Ａ１１３−１と、電
源層１１２と接続した電源供給用のＶ ｉ Ａ１１３−
２を主面より形成した多層プリント基板である。The printed wiring board 110 has a stacked internal signal layer 11.
1 for signal transmission connected to V i A113-1 for signal transmission, and V i A113-1 for power supply connected to power supply layer 112.
This is a multilayer printed circuit board with 2 formed from the main surface.
専用基板１２０は、機械的強度を有し、配設する終端抵
抗１４０の発熱を効率良く冷却できる熱伝導率の大きな
材料２例えばメタルコア、セラミック等よりなる基板に
、実装するＬＳＩｌ３の入出力端子１３−１と対向する
位置に接続パッド１２１を配設して、信号用の接続パッ
ド１２１に裏面まで貫通したＶ ｉ Ａ１２３−２を形
成し、電源供給用接続バッド１２１にはＶ ｉ Ａ１２
３−３を形成する。そして、Ｉ−ＳＩ １３の実装領
域外で前記接続パッド１２１の周囲に改造用パターン１
２２とその近傍にＶ ｉ Ａ１２３−１を形成して、そ
れぞれのＶ ｉ Ａ１２３−Ｌ改造用パターン１２２．
及び接続パッド１２１を直列に接続する配線１２４−Ｌ
１２４−２を形成したものである。The dedicated board 120 has mechanical strength and is made of a material 2 with high thermal conductivity, such as a metal core or ceramic, which can efficiently cool down the heat generated by the disposed terminating resistor 140. The input/output terminals 13 of the LSI 13 to be mounted are A connection pad 121 is disposed at a position opposite to the signal connection pad 121 to form a ViA123-2 that penetrates to the back surface of the signal connection pad 121, and a ViA12 is formed in the power supply connection pad 121.
Form 3-3. Then, a modification pattern 1 is placed around the connection pad 121 outside the mounting area of the I-SI 13.
22 and its vicinity to form Vi A123-1 to form each Vi A123-L modification pattern 122.
and wiring 124-L connecting the connection pads 121 in series.
124-2 was formed.
上記部材を使用して高密度集積素子用終端抵抗の実装、
配線方法は、上記専用基板１２０の裏面に終端抵抗１４
０を配設してＶ ｉ Ａ１２３−２と接続し、主面の接
続パッド１２１に入出力端子１３−１を接続してＬＳＩ
ｌ３を実装し、その専用基板１２０と上記プリント配線
基板１１０を半田ハンプ１５２により、専用基板１．２
００Ｖ ｊ Ａｌ２３−１とプリント配線基板１１０の
信号用Ｖ ｉ Ａ１１３−１を、専用基板１２０のＶｉ
Ａ１２３−３とプリント配線基板１１０のＶ ｉ Ａ
１１３−２を同時に結合することにより、信号伝送回路
と電源供給回路が形成されてプリント配線基板１１０と
ＬＳ１１３が接続される。Mounting of terminating resistors for high-density integrated devices using the above materials,
The wiring method is to install a terminating resistor 14 on the back side of the dedicated board 120.
0 and connect it to the V i A123-2, and connect the input/output terminal 13-1 to the connection pad 121 on the main surface to connect the LSI
The dedicated board 120 and the printed wiring board 110 are connected to the dedicated board 1.2 using the solder hump 152.
00V j Al23-1 and signal Vi of printed wiring board 110 A113-1 is connected to Vi of dedicated board 120
V i A of A123-3 and printed wiring board 110
113-2, a signal transmission circuit and a power supply circuit are formed, and the printed wiring board 110 and the LS 113 are connected.
以上の方法により、終端抵抗１４０は裏面に実装される
ので接続パッド１２１に対して信号伝送回路がそれぞれ
１木となるので高密度の実装、配線が可能となり、且つ
専用基板１２０の板厚が薄くなってＶｉＡにより形成さ
れる信号伝送回路が最短となるので信号の高速伝送が可
能となる。With the above method, the terminating resistor 140 is mounted on the back side, so there is only one signal transmission circuit for each connection pad 121, so high-density mounting and wiring are possible, and the thickness of the dedicated board 120 is thin. Since the signal transmission circuit formed by ViA becomes the shortest, high-speed signal transmission becomes possible.
尚、上記終端抵抗１４０は専用基板１２０の裏面に厚膜
、或いは薄膜抵抗を直接形成させて、放熱効果の向上と
厚みを薄くする実装手段を行っても良い。又、上記専用
基板１２０は全り、Ｓｌ共通の一枚或いは各ＬＳＩ毎に
個別のものを形成しても良いが、第２図に示すように複
数のＬＳ１１３が実装できる大きさに形成して高速伝送
が必要なＬＳ１１３のみを実装し、入出力端子数の少な
いもの、及び信号の高速伝送が必要でないＬＳ１１３は
従来の方法によりプリント配線基板１１０に直接実装し
ても良い。The termination resistor 140 may be formed by directly forming a thick film or a thin film resistor on the back surface of the dedicated substrate 120 to improve the heat dissipation effect and reduce the thickness. Further, the dedicated board 120 may be formed as a single board common to all SLs, or may be formed individually for each LSI, but as shown in FIG. Only the LS113 that requires high-speed transmission may be mounted, and the LS113 that has a small number of input/output terminals and the LS113 that does not require high-speed signal transmission may be directly mounted on the printed wiring board 110 using a conventional method.
更に、プリント配線基板１１０と専用基板１２０は第３
図（ａ）に示すように、専用基板１２０の％１Ａ１２３
−１に微細なピン１５３を溶着して垂設し、そのピン１
５３とプリント配線基板１１０のＶ ｔ Ａ１１３−１
を半田により結合する方法、或いはＶ ｉ Ａ１２３−
１とｖ ｉ Ａ１１３−１に互いに対向するように金属
バンプ１５４を形成して、その金属バンプ１５４を圧接
させることにより結合する方法でも良い。Furthermore, the printed wiring board 110 and the dedicated board 120 are
As shown in figure (a), %1A123 of the dedicated board 120
A fine pin 153 is welded to -1 and hung vertically, and the pin 1
53 and V t A113-1 of the printed wiring board 110
or V i A123-
1 and v i A 113-1 may be formed with metal bumps 154 facing each other, and the metal bumps 154 may be brought into pressure contact with each other to couple them.
以上説明したように本発明によれば極めて簡単な方法で
信号の高速伝送が可能となり、且つ高密度実装が行える
等の利点があり、著しい経済的及び、信頼性向上の効果
が期待でき工業的には極めて有用なものである。As explained above, the present invention has advantages such as enabling high-speed signal transmission with an extremely simple method and high-density packaging, and can be expected to have significant economical and reliability-improving effects. It is extremely useful.
第１図は本発明実施例による高密度集積素子用終端抵抗
の実装、配線方法を示す一部破断図、第２図は本実施例
による高密度集積素子の実装例を示す斜視図、
第３図は他の実施例を示す図、
第４図は従来の高密度集積素子用終端抵抗の実装、配線
方法を示す平面図、
第５図は他の従来例を示す図である。
図において、
１３はＬＳＩ、 １３−１は入出力端子、１１
０はプリント配線基板、
１１１は信号層、 １１２は電源層、１１３−
１．１１３−２．１２３−１．１２３−２．１２３−３
はＶｉＡ。
１２０は専用基板、 １２１は接続パッド、１２２
は改造用パターン、
１２４−１，１２４−２は配線、 １４０は終端抵抗、
１５１は半田バンプ、 １５２は金属バンプ、１５３
はピン、
を示す。
（ｂ）
彷」シ南ツ’Ｔｈ宴ｌＪｙ坏鳩泌Ｊし突装ｍφ泉方及絆
す平１口第４図
＋０１
（Ｃ）
４ｔ ｑ ｒｊｕニー’ｒ列９Ｊ：Ｔ Ｄ第５図1 is a partially cutaway view showing the mounting and wiring method of a terminating resistor for a high-density integrated device according to an embodiment of the present invention; FIG. 2 is a perspective view showing an example of mounting a high-density integrated device according to the present embodiment; FIG. 4 is a plan view showing a conventional mounting and wiring method of a termination resistor for a high-density integrated device, and FIG. 5 is a diagram showing another conventional example. In the figure, 13 is an LSI, 13-1 is an input/output terminal, and 11
0 is a printed wiring board, 111 is a signal layer, 112 is a power layer, 113-
1.113-2.123-1.123-2.123-3
is ViA. 120 is a dedicated board, 121 is a connection pad, 122
is a modification pattern, 124-1 and 124-2 are wiring, 140 is a terminating resistor,
151 is a solder bump, 152 is a metal bump, 153
indicates a pin. (b) 4t q rju knee'r column 9J: T D Fig. 5
Claims (2)
実装、配線方法であって、前記高密度集積素子（１３）
の実装用接続パッド（１２１）を主面に配設して、該接
続パッド（１２１）にＶｉＡ（１２３−２，１２３−３
）を形成し、該接続パッド（１２１）の周囲に改造用パ
ターン（１２２）とＶｉＡ（１２３−１）を形成して、
該ＶｉＡ（１２３−１）と該改造用パターン（１２２）
と該接続パッド（１２１）を接続した専用基板（１２０
）と、内層の信号層（１１１）、及び電源層（１１２）
と接続するＶｉＡ（１１３−１，１１３−２）を形成し
たプリント配線基板（１１０）を備え、 主面に上記高密度集積素子（１３）を実装した該専用基
板（１２０）の裏面に終端抵抗（１４０）を配設して該
ＶｉＡ（１２３−２）と接続し、該専用基板（１２０）
の該ＶｉＡ（１２３−１）と上記ＶｉＡ（１１３−１）
および該ＶｉＡ（１２３−３）と上記ＶｉＡ（１１３−
２）を結合することにより、上記プリント配線基板（１
１０）より信号伝送回路と電源供給回路および終端抵抗
回路を形成してなることを特徴とする高密度集積素子用
終端抵抗の実装、配線方法。(1) A method for mounting and wiring a high-density integrated element and a terminating resistor on a printed wiring board, the high-density integrated element (13)
A mounting connection pad (121) is arranged on the main surface, and ViA (123-2, 123-3) is provided on the connection pad (121).
), forming a modification pattern (122) and a ViA (123-1) around the connection pad (121),
The ViA (123-1) and the modification pattern (122)
and the dedicated board (120) connected to the connection pad (121).
), an inner signal layer (111), and a power supply layer (112)
The dedicated board (120) has a printed wiring board (110) formed with ViA (113-1, 113-2) connected to the board, and the high-density integrated element (13) is mounted on the main surface. (140) and connect it to the ViA (123-2), and connect the dedicated board (120) to the ViA (123-2).
The ViA (123-1) and the ViA (113-1)
and the ViA(123-3) and the ViA(113-3)
2), the above printed wiring board (1
10) A method for mounting and wiring a terminating resistor for a high-density integrated device, characterized by forming a signal transmission circuit, a power supply circuit, and a terminating resistor circuit.
抗から成り、上記専用基板（１２０）と一体的に形成さ
れていることを特徴とする特許請求の範囲第１項記載の
高密度集積素子用終端抵抗の実装、配線方法。(2) The high density according to claim 1, wherein the terminating resistor (140) is made of a thin film resistor or a thick film resistor, and is formed integrally with the dedicated substrate (120). Mounting and wiring methods for terminating resistors for integrated devices.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5474787A JPS63220558A (en) | 1987-03-09 | 1987-03-09 | Method of mounting and wiring terminal resistance for high-density integrated element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5474787A JPS63220558A (en) | 1987-03-09 | 1987-03-09 | Method of mounting and wiring terminal resistance for high-density integrated element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63220558A true JPS63220558A (en) | 1988-09-13 |
Family
ID=12979361
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5474787A Pending JPS63220558A (en) | 1987-03-09 | 1987-03-09 | Method of mounting and wiring terminal resistance for high-density integrated element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63220558A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5390080A (en) * | 1993-05-03 | 1995-02-14 | Motorola | Tin-zinc solder connection to a printed circuit board of the like |
| US5898217A (en) * | 1998-01-05 | 1999-04-27 | Motorola, Inc. | Semiconductor device including a substrate having clustered interconnects |
-
1987
- 1987-03-09 JP JP5474787A patent/JPS63220558A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5390080A (en) * | 1993-05-03 | 1995-02-14 | Motorola | Tin-zinc solder connection to a printed circuit board of the like |
| US5452842A (en) * | 1993-05-03 | 1995-09-26 | Motorola, Inc. | Tin-zinc solder connection to a printed circuit board or the like |
| US5898217A (en) * | 1998-01-05 | 1999-04-27 | Motorola, Inc. | Semiconductor device including a substrate having clustered interconnects |
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