JPS63219274A - Detecting circuit for television offset beat - Google Patents

Abstract

PURPOSE:To exactly decide an offset beat level value, by outputting an output as a normal one when the defective signal period of a detecting output is less than a prescribed time. CONSTITUTION:By passing the output 10 of a voltage comparator 8 through a re-triggering monostable multivibrator 11 when the output performs the malfunction of defective decision, the re-triggering monostable multivibrator 11 having the constant pulse width is outputted by triggering the down edge of the output 10. By taking out the sum of the output and the output 10 from an OR circuit 12, normal decision can be obtained exactly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field J] The present invention is directed to a beat level detection and judgment circuit for an offset and beat detection circuit in television broadcasting.

[Conventional technology J Figure 5 shows a conventional circuit system of this type.

In the figure, (1) is a television signal '5, (2) is a beat detection circuit that extracts an offset beat component from this television signal (1), and (3) is a beat detection circuit that extracts an offset beat component from this television signal (1). Increaser% that increases the beat debt
(4) is a detector that detects the beat level amplified by the amplifier (3), and (5) is a vertical synchronization signal (6) that detects the beat level signal detected by the detector (4). Analog switch (7
] is the beat level that is the output of this analog switch (5), and (8) is the beat level signal and the reference voltage (
(9) is a voltage comparator that compares the voltage comparator (10).
9) is the beat level judgment output.

Figure 6 shows examples of voltage waveforms at various parts of the conventional circuit shown in Figure 1. Output waveform example,
(c) An example of the output waveform of the I/″i voltage comparator (8).

Next, the operation will be explained. A desired reception wave (hereinafter referred to as "return wave") and an interference wave (hereinafter referred to as "U wave") are input to the television signal (1). The relationship between the rope wave numbers of D waves and U waves is
A beat detection circuit (2) extracts a beat component of 10 KHz or 20 KHz from this TV, which has a relationship that produces an offset beat of LOKHz or 20 KHz. This beat component is amplified by an amplifier (3) and then converted into a DC signal (hereinafter referred to as a beat level) by a wave detector (4).

This signal waveform is shown in FIG. 6(a). This beat level is then input to the analog switch (5), which prohibits output of the beat level in the vertical synchronization period. The output waveform of this analog switch (5) is shown in FIG. 6(b). This is the 10KHz to 20KHz frequency generated in the vertical synchronization signal section.
The component is originally prohibited because it is not an offset component that is desired to be extracted. This analog switch (5
) is then input to a voltage comparator (8). The voltage comparator (8) compares the beat level with the reference voltage (9), and when the beat level is lower than the specified beat level value determined by the reference voltage, a good judgment is made.
When the beat level is high, a negative determination is made.

[Problems to be Solved by the Invention] Conventional circuits for determining beat level values are configured as 1 or more, and are designed to be unaffected by the beat component contained in the vertical synchronization signal. The 1OKHz and 20KHz components included in the John video signal are not taken into account.
When there is a large video component, there is a problem in that the K#4J constant value becomes inaccurate as shown in FIG. 6 <C).

This invention was made in order to alleviate the above-mentioned problems.It is a 4'lJ constant force kill television offset and beat detection circuit that has an accurate offset beat level value without being affected by video components. Means for Solving Problem J Aimed at Obtaining C Problem J According to the present invention, the television offset beat detection circuit according to the present invention detects the A determining means is provided for determining and outputting a "no-1" signal period as "reliable".

[Operation] The television offset and beat detection circuit of the present invention determines that a #fail signal pulse within a predetermined time is a beat detection caused by a video signal component, and outputs a "pass" signal during the detection period. This prevents false detection due to video signal components and allows accurate beat detection.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (1) is TV SM, (2)
is a beat detection circuit that extracts the offset beat component from this television signal (IJ), (3) is an amplifier that amplifies the beat signal extracted by this beat detection circuit (2),
(4) is a detector that detects the beat amplitude amplified by the amplifier (3), and (5) is a detector that detects the beat level signal detected by the detector (4) by a vertical synchronous signal (6). An analog switch that passes the sync signal section, (7) is the beat level m that is the output of this analog switch (5)
'1, (8) is a voltage comparator that compares this beat level value with the reference voltage (9), (10) is the output of the voltage comparator (8), (11) /Ii voltage comparator (8) Re-trigger monomulti circuit operated by the output of (12)
is an OR circuit that outputs the sum of the output of the retrigger monomulti circuit and the output (lO) of the voltage comparator (8).

Next, the operation will be explained. As explained in the conventional example, the determination of the acceptability of the beat level value at the output of the voltage comparator (8) was inaccurate due to the influence of the video component. Also, even when there is no offset beat, one of the video components
When the OKHz and 20KHz components are large, it may be determined that the beat is large.

As shown in Fig. 2(a), the output (lO) of the voltage comparator (8) makes an erroneous judgment, but this output (lO)
) is passed through the retrigger monomulti circuit (11) to obtain the output shown in FIG. 2(b). This mono multi-circuit (11) outputs a constant pulse at the start trigger of the output (lO) of the voltage comparator (8). It is equipped with a re-trigger mono multi-circuit that outputs a re-output pulse when the trigger is input.

The sum of this output and the output (lO) of the voltage comparator (8) is
By using the OR circuit (12), Fig. 2(c)
), the result is an accurate good judgment. What is important in this circuit is the pulse output by the retrigger monomulti circuit (11), and the settings in this pulse are determined by the degree of reduction in the probability of malfunction and the OR circuit (12). It may be determined based on the response time when performing control using the beat level value judgment output output.

In the above embodiment, the retrigger monomulti circuit (11)
Although an effect was obtained using the and OR circuit (12), the CPU
It is also possible to use b0.A system diagram of an embodiment in this case is shown in FIG. In this embodiment, as shown in FIG. 4(b) K, the CPU (16) judges whether the beat level is good or bad at regular sampling intervals. When this data is rejected a certain number of times in a row, it is determined that the beat level is truly high, and when it is sporadic or a short number of times, it is determined that it is an erroneous determination. How to determine a certain number of times,
This can be considered in the same way as the determination during the pulse of the retrigger monomulti (11) in the above embodiment.

〔Effect of the invention〕

Since a determination circuit for eliminating the offset beat level is added, it is possible to obtain a more accurate offset beat level determination.

[Brief explanation of the drawing]

FIG. 1 is a system diagram showing a television offset beat detection circuit according to an embodiment of the present invention, and FIG. 2 is an operational waveform diagram for explaining the operation of FIG. 1. FIG. 3 is a system diagram showing a television offset beat detection circuit according to another embodiment of the present invention, FIG. 4 is an operational waveform diagram for explaining the operation of FIG. 3, and FIG. 15 is a conventional television offset beat detection circuit. FIG. 6, a system diagram of the detection circuit, is an operation waveform diagram for explaining the operation of FIG. 1. In the figure, (2) is a beat detection circuit, (4) t'i detector, (5) #-t: analog switch, (6) is a vertical synchronization signal, (8) is a voltage comparator, and (11) is The retrigger monomulti circuit, (12) is an OR circuit, and (16) is a CPU. In addition, in the figure, the same reference numeral 9 indicates the same or equivalent part.

Claims (3)

[Claims] (1) In a detection circuit that detects a beat component of a predetermined frequency from a television signal and outputs the "pass/fail" of the detection level as a binary signal, the "fail" signal period of the detection output is a predetermined period. A television offset beat detection circuit, characterized in that it is provided with a determination means for outputting the "fail" signal period as a "pass" signal if the period is less than or equal to the "fail" signal period. (2) Claims characterized in that the determination means is constituted by a re-trigger monomulti circuit triggered by the detection output, and an OR circuit that outputs the logical sum of the output of the monomulticircuit and the detection output. The television offset beat detection circuit according to item 1. (3) The determination means measures the detection output using sampling pulses of a constant period, and if the number of sampling pulses during the "fail" signal period is less than or equal to a predetermined number, the "fail" signal is detected.
The television offset beat detection circuit according to claim 1, characterized in that it is constituted by a CPU that outputs the signal as a "good" signal.