JPS63214688A - Electronic watch with calendar - Google Patents

Abstract

PURPOSE:To give warning when a month end is inadvertently set at a non-existence date so that resetting can be made by constituting a month end correcting means in such a manner as to drive a data display means according to the information of a non-existence date detecting circuit to make a warning operation. CONSTITUTION:A specific date discriminating circuit 90 operates as the non-existence date detecting circuit. Said circuit detects either the non-existence date or other date by the year information signal Dy and month information signal Dm set in year and month setting operation if the date set in a date setting operation is a 29th, 30th or 31st day. The circuit supplies a date dial correction signal Dhd as a non-existence date correction signal from a terminal group M to a month end correcting circuit 91 in the case of the non-existence date. A pulse motor 207 is then driven by a fast feed signal PC2 for the hour and minute hands outputted from the month end correcting circuit 91 to feed the display of the date dial 7 quickly to the next one day, by which the setting of the non-existence date is warned. A wearer is capable of resetting the correct date by this warning operation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electronic timepiece with a calendar equipped with an automatic month-end correction function on a white board.

[Conventional technology]

Conventionally, in conventional pointer-type calendar watches, the date dial is generally adjusted using the crown at the end of each small month, but in order to eliminate this inconvenience, a calendar information storage circuit has been installed, A so-called automatic month-end correction system has been proposed, which automatically corrects the date display at the end of the month according to the information in the calendar information storage circuit.

The key technologies in the above-mentioned automatic month-end adjustment system are a calendar information creation technology for storing information such as year, month, and day, a date board correction technology for correcting the date board according to the created calendar information, and This is a monitoring technology for monitoring calendar information, and the present applicant has already published Japanese Patent Publication No. 58-22713 on a method for adjusting the date plate by fast-forwarding a motor for driving various systems, such as time display hands. No. 60-1 for the method of providing a date plate and drive motor separately from the pointer drive motor.
3153, Japanese Patent Application Laid-Open No. 54-67470 for a method of storing calendar information using a white board or day board, and Japanese Patent Application Laid-Open No. 54-79661 for a method of storing and monitoring the year and month by providing a shoulder board. I will make a proposal in the issue.

Also, JP-A-55-166677 and JP-A-56-85
No. 86 proposes a technical concept in which stored calendar information is monitored by displaying the second hand in a different display state than normal when a button is operated, and also proposes a method in which the month and day are displayed using hands.

[Problems that the invention attempts to solve]

However, all of the automatic month-end correction systems described above are aimed at correcting the grid at the end of the month, and do not take into account the existence of non-existent days when setting calendar information.

In other words, the date plate correction in the automatic month-end correction system described above is generally performed at the moment when the date plate display changes (PM12).
If you accidentally set the display of the grid to a non-existing date (February 30th, 31st, 31st of the month of /) when setting the calendar information, P of the day
When the automatic month-end adjustment system operates at M12 and the grid plate is moved quickly, it becomes K, causing the problem that the calendar is not set correctly. The purpose of the present invention is to solve the above-mentioned drawbacks and
We aim to provide an electronic watch with a calendar function that warns the wearer if a non-existent date is mistakenly set when setting calendar information, and allows the correct calendar information to be reset. ).

[Means for solving problems]

The structure of the present invention for solving the above problem is as follows.

A pointer for displaying the time, a date display member for displaying the date, a month information storage means for storing the current month, and determining that the display content of the date display member is from the 29th to the 31st. a month-end correction means for correcting the end of the month in accordance with the information in the month information storage means and the latest information from the specific day judgment means; and a manual correction means for manually correcting the date display member. The electronic clock is provided with a non-existence date detection circuit that inputs the month information from the month information storage means, the specific day information from the specific day determination means, and a manual correction end signal from the manual correction means, The month end correction means is characterized in that it drives the date display member to perform a warning operation in accordance with information from a non-existent day detection circuit.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a front view showing the external appearance of an electronic timepiece with a calendar according to the present invention, where 1 is an electronic timepiece, 2 is an hour hand, 6 is a minute hand,
4 is a second hand, and the hour hand 2 and minute hand 6 are the first hand, which will be described later.
It is driven by a motor in 20 second steps, and the second hand 4
is driven by a second motor to be described later, and also displays year and month information corresponding to each display section of the function display section 5.

6 is a calendar window, 7 is a date plate, and 8 is a crown, which has drawer positions of 0, 1, and 2, just like a normal calendar watch. A quick correction is made, and the hour hand 2 and minute hand 6 are corrected by rotating in two stages. 9 is a push button. Further, the function display section 5 includes 5
Month display section 5a with month information from 1 to 120 placed in seconds
A year display section 5b is provided with four year marks Y1, Y2, Y3, and Y4 indicated by diagonal lines, and an OF mark is provided at the 0 second position of the second display section.

Next, the operation of the electronic timepiece 1 having the above configuration will be explained with reference to each display mode of the function display section 5 shown in FIG.

First, to explain the initial setting operation when the battery has been replaced in the electronic watch 1, the crown 8 of the electronic watch 1 is in the 0 position and the second hand 4 is in seconds display mode, as shown in Figure 2 (a). The second hand 4 is moved in 1-second steps as shown in Fig. 2 (middle).To initialize the second hand 4 from this state, press the When button 9 is held down for 5 seconds, the second hand 4 moves as shown by the solid line arrow (in 1 second steps up to the 5 second position, then moves rapidly as shown by the dotted arrow until it reaches the 0 second position, that is, the OF mother position). Stop.

The position of the second hand 4 is now electrically memorized.
The function display section 5 enters the year display mode shown in FIG. 2(c). In this state, you can set the year. In other words, when pushbutton 9 is pressed in this state, the year display section 5 of Fig. 2 →
As shown in b, <0F (O second position), Yl (7 second position),
Y2 (22 second position), Y3 (38 second position), ¥4 (53
The year is set by moving through the five positions (seconds position) with each press. For each position above, the OF is automatically corrected at the end of the month.
F and Yl correspond to leap years, and Y2, Y3, and Y4 correspond to the first, second, and third years after the leap year.

After completing the initial setting of the second hand 4 or the operation of the push button 9 in the year setting, if you leave it for more than 3 seconds, it will return to the monitor mode, which will be described later.
Operate the pushbutton 9 to move the second hand 4 to Yl in the case of a leap year, or to the positions Y2, Y3, and Y4 in the first, second, and third years after the leap year, respectively, and change the state. By leaving the button for 3 seconds, you can select the year setting or turn off the month-end automatic correction.

Next, the month and day setting operations will be explained.

When the crown 8 of the electronic timepiece 1 shown in FIG. 1 is pulled out to the first position, the date dial 7 can be quickly adjusted by rotating the crown as described above, as in conventional calendar watches. At the same time, the second hand 4 enters the month display mode as shown in Figure 2).
In this state, when the pushbutton 9 is pressed, the month display section 5a changes to 1.
The month is set by moving the number positions from 12 to 12 each time the button is pressed. After setting the month and day, turn crown 8 to 0.
By returning to step 4, the setting operation is completed and the second hand 4
maintains the month display mode, but if the date set in the above setting operation is a non-existent day, the non-existent day detection circuit described below operates and changes the date display to the first day of the next month. Correct it to

In addition, in the year display mode, if the year is not set, that is, if OF is selected, and as described below (
If you do not perform the initial settings after replacing the battery, the second hand 4 will not shift to the month display mode and will remain in the second display mode even if the crown is pulled out to the second click, and the month setting using the pushbutton 9 will not be possible. Not done.

Next, the time adjustment operation will be explained.

As with conventional hand-type watches, the hour hand 2 and minute hand 6 can be mechanically corrected by pulling out the needle 8 of the electronic watch 1 shown in FIG. 1 to the second stage and rotating it. At the same time, the second hand 4 is forced into the seconds display mode shown in FIG. 2(A), and the operation of the second hand 4 is stopped. And after the guidelines were revised,
The second hand 4 starts by returning the crown 8 to the 0th step.

Next, the operation of monitoring the year and month will be explained.

By operating the pushbutton 9 in the monitor mode in which the crown 8 of the electronic watch 1 shown in FIG.
You can monitor the moon.

In other words, the short-time operation of the pushbutton 9 (KPB shown in FIG. 3)
If the operation is performed for more than 5 seconds, the mode will be set to the initial setting mode as described above.) As shown in Fig. 3, the seconds display mode, year display mode, and month display mode can be selected cyclically. The month display mode and the month display mode are fixed displays, but the year display mode is only monitored, and when 5 seconds have elapsed after selection, the timer moves to the next month display mode as shown by the dotted line. i.e. second hand 4
With pushbutton 9, it is possible to select whether to display seconds or months, and the year can be monitored for just 5 seconds.

In addition, if OF is selected when setting the year in the year display mode, or if the initial setting is not performed, the monitor mode will not be set at the O position of the lever 8, and the year display mode and month will be changed using pushbutton 9. It becomes a dead mode in which the display mode is not selected and is fixed to the seconds display state.

Next, the structure of the electronic timepiece 1 will be explained with reference to FIG.

FIG. 4 is a plan view of the main parts showing the relationship between the calendar mechanism and the switch, in which 20 is the winding stem operated by the crown 8, 21 is the screw wheel attached to the winding stem 20, and 26 is the thinner part of the winding stem 20. By engaging with the diameter portion 2C1a, the winding stem 20
It is a switch lever that is linked to the drawer. 24.25
is an electrode formed on the circuit board, and the first reuse switch SRI is closed when the crown 8 is pulled out to the first stage by the switch reno (-26) and the electrode 24.
The switch lever 26 and the electrode 25 constitute a second crown switch SR2 that is closed when the crown 8 is pulled out to the second stage. Reference numeral 7 designates the date plate, and the inner periphery is provided with a date feed tooth 7a, and the outer periphery is provided with a protrusion 7b for detecting a specific date, which will be described later.

27.28 is a switch lever controlled by the protrusion 7b, 29.60 is a contact bin, and the switch lever 27 and the contact bin 29 cause the first date plate switch S
The switch lever 28 and the contact pin 60 constitute a second date plate switch SH2. 61 is a switch lever operated by the push button 9;
The contact bin 32 constitutes a push button switch SPB.

66 is the date wheel, 64 is the date control lever, 65 is the hour wheel kana, and 2.6.4 is the hour hand, minute hand, and second hand shown in FIG.

Next, the operation of each switch having the above configuration will be explained.

First, when the crown 8 is in the O position, the switch lever 26 is not in contact with any of the electrodes 24, 25, so the first crown switch SRI and the second crown switch SR2 are both OFF. When the crown 8 is pulled out to the first stage, the switch lever 23 engaged with the narrow diameter portion 20a of the winding stem 20 rotates about the rotating shaft 23a, so that the contact portion 23b comes into contact with the electrode 24, and the first Reuse switch SR1 is turned ON.

At the same time, a quick correction claw 2 provided on the Tsuzumi wheel 21
1a meshes with the date feed tooth 7a of the date plate 7, so that the date plate 7 can be corrected for fast forwarding by rotating the winding stem 20.

Next, when the crown 8 is pulled out to the second step, the switch lever 26
rotates further, and the contact portion 23b moves from the electrode 24 to the electrode 25.
A switching contact is made to. As a result, the first reuse switch SRI is turned off and the second reuse switch SR2 is turned off.
It becomes N. In this state, although not shown, the winding stem 2
As mentioned above, the time is corrected by rotating the clock.

Next, the operation of the batten switches S H1 and SH2 will be explained. The switch lever 27.28 has a spring portion 27a,
By being biased by 28a, the sliding parts 27b, 2
8b slides in pressure contact with the outer periphery of the date plate 7. In the state shown in FIG. 4, since the sliding portion 28b of the switch lever 28 constituting the second date plate switch SH2 is sliding on the outer periphery of the date plate 7, the contact portion 28C is not in contact with the contact bin 30. First, the second day plate switch S H2 is OFF. In addition, the sliding part 27b of the switch lever 27 constituting the first date plate switch SHI rides on the protrusion 7b of the date plate 7, so that the contact part 27C contacts the contact pin 29, and the first date plate switch SHI is turned ON. It becomes.

That is, the white plate switches S H1 and SH2 are controlled by the protrusion 7b of the date plate 7;
The relationship between the switch levers 27 and 2B is as shown in the time chart of FIG.

FIG. 5(a) shows the date on the date board 7 displayed in the calendar window 6, FIG. 5(b) shows the operation of the first date board switch SHI, and FIG. 5(c) shows the operation of the first date board switch SHI. shows the operation of the second date plate switch SH2. That is, the position and shape of the protrusion 7b on the date plate 7 are such that the first day plate switch SHI is turned on while the 29th and 30th are displayed in the calendar window 6, and the 30th and 30th are displayed in the calendar window 6. While the 31st is displayed, turn on the 2nd day board switch SH2 (
It is formed.

Furthermore, the operation of the pushbutton switch SPB is turned on by operating the switch lever 61 with the pushbutton 9, causing the contact portion 31a to come into contact with the contact pin 62.

Next, the circuit configuration of the electronic timepiece 1 will be explained with reference to the block diagram shown in FIG.

50 is a reference oscillation circuit, 51 is a front-stage frequency divider circuit, and 52 is a rear-stage frequency divider circuit.
Hz fast transmission signal Pc1 is output, and the latter-stage frequency dividing circuit 5
2 is I as shown in FIG. 12 (b) by dividing the frequency of the fast transmission signal Pc1.
A 1-Hz signal P and a 20-second signal P2G with a 20-second period shown in FIG. 12(c) are output. 53 is a drive signal generation circuit, which generates the 20 second signal P20 and the rapid transmission signal Pc1.
is input, and an hour and minute hand drive signal P m k having a period of 20 seconds and a pulse width of 128 Hz as shown in FIG. 12 is output.

54 is an hour and minute hand rapid transmission signal generation circuit, which generates the rapid transmission signal P.
c, and the hour and minute hand drive signal P m k, and the output shown in Fig. 12 (
The hour and minute hand rapid transmission signal Pc2 shown in (e) is output.

60 is a hand position counter that electrically stores the position of the second hand 4; 61 is a second counter that receives the first signal P; and 62 is a month counter that is driven by the operation signal of the second date switch SH2. , 66 inputs the carry signal of the month counter 62, the year setting signal Sys and the year correction pulse Py from the control signal generation circuit 75 described later, and when the year setting signal Sys supplied to the terminal S is H, Quintal mode (0~
4), when it is L, it is a year counter that operates in quaternary mode (1 to 4). 64 is a month decoder and the month counter 6
The monthly information signal Dm of 2 is inputted, and the blade position information signal Dmp of 5 seconds corresponding to the function display section 50 and the monthly display section 5a is outputted. 65 is a year decoder which inputs the year information signal Dy of the year counter 66 and outputs year position information signals Dy corresponding to each year mark Y1, ¥2, Y3, ¥4 on the year display section 5b.
Output p. 66 is the zero second position (O
A zero memory 67 outputs a zero information signal Do corresponding to the F mom position), and 67 is a data switching circuit, and the data switching circuit 67 outputs a second information signal Ds.

Year position information signal Dyps Month position information signal Dmp.

Each piece of information of the zero information signal Do is input, and one of the pieces of information is outputted as a selection information signal Dc according to conditions of selection terminals B1, B2, B3, and B4, which will be described later.

Reference numeral 68 denotes a coincidence detection circuit, which detects the selection information signal Dc selectively outputted from the data switching circuit 67 and the hand position counter 6.
An AN that outputs a coincidence signal Sc to control the early transmission signal Pcl when the device information signal Dnp consisting of 0 coincides with the device information signal Dnp.
D gate 69 is turned off. and the needle position counter 60. Data switching circuit 67, -number configuration circuit 68 and AN
The D gate 69 constitutes a hand position switching circuit 7o, and the hand position switching circuit 70 is connected to the second hand 4 as explained in FIG.
The hand movement is performed by making the display correspond to each display section of the function display section 5.

Briefly explaining the operation of the needle position switching circuit 70, the rapid transmission signal Pc1 is supplied to the needle position counter 60 via the A N D and the gate 69.
0 is the fast transmission signal Pc of 12811z.

The second hand 4 is also fast-forwarded in synchronization with this. Then, the needle position information signal Dnp, which is the output of the needle position counter 60, is the output of the data switching circuit 67.
The coincidence signal Sc is output from the second hand and supplied to the negative terminal of the AND gate 69, thereby closing the AND gate 69 and stopping the hand position counter 60 and the second hand 4. As a result, the hand position on the second hand 40 function display section 5 is determined by the selection information signal D.
The position is specified by c. This state is maintained as long as the selection information signal Dc does not change, but when the selection information signal Dc changes, the coincidence signal Sc output from the coincidence detection circuit disappears, and the AND gate 6
9 is turned ON, and the hand position kakunta 60 and the second hand 4 are fast-forwarded again by the fast transmission signal Pc1, whereby the second hand 4 moves to a position corresponding to the changed selection information signal Dc.

Then, the hand position switching circuit 70 can switch the position of the second hand 4 according to the designation of the selection information signal Dc by repeating fast forwarding by the fast transmission signal Pc1 and stopping by the coincidence signal Sc.

Therefore, when the hand position switching circuit 70 switches the selection information signal Dc by the data switching circuit 67, the second hand 4 changes the information for each Sakurazushi. This is what is displayed.

75 is a control signal generating circuit, and the crowns 8 are each set to 0.
A 0-stage control section 76 that generates a control signal when in the stage position.
．． 1st stage control section 7 that generates a control signal when in the 1st stage position
7. It has a two-stage control section 78 that generates a control signal when it is in the second stage position.

And input terminals E, ~E6 and output terminal F o
"'-F a, the push button switch SPB is connected to the terminal E□, the first reuse switch SRI is connected to the terminal E2,
A second reuse switch SR2 is connected to the terminal E, and a signal number P1 is input to the terminal E. Furthermore, a year no setting signal Syn and a power-on pulse Pso, which will be described later, are input to the terminals E and R6. It has been entered.

A signal is outputted to the output terminal Fo"-R4 from the 0-stage control unit 76 according to the conditions of each input signal, and the terminal F1
is the mode selection pulse PCd generated by operating the pushbutton switch SPB, and terminal F2 is the initial pulse P generated when the pushbutton switch is held down for 5 seconds.
s, a year setting signal Sys at terminal F3, and a year correction pulse Py at terminal F4.

Terminal F. A return pulse Pr is output when returning from the year setting mode to the monitor mode.

In addition, signals are outputted from the first stage control section 77 to the output terminals F, ~F, the force setting signal Sms is output to the terminal F, the month correction pulse Pm is output to the terminal F, and the above-mentioned signal is output to the terminal F7. A correction end pulse Pnd that is generated when the crown is pushed from the first or second pulled out position to the 0th position is output.

Further, a time adjustment setting signal Sts is outputted from the two-stage control section 78 to the terminal F8.

A specific configuration of the control signal generation circuit 75 will be explained with reference to FIG.

In FIG. 8, numeral 100 is a pulse generator, which outputs the operation signal of the pushbutton switch SPH as a pulse signal ppb. The 0-stage control unit 76 includes a first timer 101 for initial operation using the 1 signal P1 supplied from the terminal E4 as a clock, a second timer 102 for returning to the mode, and an RS flip-flop for storing the year setting mode. 106 (hereinafter referred to as R8-FF), pulsing circuit 10
4, 105, NAND gate 107, A
It is composed of ND gates 106 and 108, a NOR gate 109 for determining the position of the crown 8, and an inverter 110.

Further, the first stage control circuit 77 is connected to the first reuse switch SRI.
The data type is a flip-flop 111 (hereinafter referred to as D-FF) and a pulsing circuit 112, which uses the ON signal of P1 as a data input and stores the month setting mode using the 1st signal P1 as a clock.
, AND gates 116, 114, and OR gates 115, and the two-stage control circuit 78 further includes a D-FF 116 that stores the time correction mode by using the ON signal of the second reuse switch SR2 as data input, and a pulse generator 11.
7.

Next, the operation of the control signal generation circuit 75 having the above configuration will be explained. First, as an initial condition, the IJ and -8 are in the 0 position (the first relay switch SRI and the second relay switch SR2 are both 0FF), and the power-on pulse Pso supplied to the terminal E6 causes the R8-FF103, D-F
F111 and D-FF116 are reset, and terminal E
Considering the case where the year no setting signal Syn is not supplied to 5 (Syn is L level), the output of the NOR gate 109 is H because the crown 8 is in the O position.
NAN because the pushbutton switch SPB is in the OFF state.
The output of the D gate 107 becomes H, and the first timer 101 is reset.

Also R8-FFl0! + is reset, and the output terminal Q is L, so the AND gate 108 is OFF.
The output of the 1 inverter 110 is H.

Also, since the output of the AND gate 108 is L, the second timer 102 is reset and the 1st signal P is released.
1 as a clock, and outputs a timer signal T2 with a cycle of 3 seconds, and then outputs a timer signal T2 via a pulse generator 105 to R8-
A reset signal is supplied to FF103, but originally R8
- Since the FF 103 is in a reset state, no change in operation occurs. Therefore, in this state, the 0 stage control section 7
Terminal F connected to 6. -No signal is output to F4.

Also, since the D-FF 111 has been reset and the output Q has become L, the AND gate 114 is OFF, so no signal is output to any of the terminals F5 to F7 connected to the first stage control section 77. Further, since the D-FF 116 has been reset and the output Q has become L, no signal is also output to the terminal F8 connected to the two-stage control section 78.

In this state, when the pushbutton switch SPB is turned on by operating the pushbutton 9, the pulse generation circuit 10 is turned on.
0, the pulse signal Ppb is output and the AND gate 106
．． 108 and 114, but as mentioned above (the AND gate 106 is turned off by the L year no setting signal Syn).
Also, since the AND gates 108 and 114 are turned OFF by the outputs of R8-FF 106 and D-FF 111, no output is made. On the other hand, since the output of the NAND gate 107 is inverted to L by the ON signal of the pushbutton switch SPB, the first timer 101 is reset and starts counting using the 1st signal P1 as a clock. When the pushbutton switch SPB is turned OFF before outputting the timer signal T, the output of the NAND gate 107 is inverted to H again, and the first
The timer 101 is returned to the reset state.

Therefore, in order to perform the above-mentioned initial setting, the timer signal T1 is outputted from the output terminal Q of the first timer 101 by keeping the pushbutton switch SPB in the ON state for 5 seconds. This timer signal T is pulsed by the pulse generator 104 to set R8-FF103 and is outputted from the terminal F 2 as a reinitial pulse P5s. Further, by setting R8-FF103, the output terminal Q becomes H, outputs the year setting signal Sys to the terminal F3, turns on the AND gate 108, and further inverts the output of the inverter 110 to L. As a result, the L output of the inverter 110 causes the AN
The D gate 106, the N gate, and the AND gate 107 are turned off.

In this state, when the pushbutton switch SPB is turned on, the pulse signal Ppb passes through the AND gate 108 and is outputted from the terminal F as the year correction pulse Py, and instantaneously resets the second timer 102. As a result, if the year correction pulse Py is not supplied for 3 seconds after being reset by the year correction pulse Py, the second timer 102 generates a timer signal T2 from the output terminal Q, and the pulse generation circuit 1
05 to terminal F. By outputting the reset pulse Pr as a return pulse Pr and resetting R8-FF103, the year setting signal Sys at the output terminal Q is inverted to L, thereby returning from the year setting mode to the monitor mode. That is, the second
The timer 102 calls the year setting mode and outputs the year correction pulse p.
This is a return timer for returning to monitor mode by leaving it for 3 seconds after the year is corrected by y.

As will be described later, when the year is set by the above year setting operation, the year no setting signal Syn' is supplied to the terminal E.
IJ"H is reversed and AND gates 106 and 116 are turned on.
Therefore, after returning from the year setting mode to the monitor mode, the pulse signal Ppb generated by the operation of the pushbutton switch SPH passes through the AND gate 106 and is output to the terminal F1.
It is output as a mode selection pulse Pcd.

As described above, when the crown 8 is in the O position, only the 0 stage control section 76 operates, and the monitor mode and year setting mode are selected.

Next, a state in which the crown 8 is pulled out to the first stage will be described.

NO by turning on the first reuse switch SRI
The output of R gate 109 is inverted to L and AND gate 106
By turning off the NAND gate 107, the 0-stage control section 76 becomes inactive.

On the other hand, the ON signal of the crown switch SRI is in the ON state by the H level year no setting signal Syn.
By being supplied to the data terminal of the D-FF 111 via the gate 116, the D-FF 111 inverts the output terminal Q to H at the falling timing of the next signal P1 supplied to the clock terminal φ. The gate 114 is turned on and the month setting signal S m s is output from the terminal F5.

In this state, the pulse signal ppb generated by the operation of the pushbutton switch SPB passes through the AND gate 114 and is output as the month correction pulse Pm from the terminal F6.

As described above, in the first stage position of the needs 8, only the first stage control section 77 operates, and the force setting mode is selected.

After the month adjustment operation is completed, push the crown 8 to the 0 position, and the D-FF111 will switch to the first rear switch SR.
At the falling timing of the next signal, P, after the ON signal of I disappears, the output terminal Q is inverted to L to return to the normal mode, and after being pulsed at path 112, O
Correction end pulse P is sent from terminal F7 via R gate 115.
Output as nd.

Next, a state in which the crown 8 is pulled out to the second stage will be described.

NO by turning on the second reuse switch SR2
As described above, the output of the R gate 109 is inverted to L, and the 0-stage control section 76 becomes inactive. On the other hand, when the ON signal of the second crown switch SR2 is supplied to the data terminal of the D-FF 116, the D-FF 116 changes the output terminal Q to H at the falling timing of the next signal P1 supplied to the clock terminal φ. By inverting the time correction setting signal Sts to the terminal F8, the time correction setting signal Sts is outputted from the terminal F8.

As described above, when the crown 80 is in the second stage position, only the second stage control section 78 operates, and the time adjustment mode is set.

After the time adjustment operation is completed, when the crown 8 is pushed to the O position, the D-FF 116 is set to the second crown switch S.
At the falling timing of the next signal P1 when the ON signal of R2 is absent (no), the output terminal Q is inverted to LK and returns to normal mode, and the inverted signal from L to H of the output terminal Q is pulsed. After being made into a pulse by the circuit 117, it is outputted as a modified end pulse Pnd from the terminal F7 via the OR gate 115.

The above is the configuration and operation of the control signal generation circuit 75, and FIG. 6 will be explained again.

79 is a switching control circuit having input terminals G, -G, and output terminals H8-H8;

is the mode selection pulse Pcd, the terminal G2 is the time adjustment setting signal S t s, and the terminal G is the AND gate 80.
The year setting signal Sys is sent through the terminal G4, and the month setting signal S is sent to the terminal G4.
1 signal P1 is input to m s and terminal G.

Also, the output terminal H1 is the second selection signal Ssd, and the terminal H
2 outputs a year selection signal 5yci, and a terminal H3 outputs a force selection signal Smd, which are supplied to selection terminals B, , B3, and B4 of the data switching circuit 67.

Next, the specific configuration of the switching control circuit 79 will be explained with reference to FIG.

Case 9 Figure V Suit De 1? rl191 is a toggle type flip-flop (hereinafter referred to as T-FF) and an AND gate 122
Together, they constitute a well-known ternary counter 126.

125 and 126 are OR gates for supplying a forced designation signal to the ternary counter 126, and the operation of the ternary counter 123 will be explained below.

Now, considering the case where each setting signal from the control signal generation circuit 75 is not supplied to the terminals 02 to G4 (normal mode), the set terminal 81 of the T-FFt20, the reset terminal R1, and the set terminal S2 of the T-FF121 , all reset terminals R2 are set to L, so forced designation is not performed. In this state, the real mode selection pulse Pcd is supplied from the terminal G1 to the terminal φ of the T-FF 120 via the OR gate 127. performs a counting operation, inverts the output of the output terminal 122 of the T-FF 120.121 to H, and outputs the output of the T-FF through the OR gate 125.
Configure a ternary counter by resetting 120.121.

Next, in the forced designation operation, the time correction setting signal St is sent to the terminal G2.
When s is supplied, T-FF 120 and 121 are always reset and terminals Q+ and Q are connected, and T-FF 120 is reset, and T-FF 121 is reset and terminals Ql and Q- are connected.
When the month setting signal Sms is supplied to the terminal G, the T-FF 120 is reset, the T-FF 121 is set, and the terminals Q1 and Q2 are forcibly designated to T and H, respectively.

124 is a decoder that converts the output of the ternary counter 123 into each selection signal, and the two hexagonal terminals I1 and I2 are
Output terminal Q of the T-Fl 120° 121, respectively.
,Q,! is connected and outputs the terminal signal Ssd, and the terminal Q
When 1 and Q are HL, year selection signal Sy is output from output terminal 02.
d, and when terminals Q1 and Q2 are LH, output terminal 0.
A force selection signal S m d is output.

128 is a timer for shifting from the year display mode to the month display mode shown in FIG.
When the year selection signal Syd is output to the terminal 02 of the terminal 02, the reset is released via the inverter 129, and the timer 128 performs a counting operation using the 1 signal P1 supplied from the terminal G5 as a clock, and the timer 128 counts for 5 seconds. The output signal generated from the output terminal Q when the
The ternary counter 126 is incremented by supplying the signal to the T-FF 120 via the ternary counter 126.

The above is the configuration and operation of the switching control circuit 79, and the explanation will be returned to FIG. 6 again.

81 is an R8-FF, which is set by the initial pulse P5s from the control signal generating circuit 75 to output an H second return zero signal Sk to the output terminal Q.

is outputted and supplied to the terminal B1 of the data switching circuit 67, and the AND gate 8o is turned off.

Reference numeral 82 denotes a pulse generation circuit, which changes the second day board switch S H2 connected via an inverter 86 from ON to OFF.
The signal changed to F is pulsed and a carry pulse Pku is output.

84.85 is an AND gate to prohibit carry, 86.87
is an OR gate.

Reference numeral 90 is a specific circuit that determines that the display content of the date board 7 is from the 29th to the 31st and outputs month-end correction data, and this circuit also determines non-existent dates in the calendar function. It also functions as a non-existent date detection circuit that outputs the corrected data, and the input terminal is ~
L, and a group of output terminals M, into which the year information signal Dy and month information signal Dm are input, and terminals Ll and L2 are connected to the first date board switch S I-(1, second date board switch S
A correction end pulse Pnd is input to the signal R2, a correction end pulse Pnd is input to the terminal L3, and a zero detection signal Sok output from a month-end correction circuit to be described later is input to the terminal L4. A date plate correction signal Dhd as correction data is output. The specific configuration of the specific day determination circuit 90 will be explained with reference to FIG.

In FIG. 10, 140 is a month-end decoder which inputs the year information signal Dy from the year counter 66 and the month information Dm from the month counter 62, and based on the combination of year and month, month-end data DE2. ~ Output DEso. 141 is a date decoder which inputs the signals of the first date plate switch SRI and second date plate switch SR2, and based on the combination explained in FIG. 5, date data D20, D, o,
D3. Output.

142 is a modified days decoder, AND gate 1
4 6, 1 4 4, 1 4 5 and
The month-end decoder 140 is configured with an OR gate 146.147 and the month-end data DE2.
~DE3. and date data D2 from date decoder 141
1 to each output of AND gate 146.144.145 by decoding Q~D31 as input of each gate.
Number of days data for day correction D1.2 Number of days data D for day correction
2. Output each corrected number of days data D for 3-day correction. That is, to explain the daily revised data D1, the month-end data D E input to the OR gate 146
By decoding 28~D E so and date data D31 by A, ND gate 146, the last day of the month is the 28th,
In the case of a month with 29th and 30th days, the 31st is a non-existent date (
(non-existent date), this means fast-forwarding by one day and moving it to the long-awaited 1st.

Similarly, when the last day of the month is the 28th or 29th, the 2nd day corrected data D2 is a non-existent day, so the 30th is a non-existent day, so the 2nd day corrected data D2 is fast-forwarded by 2 days and moved to the 1st day, and then the 3rd day corrected data D.
means that if the last day of the month is the 28th, the 29th is a non-existent day, so a fast-forward correction of 3 days is made to move it to the 1st day.

Reference numeral 150 denotes a preset pulse generation circuit, which is composed of a date detection circuit 151, an AND gate 152, and an OR gate 156.

The date detection circuit 151 is connected to the first date switch SHI.
and the first date plate switch SH2, detect the moment when each switch switches (when the date plate is advanced and the date changes), output the date detection pulse Pcd, and supply it to the AND gate 152. If the zero detection signal Sok is not supplied to L4, the input ND gate 152 is turned OFF and therefore becomes invalid. That is, as will be described later, the zero detection signal Sok is always supplied while the date plate 7 is not being corrected for fast forwarding.
It is configured such that it can pass through the gate 152 and is blocked by the AND gate 152 only during fast-forward correction of the date plate 7.

Then, the daily detection pulse P that passed through the AND gate 152
The correction end pulse Pnd supplied to the terminal c d
passes through the OR gate 156 and becomes the preset pulse Pp.
It becomes s. Furthermore, the number of days data Dt, D2 from the corrected number of days decoder 142 is
, Ds as one input, AND gate 156.154
．． 155, but after passing through an AND gate which is turned on according to the designation of the number of days data, it is outputted as a date plate correction signal h d from the output terminal group M.

In other words, the preset pulse generating circuit 150 operates during normal operation when switching the date plate 7 linked to the clock train, and when correcting the calendar or time by pulling out the crown 8.
When correction is completed and Lieez 8 is pressed, a preset pulse Pps is generated respectively, but while the correction days data is not output to the correction days decoder 142 (the date display is on the 29th, 30th, 31st). If the date is a date other than the specific date), no output is generated from the output terminal group M because it is blocked by AND gates 156 to 155; In the case of D3, it passes through the AND gate 154, and in the case of D3, it passes through the A N D gate 155, and the date plate correction signal D is output from the output terminal group M.
Output as hd. The AND gate 152 blocks the preset pulse Pps generated by the operation of the date switch while the calendar mechanism is performing fast-forward correction according to the date correction signal Dhd output from the specific day determination circuit 90. ing.

The above is an explanation of the configuration and operation of the specific day determination circuit 90, and the explanation will be returned to FIG. 6 again.

Reference numeral 91 denotes a month-end correction circuit for fast-forwarding the date plate 7 based on the date plate correction signal Dhd output from the specific day determination circuit 90, and fast-forwarding the hour hand 2 and minute hand 6 by 24 hours. It is composed of a 24H counter 92 for performing correction, a day counter 93 for counting the number of days of correction, an AND gate 94, and an inverter 95.

In the above configuration, the 24H counter 92 is a 4320 up counter corresponding to the number of pulses for driving the hour hand 2 and minute hand 3 for 24 hours, which are driven at a 20 second cycle, and the day counter 93 is a 4320 up counter corresponding to the number of pulses for driving the hour hand 2 and minute hand 3 for 24 hours, and the day counter 93 is Since it is 3 days, 3
This is a decimal down counter, which is preset by the date plate correction signal Dhd (maximum 3) from the specific day determination circuit 90 and performs down counting by the carry signal from the 24H counter 92.

A case will be described in which the above-mentioned month-end correction circuit 91 makes corrections for three days on the end-of-October correction.

First, as an initial condition, when the 24H counter 92 and the day counter 96 are both reset, the H zero detection signal Sok is output from the terminal 0 of the day counter 96, so the AND gate 9
4 is in the OFF state, and the hour/minute hand rapid transmission signal Pc2 is blocked. In this state, the date counter 9 receives the date plate correction signal Dhd corresponding to three days from the specific day determination circuit 90.
6, the data 3 is set in the day counter 9B, and the zero detection signal S of the terminal O is set.
OK is reversed to L. As a result, the AND gate 94 is turned on via the inverter 95, and the hour and minute hand rapid transmission signal Pc2 passing through the wAND gate 94 is transmitted to the hour hand 2 and minute hand 6.
is fast-forwarded at a high speed of 1281]z, and the 24H counter 92 starts counting.

When the 24H counter 92 finishes counting 4320, it outputs a carry signal from the terminal Q and the day counter 92 outputs a carry signal from the terminal Q.
Subtract 3 by one and start counting again. By repeating the above operation, when the subtraction of the preset data 30 of the day counter 9B is completed, the H zero detection signal Sok is outputted to the terminal O again, and the AND gate 94 is turned off.
F, the hour and minute hands early transmission signal Pc2 is blocked, and the month-end adjustment operation is completed. As a result of the above operation, the hour and minute hand early transmission signal Pc2 of 4320X3=12960 is output from the month-end correction circuit 91, thereby fast forwarding the hour hand 2 and minute hand °6 by three days, and the date plate 7 linked to this gear train is moved by three days. This will be corrected accordingly.

The above is the configuration and operation of the month-end correction circuit 91.
Return to figure description.

Reference numeral 200 denotes a power-on circuit, which outputs a power-on pulse PSO when converting the battery of the electronic timepiece 1, supplies it to the reset terminals of the month counter 62 and year counter 63, and the terminal E6 of the control signal generation circuit 75, and also outputs the power-on pulse PSO when converting the battery of the electronic timepiece 1. The signal is supplied to the terminal G2 of the switching control circuit 79 via the gate 210. 201 is the month-end modification prohibition circuit, R8-FF20
2, an AND gate 203, and an inverter 204. The R8-FF 202 receives the power-on pulse Pso from the power-on circuit 200 as a set input, and also receives the initial pulse Pso from the control signal generation circuit 75.
24 of the month-end correction circuit 91 by the month-end correction prohibition signal Sgk outputted from the output terminal Q.
By holding the H counter 92 and the day counter 93 in a reset state and turning off the AND gate 206 via the inverter 204, supply of the hour/minute hand early transmission signal Pc2 to the month end correction circuit 91 is prevented.

The month-end correction prohibition circuit 201 prohibits the operation of the month-end correction circuit 91 when replacing the battery, and restarts the operation of the month-end correction circuit 91 in response to a signal (for example, initial pulse P6s) for performing automatic calendar loading. . In other words, if the automatic calendar is not set when replacing the battery of the electronic clock 1, the month-end correction circuit 9
In order to prevent the calendar from going awry due to the malfunction in step 1,
The operation of the month-end correction circuit 91 is prohibited and the calendar is used as a normal manually corrected calendar.

205 and 206 are pulse motor drive circuits, 207 is the first
The pulse motor 208 is a second pulse motor, and the motor drive circuit 205 inputs the hour and minute hand drive signal Pmk and the hour and minute hand rapid transmission signal Pc2 supplied via an OR gate 209 and converts them into motor drive signals. After that, it is supplied to the first pulse motor 207 to drive the hour hand 2 and minute hand 6, and also to drive the date plate 7 via the wheel train. The motor drive circuit 206 also inputs the fast transmission signal Pc that passes through the AND gate 69, converts it into a motor drive signal, and supplies it to the second pulse motor 208 to drive the second hand 4.

Next, the circuit operation of the electronic timepiece 1 having the above configuration will be explained.

First, let's consider the case where a new battery is inserted and the electronic clock 1 is started from a state in which all information has been lost due to the life of the battery reaching zero. , the state of all digital circuit systems is undefined and undefined.

From this state, the well-known power-on circuit 200 and the oscillation circuit 5
0 starts operation, the above-mentioned P- and T-pone circuits 2
A power-on pulse Pso is output from 00, and at the same time the month counter 62 and year counter 66 are reset, R8-
By setting FF202, month-end correction prohibition circuit 2
01 prevents the hour and minute hand early transmission signal Pc2 and becomes a month-end correction prohibited state.

Further, the power-on pulse Pso is supplied to the terminal E6 of the control signal generation circuit 75, so that the R8-F shown in FIG.
Terminal F for each output of the control signal generation circuit 75 by resetting F103 and D-FF111.116.

-F8 is all in a no-signal state.

Furthermore, the power-on pulse Pso is supplied to the terminal G2 of the switching control circuit 79, and as shown in FIG.
-FF120.121 is reset, and second selection signal Ssd is output from terminal H7.

As a result, the data switching circuit 67 supplied with the seconds selection signal Ssd to the terminal B2 enters the selection state of the seconds information signal Ds, and the coincidence detection circuit 68 selects the seconds information signal Ds and the hand position information signal Dnp of the hand position counter 60. When the coincidence is detected, the fast transmission signal Pcl passing through the AND gate 69 is supplied to the motor drive circuit 206, and the second hand 4 is fast-forwarded to the position corresponding to the count of the second counter 61.

In the above operation, the second information signal Ds and the hand position information signal Dn
When p matches, the AND gate 69 is activated by the match signal Sc.
is turned OFF, the second hand 4 temporarily stops, but as mentioned above (as the oscillation circuit 50 operates, the fast transmission signal Pc1 is output from the front-stage frequency divider circuit 51, and the 1-speed signal is output from the rear-stage frequency divider circuit 52).
Signal number P1, 20 second signal P20, drive signal generation circuit 53
Since the hour and minute hand drive signals Pmk are outputted from the clocks, the second counter 61 inputting one signal number P1 counts the next one signal number P1 and increments the count by one.

As a result, the second information signal Ds and the hand position information signal Dnp do not match, so the coincidence signal S from the coincidence detection circuit 68 is
c is inverted to L, the AND gate 69 is turned on again, and the fast transmission signal Pc passes through. However, as soon as one pulse of rapid transmission signal Pc passes and causes the second hand 4 to move one step, and at the same time causes the count contents of the hand position counter 60 to count up by one, the second information signal Ds and the hand position information signal D
Since np matches again, the AND gate 69 is turned off by the match signal Sc.

Then, by repeating the above operation every time the second counter 61 is incremented by one signal P1, the second hand 4 is advanced in one-second steps in accordance with the count contents of the second counter 61, thereby achieving the state shown in FIG. 2 (a). Displays the seconds indicated.

Further, the hour and minute hand drive signal P from the drive signal generation circuit 56
The m k Itt signal is supplied to the motor drive circuit 205 through the OR gate 209 and drives the hour hand 2 and minute hand 6 at a 20-second cycle, thereby displaying the time in the two-hand mode shown in FIG. 1. As mentioned above, when a new battery is inserted, the hour hand 2, minute hand 6, and second hand 4 display the time in hours, minutes, and seconds, but the time is not corrected because the time is not corrected.

Next, the initial setting of the second hand 4 and the year information setting operation when the second hand 4 is in the O stage position will be explained.

As explained in FIG. 2(B), when the second hand 4 reaches the O seconds position, if the push button 9 is kept pressed for 5 seconds, the control signal generation circuit will be activated after 5 seconds by the timer operation of the 0 stage control section 76 shown in FIG. An initial pulse p5s is output from terminal F2 of 75 and supplied to the preset terminal PR of the hand position counter 60 and second counter 61, thereby presetting both counters to 5, and further setting R8-FF8t to the output terminal Q. By outputting the second hand zero signal Sko, the terminal B1 of the data switching circuit 67 is designated and at the same time
Turn off the gate 80. As a result, as explained in FIG. 2(b), while the second hand 4 moves to the 5 second position while the pushbutton 9 is operated, the hand position counter 60 and second counter 61 are preset to 5. When the contents match, the second hand 4 is initialized. At the same time, the data switching circuit 67 supplied with the second hand zero signal Sko to the terminal B1 enters the zero memory 66 selection state (initial setting mode), and the coincidence detection circuit 68 selects the zero information signal Do and the hand position information signal Dnp. As a result of the comparison, the second hand 4 passes through the AND gate 69.
c, and when the second hand 4 reaches the 0 second position (OF mark position), the hand position information signal Dnp of the hand position counter 60 matches the zero information signal Do (becomes 0), and a coincidence is detected. A coincidence signal Sc is generated from the circuit 68, and the AND gate 69 is turned off, thereby stopping the second hand 4 at the OF position. Also, the coincidence signal Sc is R8-
R8-FF8 by being supplied to terminal R of FF81
1 is reset, and by inverting the second hand zero signal Sko that was output to the terminal Q to L, the AND gate 80
is returned to ON, and the initial setting mode of the data switching circuit 67 is canceled. The switching control circuit 79 outputs the year selection signal syc+ from the terminal H2 by being forcibly designated by the year setting signal Sys passing through the ON AND gate 80, and the data switching circuit 67 is switched on as shown in FIG. ) By switching to the year display mode shown in
The year position information signal Dyp is selected.

In this state, when the pushbutton switch SPB is operated, the year correction pulse output from terminal F4 of the control signal generation circuit 75 passes through the OR gate 87 and is supplied to the year counter 63, thereby changing the year information correction setting. What is done is as described above.

By setting the above year information, the year counter 6
The year no setting signal S of L was output to the zero detection terminal O of 6.
yn is inverted to H and the AND gate 106 shown in FIG.
．． By turning ON 116, the mode selection pulse Pcd can be output from the terminal F by the push button 7.

The above is the initial setting operation and year setting operation at the O position of IJ, -8. This year display mode is activated by leaving it for 3 seconds after setting the year. The timer 102 returns to the monitor mode and outputs a return pulse Pr to forcibly designate the switching control circuit 79, thereby setting the seconds display mode. And this monitor
In the mode, the mode selection pulse Pcd output by operating the pushbutton switch SPH is supplied to the terminal G1 of the switching control circuit 79, so that the ternary counter 126 shown in FIG. 9 sequentially increments. As a result, the monitoring operation shown in FIG. 3 is performed.

In addition, the initial pulse P, sfJ″-R8-FF20
2 and returns the AND gate 203 to ON, the month-end correction prohibition circuit 201 determines that the automatic calendar has been set and is released.

Next, the month setting operation will be explained. The above Leeds 8 to 1
Control signal generation circuit 750 for pulling out to stage position 1st stage control circuit 7
7 operates, terminal F.

A force setting signal Sms is generated from the switching control circuit 79.
By forcibly specifying , the data switching circuit 67 enters a state in which the direction position information signal D m p is selected, and the function display section 5 enters the month display mode as shown in FIG. 2).

Further, the force setting signal Sms is set to the AND gate 84.85.
Month counter 62 and year counter 63 by FF
carry is prohibited.

As described above, when the push button 7 is operated in this state, the month correction pulse Pm outputted from the terminal F of the control signal generation circuit 75 passes through the OR gate 86 and performs the correction setting of the month counter 62. This setting operation can be monitored using the second hand 4 as shown in Fig. 2).

After the above force setting operation is completed, rotate the crown 8 to set the date on the date plate 7. After completing the setting of the month and day, push the crown 8 to the 0 position, and the signal will be output from the terminal F7 of the control signal generation circuit 75. The correction end pulse Pnd is sent to the terminal of the specific date determination circuit 90.

is supplied to

As a result, the specific date determination circuit 90 operates as a non-existence mound detection circuit, and as explained in FIG. , detects whether or not it is a non-existent molar from the year information signal Dy and month information signal Dm set in the year and month setting operation, and if it is a non-existent molar, corrects the non-existent date from the terminal group M. A date plate correction signal Dhd is supplied to the month-end correction circuit 91 as a signal.

Then, by driving the first pulse motor 207 by the hour/minute early transmission signal Pc2 outputted from the month-end correction circuit 91, the display on the date plate 7 is fast-forwarded to the 1st in the distant past, and the non-existent date is set. warn you of this. and,
This warning action allows the wearer to reset the correct date.

Next, the time adjustment operation will be explained.

When the second stage 8 is pulled out to the second stage position, only the second stage control section 78 of the control signal generating circuit 75 becomes operational and outputs the time correction setting signal Sts from the terminal F8. Then, by supplying this time correction setting signal Sts, the latter-stage frequency dividing circuit 5
2 and the drive signal generation circuit 56 are reset, and the switching control circuit 79 outputs the seconds selection signal Ssd of H from the terminal H1 by forced specification of the terminal G, and selects the data switching circuit 67 to the seconds display mode. . In this state, by rotating the crown 8, the hour hand 2,
As mentioned above, the minute hand 3 can be adjusted to the current time. After the time adjustment operation is completed, when the crown 8 is pushed to the O position, the time adjustment setting signal Sts from the control signal generation circuit 75 returns to L. This resets the subsequent frequency division circuit 52 and the drive signal generation circuit 56. is released and resumes operation, and after about 1 second, 1 signal P1 is issued, and then 20
After a second, the hour and minute hand drive signal P m k is output. In addition, when the crown returns to the 800th position, the correction end pulse Pnd is output from the terminal F7 of the control signal generation circuit 75 in the same way as when returning from the force setting mode, so that the non-existing date correction operation is performed. This is to correct the non-existent date that occurs when the date plate 7 is shifted in conjunction with the mechanical pointer correction operation.

With the above, the series of correction setting operations is completed, and the electronic timepiece 1 starts operating.

That is, the hour and minute hand drive signal Pmk output from the drive signal generation circuit 56 causes the hour hand 2 and minute hand 6 to display the time, and the date dial 7 is advanced by one gear every 24 hours via the date wheel 33, thereby displaying the date. I do. At the end of each month, the protrusion 7b of the date plate 7 engages with the first date plate switch SHI and the second date plate switch SH2, thereby generating the date signal shown in FIG. 90. As a result, the specific day determination circuit 90
As explained in FIG. 0, the month-end correction circuit 91 determines the last day of each month and supplies the white board correction signal Dhd corresponding to the number of days to be corrected at the end of the month to the month-end correction circuit 91. Hour and minute hand rapid transmission signal Pc2 corresponding to
By outputting and driving the first pulse motor 207, the display on the date board 7 shifts to the 1st, and the end of the month correction operation is completed.

When the display on the date board 7 changes from the 31st to the 1st due to the above operation, that is, the second date board switch SH2 changes from ON to OFF.
The signal changed to FF is made into a carry pulse Pku by the pulse generator 82, and the month counter 62 is counted up to increment the month information signal Dm one way. Furthermore, when the month information signal Dm changes from December to January due to the above carry operation, the month counter 62 outputs a carry pulse, the year counter 63 is counted up, and the year information signal Dy
By incrementing the calendar by one year, each calendar information can be maintained and the end of each month can be corrected.

Furthermore, the function display section 5 is in the seconds display mode shown in FIG. 2 (a) by the designation of the time adjustment mode, but if the push button 9 is operated in this state, the display as shown in FIG.
You can monitor the year display mode and set the month display mode.

The above is the normal operation when the automatic calendar is set.Next, the non-setting operation when the automatic calendar is not set will be explained.

That is, by inserting a new battery, the power-on circuit 200 generates a power-on pulse Ps.

is output, the month-end correction prohibition circuit 201 is set, and the year counter 66 is reset. As mentioned above, the supply of the hour/minute hand early transmission signal Pc2 to the month-end correction circuit 91 is blocked, and the correction signal generation circuit 75 is Terminal E
Since the year no setting signal Syn supplied to the terminal 5 is L, the 0 stage control section 76 and the 1 stage control section 77 shown in FIG.
When the D gate 106.1t3 is turned off, it enters a non-operating state and is in a dead mode. If the initial setting operation (shown in FIG. 2 (b)) is not performed by operating the push button for 905 seconds from this state, the control signal generation circuit 75 will remain in the insensitive mode, and in this state, the push button 9 will not function. It does not perform any functions. Another year no setting signal Syn
is ANDed via inverter 211 and OR gate 210
By turning off the gates 84 and 85, the operation of the month counter 62 and year counter 63 by the carry signal Pku is prohibited.

Furthermore, since the blocking state of the month-end correction prohibition circuit 201 is not released, the hour and minute hand early transmission signal Pc is not supplied to the month-end correction circuit 91, and the automatic calendar function remains in a locked state.

However, even in the above automatic calendar function disabled state, the date can be corrected using the executive crown 80 and the hour and minute hands can be corrected by pulling the crown to two positions, and the function display section 5 can be controlled by the switching control circuit 79 by the power-on pulse is shown in Figure 2 (
Since the seconds display mode shown in b) is forcibly specified, the hour hand 2, minute hand 3, and second hand 4 will display the time, and the date dial 7 will display the calendar, but the date plate at the end of the month will not be automatically corrected. It is necessary to perform manual correction at the end of the month by pulling crown 8 to the first click as before.

FIG. 7 is a block diagram showing a specific example of the year counter 66 shown in FIG. 300, 301, and 302 are three T-FFs having set and reset functions, and a counter 60 that operates in quaternary and quinary by being connected as feedback.
8.

603 is 3 manpower each of the above T-FF300.302
This is an AND gate which detects that the count of the counter 608 reaches 5 by connecting the terminal Q of the T-F 301 and the terminal QK of the T-F 301 and outputs a reset signal P5r. AND gate 304, 605 and inverter 6
06 constitutes a step number switching circuit 610 for switching the counter 608 between quaternary and quinary in accordance with the year setting signal Sys supplied from terminal S.

611 is 3 manpower each of the above T-FF300.301
．． This is an AND gate that is connected to the terminal Q of the counter 602 to detect that the count of the counter 608 becomes 0 and outputs the year no setting signal Syn.

Next, the operation of the year counter 66 having the above configuration will be explained.

First, 4 by the counter 308 and the step number switching circuit 310.
The decimal and quinary counter operations will be explained.

The counter 608 has a basic configuration of an octal digit from 0 to 7 using a clock supplied from the terminal φ, and during this counter operation, the AND gate 606 detects 5 and outputs a reset signal P5r. By switching the step number switching circuit 610 between resetting 308 to 0 and resetting it to 1, the counter is switched between a quaternary counter and a quinary counter.

That is, when the year setting signal Sys is L (normal operation), the AND gate 305 is turned on, so the reset signal Ps
r set T-FF300, T-FF301.602
By resetting , the counter 308 is reset to 1 and becomes a counter.

Also, when the year setting signal Sys is H (year setting mode), A
Since the ND gate 304 is turned on, the reset signal P5r
is a T-F that resets the counter 608 to 0 by resetting all T-FFs 300, 301, and 602.
By resetting all F300.601.602, the count content of the counter 308 becomes O, and AN
An L year no setting signal S is sent to terminal 0 via the D gate 611.
yn is output.

Also, since the year setting signal Sys to the terminal S is L, the step number switching circuit 610 turns off the AND gate 604 and A
The ND gate 305 is turned on, and the T-
The year information signal output from each terminal Q of the FF 300, 601, and 602 is O.

In this state, as mentioned above, the L year no setting signal Sy
n causes the control signal generation circuit 75 to enter the dead mode,
Also, since the AND gates 84 and 85 are OFF, the automatic calendar function is disabled. Next, when the initial setting operation is performed by continuous operation of the pushbutton 9 from this state, the year setting signal Sys of H is supplied to the terminal S of the year counter 66, and the AND gate 604 of the step number switching circuit 610 is
N, and the counter 608 is made into a quinary counter. Then, by operating the push button 9, the year correction pulse py is supplied as a clock to the terminal φ, and the year information signal which is the output of the counter 608 is used to display each year mark as shown in FIG. 2(C). They correspond to each other.

In the above year setting mode, set the counter 308 to O (
As described above, when the OF stage is set, the year no setting signal Syn becomes L and the automatic calendar function is prohibited. However, if a setting other than O is made (setting the current year), the timer operates after the year setting is completed, and the year setting signal Sy
When s returns to L, the step number switching circuit 310 changes to A.
The ND gate 605 is turned ON and the counter 308 is switched to 4-base.

A carry signal from the month counter 62 generated by the operation of the date plate 7 is supplied to the terminal φ. Only the year marks Yl, Y2, Y3, and Y4 shown in FIG.
will not be displayed.

FIG. 11 shows another embodiment of the month-end correction prohibition circuit 201 shown in FIG.
The year counter 63 uses the year no setting signal Sys as a control signal to block the hour/minute hand rapid transmission signal Pc2.

〔Effect of the invention〕

As described above, in the present invention, a non-existing molar detection circuit is provided, and the non-existing molar detection circuit is operated by the crown correction end signal, so that if the date plate is mistakenly set to a non-existent molar, By fast forwarding the white board by the first day of the next month when the crown is pushed in, it is possible to warn the wearer of incorrect settings, and the wearer can reset the correct calendar information.

In addition, in this embodiment, the specific day determination circuit in the automatic month-end correction system is also used as the non-existent mortar detection circuit, which makes it possible to greatly simplify the configuration. Although the result was that the date plate was fast-forwarded by up to three days, the present invention is not limited to this, and by configuring the missing mound detection circuit separately, the warning operation can be fast-forwarded by only one day on the date plate. Furthermore, it is also possible to issue a warning using the modulation operation of the second hand.

[Brief explanation of the drawing]

The drawings all show embodiments of the present invention, and FIG. 1 is a front view of an electronic watch, and FIGS.
All are front views showing each display state of the function display section, Figure 3 is a mode selection diagram showing each selection mode of the function display section, and Figure 4 is a front view showing each display state of the function display section.
Figure 5 is a plan view showing the mechanical configuration of the electronic watch, Figure 5 is a time chart showing the operation of the date switch, Figure 6 is a block diagram of the electronic watch, Figure 7 is a block diagram of the year counter - Figure 8. 9 is a block diagram of the control signal generation circuit, FIG. 9 is a block diagram of the switching control circuit, FIG. 10 is a block diagram of the specific date determination circuit, and FIG. 11 is a block diagram showing another embodiment of the month-end correction prohibition circuit. FIG. 12 is a waveform diagram of FIG. 6. 1... Electronic clock, 5... Function display section, 7... Date plate, 75... Control signal generation circuit, 70... Hand position switching circuit, 79...Switching control circuit, 90...Specific date judgment circuit, 91...Month-end correction circuit, 201...Month-end correction prohibition circuit . Figure 1 Figure 3 Figure 4 Figure 5
111-Ko--Yu-1-Ko'-111'-111'CU) SHI ON (ha) S
H2ON Fig. 7 Fig. 11 Fig. 8 FL Fig. 9 Fig. 10 ``90 Dictionary 4''

Claims (2)

[Claims] (1) A pointer for displaying the time, a date display member for displaying the date, a month information storage means for storing the current month, and the display content of the date display member is from the 29th to the 31st. a month-end correction means for correcting the end of the month in accordance with the information in the month information storage means and the information in the specific day judgment means; and a manual correction for manually correcting the date display member. In an electronic clock equipped with means,
A non-existence day detection circuit is provided for inputting month information from the month information storage means, specific day information from the specific day determination means, and a manual correction end signal from the manual correction means, and the month-end correction means detects non-existence days. An electronic timepiece with a calendar, characterized in that a warning operation is performed by driving the date display member according to information from a detection circuit. (2) An electronic timepiece with a calendar, characterized in that a specific date determining circuit constituting the specific date determining means according to claim 1 also serves as the non-existent date detecting circuit.