JPS63214018A - Hysteresis generating circuit - Google Patents

Abstract

PURPOSE:To obtain a stable hysteresis characteristic while two threshold values are made constant regardless of fluctuation of a power supply voltage by combining 1st and 2nd current comparator means. CONSTITUTION:A hysteresis generating circuit consists of a voltage/current converter 1, the 1st and 2nd current comparator means 2, 3, and a constant current source 4. The 1st current comparator means 2 compares an output current I1 of a voltage/current converter 1 with an output current I2 of the 2nd current comparator means 3, and a current I3 is outputted as I3=AX(I1-I2) (A is a positive integer) in case of I1>I2 and as I3=0 in case of I1<=I2. The 2nd current comparator means 3 compares the output current I3 with the output current Iref of the constant current source 4, and outputs a current I2 as I2= BX(Iref-I3) (B is a positive integer) in case of Iref>I3, and I2=0 in case of Iref<=I3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit for obtaining a current output having hysteresis characteristics with respect to an input voltage.

[Conventional technology]

FIG. 4 shows such a conventional circuit, and FIG. 5 shows its characteristics.

When the input voltage VIN is smaller than the first reference voltage Vat generated by the reference voltage generation circuit 101, the current mirror circuit 103 is turned off because the transistor Q1 that constitutes the differential operation type voltage comparator 102 is turned off. Constituting transistor Q3. Q4. No base current flows through Q6, and each transistor is off. On the other hand, transistor Q
Since transistor Q2 is on, the pace current of transistor Q5 flows and transistor Q5 is turned on. Therefore, the emitter-collector saturation voltage of transistor Q5 is set to V(t
If H(SAT), VSl is expressed as in equation (1).

In this state, the collector output current XOU of transistor Q6 is rOJ since transistor Q6 is off.
becomes. This corresponds to the region 3 in FIG.

Next, when KSVN becomes larger than VBI, transistor Q
1 is turned on, thus transistor Q3. Q4゜Q6
On the other hand, since transistor Q2 is turned off, transistor Q5 is also turned off. Thereby, the second reference voltage VSZ generated by the reference voltage generation circuit 1010 is expressed by equation (2).

At this time, the collector output voltage of transistor Q6 is 1Iot
When it is assumed that the pace current of each transistor can be ignored, or when β is sufficiently large, n becomes equal to the current flowing through the transistor Q3, that is, the current I ref of the constant current source 104 due to the current mirror characteristic. This corresponds to the area marked ■ in FIG.

Then, when VIN started to fall to a high level,
Transistor Q1, which has been on, turns off when VXN becomes smaller than vB2. When MIN becomes smaller than vB2, transistor Ql again.

Q3. Q4 is turned off and transistor Q2. Q5 is turned on, so the voltage generated by the reference voltage generation circuit 104 is vB.
, the output current 10UT also becomes "0".

This corresponds to the area marked ■ in FIG. In this way,
Hysteresis can be agglomerated.

[Problem that the invention seeks to solve]

In the embodiment described above, the two threshold voltages V81rvsz that define the hysteresis characteristics are basically obtained by resistor division of the power supply voltage vcc, so when the power supply voltage fluctuates, their values also change. , so it cannot be used and mourns when the power supply voltage fluctuates.

[Means for solving problems]

The hysteresis generating circuit of the present invention comprises a voltage-current converter 1, first and second current comparing means 2, 3, and a constant current source 4, as shown in FIG. The first current comparison means 2 compares the output current 1 of the current-voltage converter 1 with the output current I2 of the second current comparison means 3, and when 11)I, 13=AX(I+-I2 ) (A is a positive constant), I,
=≦When 2, outputs the current I3 such that l3=O, and the second
The current comparing means 3 compares the output current generator 3 with the output current Iref of the constant current source, and when Ir@4) I3, I2-BX(Iref I3) (B is a positive constant),
When Iref≦F3, the current becomes F2=0! Outputs 2.

[Effect]

■ When the input voltage vI is sufficiently high! , is small, so 1. does not flow (l5=O). Therefore, I□1
>Is holds, so a current of a predetermined value flows as step 2 (I2=BX(I□f-I3)=BXI,.

f).

■ Input voltage VIN increases and I1 becomes 12==BX
I. When f is exceeded, l3=AX(I.

-Work 2) flows. When Il slightly exceeds r2,
is greatly increased by A times its width, and as a result, since Iref≦3, it becomes I2-0.

That is, 1. is I 2! When B

■ In this state, if VXN becomes smaller, I.

As AXI decreases, the output current 3 of the first current comparison means 2 decreases according to the formula I, . . . =AXI.

And when Iref>Lv, I2-BX as I2
(Iref-1g) flows. When the factor 3 is slightly lower than Iref, the width of the factor 2 is greatly increased by B times, and as a result, I2 becomes 11, which means that K υN 13 ==Q.

That is, the output current 2 of the second current comparison means 3 is I
Returning to z=BXIref, it becomes.

In this way, a current output having hysteresis characteristics is obtained as I2.

〔Example〕

FIG. 2 is a circuit diagram showing one embodiment of the present invention.

In the same figure, transistors Q1 to Q3 and resistor R
The output current of the voltage-current converter 11 consisting of 1.
is the transistor Ql, assuming that the base currents of the transistors Q1 to Q3 are negligible.

The base-emitter voltage of Q2 is VBX1+v, respectively.
B12, resistance value rl of resistor R1, L=(VrN
VBxx-Vsxz>/rx where transistor QX
, the currents flowing through Q2 are almost equal, so VBB10=V
As BI2 = vax, I 1 = (VxN-2V
ax)/r 1 Also, the transistor Q6. Output current I of constant current source 14 consisting of Q7 and resistor R2゜R3
ref is the voltage between the base and emitter of transistor Q6 as vBx8, and the voltage between transistor Q6. Assuming that the base current of Q7 can be ignored, it can be expressed as follows.

Since the constant current Iref is obtained from vBis in this way, the influence of fluctuations in the current voltage VCC can be avoided.

Note that the emitter area of the transistor Q9 constituting the first current comparison circuit 12 is set to n2 times the emitter area of the transistor Q8.
The output current l0ut obtained as the collector current of 9 is
I for transistor Q8O collector current I41C. u
t=! The relationship is 12 X I 4. Also, the emitter area of transistor QiQ is n3 times the emitter area of transistor Q8, which is the collector current of transistor QIO! , has the relationship I 1 = n 3 X I 4. Similarly, the emitter area of the transistor Q5 constituting the second current comparison circuit 13 is set to be 1111 times the emitter area of the transistor Q4.

Here, the input voltage VIN is sufficiently small, so I
2 is limited by the value of 11, which is less than the value determined by I 2 ==+ n 3 Since Q5 was off, the result was 3-0. Therefore, it is expressed as l4=Iref l rout"nzXIref. This corresponds to the area .circlein. in FIG. 3.

vrN increases, l 1x H3Xl 4+△technique (Δ■
〉0), Δ is applied to the collector of transistor Q4.
Electrical current flows. At this time, since the emitter area of the transistor Q5, which forms the current mirror circuit together with the transistor Q4, is On1 times the emitter area of the transistor Q4, l3=nlXΔ■.
is decreased by I3. Then, engineering 2 is n 3 ×I
4, so it decreases by n1Xn3X, and work 2 and work 1
There was a positive feedback in the form of a further widening of the difference between the
−■r*fs Stable in the state of L=*l4=0. Therefore, at this time, l0ut=O (point 0 in Figure 3)
. The input voltage V'INI at this time is n 3 X I 4
Since vrN is = I 1, '-Vxy1
--XnsXVaxs+2VBz @111111@
Let it be expressed as (1). Even if VIN increases further, Il
Although the O value increases, the value of 3 does not exceed Iref,
This state continues. This corresponds to the area marked ■ in FIG.

From this state, VIN decreases, and work 3 = work ref-
When ΔI (Δ■>0), the collector current of transistor Q8 flows, and I4-ΔI, I2:n3XΔI
becomes. Therefore l3=nIX(11-Iz)=nt
X11-nl
There is positive feedback in the form of an increase in the value of I4.
Engineering r * f % I s = 0, I2:il + xl
It stabilizes in the state l@1 (point 0 in Figure 3). Since the input voltage vXN2 at this time is VIN where n1×11=11@1, it can be expressed as follows. This returns to the area ◯ in Fig. 3.

K like this, WIN-I. It is possible to provide hysteresis to the ut characteristic, but as is clear from equations (1) and (2), the two thresholds for hysteresis MIN
I and VIN2 are unrelated to V(1(+). Even if the value of the power supply voltage vCc changes, VINtT
VIN2 has the advantage of not changing.

〔Effect of the invention〕

According to the invention, the output current of the output current generator 1 of the current-voltage converter and the output current of the second current comparison means! 2, I 1>
When I 2, Is = A × (I1 Iz) (A is a positive constant), ■! Current when l5=O when ≦ 2 ■3
The output current 3 of the first comparison means is compared with the output current 1 ref of the constant current source, and when I 1 > I s, I 2 = B
r. f-I3) (B is a positive constant), and a second current comparison means that outputs the current I2 such that when Iref≦I3, the current I2 becomes 0, regardless of fluctuations in the power supply voltage. Since the two threshold values can be kept constant, stable hysteresis characteristics can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram for explaining the present invention in detail, FIG. 2 is a circuit diagram showing an embodiment of the present invention, FIG. 3 is a characteristic diagram thereof, and FIG. 4 is a circuit diagram showing a conventional example. FIG. 5 is a characteristic diagram thereof. 1.11...Voltage-current converter, 2,12...
First current comparison means, 3, 13... second current comparison means, 4, 14... constant current source.

Claims (1)

[Claims] It includes a voltage-current converter that converts an input voltage into a current, first and second current comparison means, and a constant current source, and the first current comparison means has an output current I_1 of the voltage-current converter and a constant current source. The output current I_2 of the second current comparison means is compared with the output current I_2.
When 1>I_2, I_3=A×(I_1-I_2)(A
is a positive constant), and the second current comparison means outputs the current I_3 such that I_3=0 when I_1≦I_2, and the second current comparison means outputs the output current I_3 of the first current comparison means and the output current I_ of the constant current source.
Hysteresis generation characterized by outputting current I_2 such that I_2=B×(I_r_e_f-I_3) (B is a positive constant) when I_r_e_f>I_3 and I_2=0 when I_r_e_f≦I_3. circuit.