JPS6321348B2 - - Google Patents
Info
- Publication number
- JPS6321348B2 JPS6321348B2 JP57180353A JP18035382A JPS6321348B2 JP S6321348 B2 JPS6321348 B2 JP S6321348B2 JP 57180353 A JP57180353 A JP 57180353A JP 18035382 A JP18035382 A JP 18035382A JP S6321348 B2 JPS6321348 B2 JP S6321348B2
- Authority
- JP
- Japan
- Prior art keywords
- groove
- growth layer
- etching
- growth
- protrusion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
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- H10P14/24—
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- H10P14/2925—
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- H10P14/3411—
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- H10P14/3451—
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- H10W10/031—
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- H10W10/30—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
- H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
Landscapes
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57180353A JPS5969943A (ja) | 1982-10-14 | 1982-10-14 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57180353A JPS5969943A (ja) | 1982-10-14 | 1982-10-14 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5969943A JPS5969943A (ja) | 1984-04-20 |
| JPS6321348B2 true JPS6321348B2 (enExample) | 1988-05-06 |
Family
ID=16081749
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57180353A Granted JPS5969943A (ja) | 1982-10-14 | 1982-10-14 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5969943A (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3356162B2 (ja) * | 1999-10-19 | 2002-12-09 | 株式会社デンソー | 半導体装置及びその製造方法 |
| JP5217118B2 (ja) * | 2006-06-09 | 2013-06-19 | 株式会社デンソー | 炭化珪素半導体装置の製造方法 |
| US8476676B2 (en) * | 2011-01-20 | 2013-07-02 | Alpha And Omega Semiconductor Incorporated | Trench poly ESD formation for trench MOS and SGT |
| JP6613610B2 (ja) | 2015-05-14 | 2019-12-04 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
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1982
- 1982-10-14 JP JP57180353A patent/JPS5969943A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5969943A (ja) | 1984-04-20 |
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