JPS63211416A - In-line system - Google Patents

Abstract

PURPOSE:To reduce the power consumption by transmitting a power source control signal to a file unit for backup, when the down of a main file is detected. CONSTITUTION:When a main file unit 1 becomes down, terminals 31-3n detect it and transmit a power source control signal to a file unit 2 for backup, and the file unit 2 for backup raises its own main power source. Thereafter, by the file unit 2 and each terminal 31-3n, a data transmission control is executed. Also, as for the file unit 2, when the main file unit 1 is executing the transmission control of the data with each terminal 31-3n, a supply of the power source is stopped, and during this time, a backup of a memory is executed by a battery for backup. When the battery voltage drops on the way, the main power source rises temporarily and the charge to the battery is executed. In such a way, the power consumption can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an in-line system in which two file units and a plurality of terminals are connected in-line.

[Conventional technology] Conventionally, in an inline system in which two file units and multiple terminals are connected inline,
One side of the file unit is connected to the line, and the other is disconnected from the line for backup purposes.If one file unit goes down, a buzzer or display will notify you, and one file unit can be disconnected from the line by manual switching. The other file unit was connected to the line for backup.

In addition, two file units were always powered on, and when one went down, it was automatically switched to the other.

[Problems to be Solved by the Invention] If one file unit is notified when it goes down and manually switches to the other file unit, there is a delay in switching, which takes time to recover from the downtime, resulting in a large loss to the system. There was a problem. Furthermore, even if automatic switching is possible, if two file units are constantly powered on, power consumption is large, and unused file units are always energized, resulting in shortened service life.

This invention was made to solve these problems, and it is possible to quickly switch to the backup file unit when the main file unit is down, and also to switch the power supply to the backup file unit at the time of backup. The purpose of the present invention is to provide an in-line system that can reduce power consumption and prevent shortening of the service life of the backup file unit, and can also reliably back up the power supply when the backup file unit is powered down.

[Means for Solving the Problems] This invention consists of a plurality of terminals that register and process product sales data and issue receipts, and a file unit that files the data processed by each terminal, which are connected inline. In an inline system, two file units are connected inline, one is used as the main file unit, and the other is used as a backup.The main file unit is equipped with a means to detect when it is down and disconnected from the line, and the backup file unit is , a memory backup battery, a voltage detection means for detecting a voltage drop of the battery, a charging means for turning on the main power supply for a certain period of time to charge the battery in response to the detection of the battery voltage drop by the voltage detection means; A power supply start-up means that starts up the main power supply in response to a power control signal from the terminal, and a transmission control that detects the start-up of the power by this power supply start-up means, connects itself to the line, and controls data transmission with each terminal. and each terminal is provided with means for detecting that the main file unit is down, and means for transmitting a power control signal to the backup file unit when the main file unit is detected as being down. be.

[Operation] In the present invention having such a configuration, when the main file unit goes down, it is disconnected from the line, and the terminal detects this and sends a power control signal to the backup file unit.

As a result, the backup file unit turns on its own main power supply. Thereafter, data transmission control is performed between the backup file unit and each terminal. Further, the power supply to the backup file unit is stopped when the main file unit is controlling data transmission with each terminal, and during this time, the memory is backed up by the backup battery. If the battery voltage drops during the process, the main power supply will temporarily turn on and charge the battery.

[Example] Embodiments of the present invention will be described below with reference to the drawings.

In Figure 1, 1 is the main file unit, 2 is the backup file unit, 31
．． 32.33,...3n are terminals. Each of the file units 1.2 and each of the terminals 31 to 3n are connected in-line by a transmission line 4. Also, from each terminal 31 to 3n, each file unit 1
．． 2 is the transmission line 5 of the power control signal RPCC.
1.52 are connected respectively.

As shown in FIG.
A ROM 12 stores program data for controlling various parts of the CPU 11, a RAM 13 includes a memory for storing data processed by the CPU 11, a counter constituting a timer, and the like. Along with the product code, RA has an area where unit price, product name, department code, etc. are set corresponding to this product code, and an area where cumulative sales items and sales amount are set.
An M file 14, a power supply control circuit 15 to be described later, a transmission controller for controlling data transmission to each terminal 31 to 3n, a -ra 16, and an I10 port 17 are provided.

A lamp 18 and a buzzer 19 are connected to the I10 boat 17.

The CPU 11, ROM 12, RAM 13 and RAM file 14 are connected via an address bus line 20°, a data bus line 21 and a control line 22. Further, the CPLJ 11 is connected to the transmission controller 16 and the I10 boat 17 via the data bus line 21 and control line 22.

A line connection/disconnection relay is housed in the transmission controller 16, and the relay is controlled by the CPU 11 to control the controller 16 to connect/disconnect the transmission line 4. Note that when disconnecting the line, the transmission lines 4 connected to the input terminals are short-circuited.

As shown in FIG. 3, each of the terminals 31 to 3n includes a CPU 31 constituting the main body of the control unit, a ROM 32 that stores program data etc. for this CPtJ 31 to control each part, and a ROM 32 that stores data processed by the CPLJ 31. A RAM 33 is equipped with a memory for storing data, a counter for configuring a timer, a registration memory for cumulatively registering data divided by department, transaction, etc., and a transmission controller 3 for controlling data transmission with each file unit 1゜2.
4, a printer/drawer controller 35, a display controller 36, and a keyboard controller 37 are provided.

The printer/drawer controller 35 is connected to a printer 38 for issuing receipts and printing a journal, and a drawer opening section 39 .
6 is connected to a display 40 that displays codes and amounts, as well as lamps to indicate business status, and a keyboard controller 37 is connected to a keyboard 41 for inputting product codes and the like.

The CPLJ 31, ROM 32, and RAM 33 are connected via an address bus line 42, a data bus line 43, and a control line 44. Also, the CP
U31 and each controller 34, 35, 36, 37 are connected via the data bus line 43 and control line 44.

The transmission controller 34 houses a relay for connecting and disconnecting the line, and the relay is controlled by the CPtJ 31 to control the transmission controller 34 to connect and disconnect from the transmission line 4. Note that when disconnecting the line, the transmission line 4 connected to the input terminal is short-circuited.

As shown in FIG. 4, the power supply control circuit 15 of each of the file units 1 and 2 connects an Ii source unit 52 to a commercial text streamer 50 via a main switch 51. This power supply unit 52 outputs a RESET signal at startup and also outputs a +5V voltage. The +5V voltage output terminal is also connected to a child terminal of a battery, which will be described later, via a diode 53 and a resistor 54.

Further, the primary winding of a transformer 56 is connected to the AC power source 50 via a sub switch 55. The input terminal of a full-wave rectifier circuit 57 is connected to the secondary winding of this transformer 56.
A smoothing capacitor 5 is connected to the output terminal of the full-wave rectifier circuit 57.
8 are connected.

The input terminal of a regulator 59 is connected to this smoothing capacitor 58, and the output terminal of the regulator 59 has a
A coil 64 of a relay 63 is connected through a parallel circuit of 1Il NPN type transistors 60°61.62. Note that a surge absorbing diode 65 is connected in parallel to the coil 64.

A normally open contact 66 of the relay 63 is connected in parallel to the main switch 51.

Further, a light emitting diode 68 is connected to the output terminal of the regulator 59 via a resistor 67. A main switch 69 is connected in parallel to this light emitting diode 68. The main switches 51, 69 are turned on and off in conjunction with each other.

Further, the output terminal of the regulator 59 is connected to a resistor 70 and a resistor 7.
1 and a series circuit with resistors 72 and 73 are connected, respectively, and the connection point between resistors 70 and 71 is connected to one input terminal of a first comparator 74, and the resistor 7
The connection point between 2 and 73 is connected to one input terminal of a second comparator 75. Furthermore, the regulator 59
The + side of the output terminal of is connected to the other input terminal of the first comparator 74 via a resistor 76. The other input terminal of this comparator 74 is also connected to the transmission line 51 (52) via a resistor 77.

The other input terminal of the second comparator 75 is connected to the resistor 7.
It is connected to the ten terminal of the battery 79 via the terminal 8. This battery 79 is for power backup and backs up the RAM 13 and RAM file 14 when the power is stopped.

The output terminal of the first comparator 74 is connected to the base of the transistor 6o via a resistor 80 and also to a three-state buffer 81. The output terminal of this buffer 81 is connected to the data bus line 21.

The output terminal of the second comparator 75 is connected to the base of the transistor 61 via a resistor 82 and to the D input terminal of a D-type flip-flop 83. The king input terminal of this flip-flop 83 is connected to the RE
A SET signal is input. The Q output terminal of this flip-flop 83 is connected to a three-state buffer 84. The output terminal of this buffer 84 is connected to the data bus line 21. Each of the three-state buffers 81 and 84 is driven and controlled by the CPU II.

The data bus line 43 is connected to a D-type flip-flop O-tube 85.
is connected to the D input terminal of the This flip flop 8
The output terminal of a gate circuit 86 is connected to the T input terminal of No. 5, and the output terminal of the gate circuit 86 is connected to the T input terminal of No.
signal and IOW signal are input. Further, the R (reset) input terminal of the flip-flop 85 has the RE
A SET signal is input.

The Q output terminal of this flip-flop 85 is connected to the base of the transistor 62 via a resistor 87.

Figures 6 and 7 are CPIJ of file unit 1.2.
FIG. 6 shows power-on processing, and FIG. 7 shows processing when a transmission error occurs.

That is, as shown in FIG.
1 and check whether the output is "1". If it is “1”, D of flip-flop 85
Input "1" to the input terminal. Then, program processing moves to the main program, and each terminal 3! -3n performs data transmission, etc. If it is "0", then the three-state buffer 84 is driven and it is checked whether its output is "1". If it is "1", "1" is input to the D input terminal of the flip-flop 85, and the RA
Set the time on the charging timer provided on M13. Then, this timer is counted down, and when the count value reaches "0", the output of the three-state buffer 84 is checked again, and if the output is "0", it is determined that charging of the battery 79 has been completed within a predetermined time. Then, “0” is input to the D input terminal of the flip-flop 85. Further, if the output is "1", it is determined that there is an abnormality in the battery because charging of the battery 79 cannot be completed within a predetermined time, and the lamp 18 and buzzer 19 notify the abnormality.

Also, as shown in Figure 7, when a transmission error occurs, it is first checked to see if a collision has occurred on the line, and if a collision has occurred, retransmission processing is performed, and if no collision has occurred, the data is retransmitted. It performs transmission, and if the result is the same again, it determines that the line is defective, turns off the line relay, and disconnects itself from the line. Note that in this case, a line failure may be immediately determined without performing data transmission again.

When the device is disconnected from the line, it then performs a self-loop test (self-diagnosis of the transmission control unit), and if any abnormalities are found, an error is detected. Also, if there is no abnormality, the line relay is turned on to connect itself to the line. Then, as shown in FIG. 5, a self-check command is sent to each terminal 31-3n via a dedicated self-check command line 100.

Figures 8 and 9 show CPLI3 of terminals 31 to 3n.
Fig. 8 shows the processing at the time of a transmission error, and Fig. 9 shows the self-check processing.

In other words, as shown in Figure 8, when a transmission error occurs, it is first checked to see if a collision has occurred on the line, and if a collision has occurred, retransmission processing is performed, and if no collision has occurred, the data is retransmitted. It performs transmission, and if the result is the same again, it determines that the line is defective, turns off the line relay, and disconnects itself from the line.

Note that in this case, a line failure may be immediately determined without performing data transmission again.

When the device is disconnected from the line, it then performs a self-loop test (self-diagnosis of the transmission control unit), and if any abnormalities are found, an error is detected. Also, if there is no abnormality, the line relay is turned on to connect itself to the line. Then, a timer for receiving self-check commands is set. If a self-check command is received before this timer times out, retransmission processing is performed after waiting for a certain period of time. If the self-check command is not received before the timer expires, it is determined that the other file unit is down, and the power control signal RPCC is transmitted to the other file unit.

Further, as shown in FIG. 9, when a self-check command is received at a terminal that is not transmitting data, it turns off the line relay and disconnects itself from the line. Next, a self-loop test (self-diagnosis of the transmission control unit) is performed, and if any abnormalities are found, an error is generated. Also, if there is no abnormality, the line relay is turned on to connect itself to the line.

In this embodiment with such a configuration, the main switch 51, 69 and the sub switch 55 of the main file unit 1 are
When turned on, the power supply unit 52 is connected to the AC power supply 50, and +5V voltage rises. At this time, RESE
A T signal is generated and the flip 70 knob 85 is reset. Further, the light emitting diode 68 remains in an extinguished state. When +5V voltage is applied, the CPU II sets the flip-flop 85 via the data path line 21, turns on the transistor 62, and operates the relay 63. As a result, the normally open contact 66 of the relay 63 is turned on, and even if the main switch 51 is subsequently turned off, the power is maintained in the on state.

Thus, the main switch 51 is turned off. At this time, the switch 69 is also turned off and the light emitting diode 68 lights up to indicate this. At this time, the backup file unit 2 also turns off the main switch 51 and turns on the sub switch 55.

That is, for the backup file unit 2, the power supply unit 52 is disconnected from the AC power supply 50, and only the regulator 59 is put into operation.

If a transmission error occurs in the main file unit 1 under such conditions, it is checked whether the error is due to line collision, a failure in its own transmission section, or a failure on the terminal side. In the event of a failure in its own transmission unit, an error is generated with the line disconnected. Further, if there is no line collision and its own transmission control unit is normal, the line is connected and a self-check command is sent to each terminal 31 to 3n.

On the other hand, when the terminal that was performing transmission with the main file unit 1 also detects a transmission error, it checks whether it is due to a line collision or a failure in its own transmission control section. Then, if there is no line collision at the terminal and its own transmission control unit is normal, the line is connected and the self-check command reception timer is set.

If the main file unit 1 is not down, the self-check command will be received before the timer times out, so in this case the terminal waits for a certain period of time and then performs the retransmission process. However, if main file unit 1 is down, the self-check command will not be received even if the timer times out, so the terminal will think that main file unit 1 will go down because this self-check command is not received within the specified time. It is determined that the file unit 2 is running, and the power control signal RPCC is transmitted to the other file unit 2 that is on standby as a backup.

When the power control signal RPCC is received from the terminal, the output of the comparator 74 in the backup file unit 2 becomes "1", that is, a high level, the transistor 60 is turned on, the relay 63 is operated, and its normally open contact 66 is turned on.

In this way, the power is turned on and power is supplied to the CPU 11 and other parts. Further, a RESET signal is generated to reset the flip-flop 85 to -H. CPU1
1 controls the three-state buffer 81 and reads its output. Since the output of this buffer 81 is "1", the CPU 11 sets and operates the flip-flop 85 via the data bus line 21 and control line 22, turns on the transistor 62 with the Q output, and turns on the relay 6.
The operating state of 3 is maintained. Thereafter, even if the power control signal RPCC from the terminal is turned off, the power-on state is maintained.

In this way, the backup file unit 2 is powered on and automatically starts operating, and quickly controls data transmission with the terminal in place of the main file unit 1 that has gone down.

Further, in the backup file unit 2, when the main file unit 1 is operating normally, the power supply unit 52 is disconnected from the AC power supply 50, and the regulator 5
9 is in operation, so no power is wasted when not in use, and i! source unit 52 or C
Main circuits such as PU11 are not always energized.
Therefore, there is no risk that the life will be shortened.

In addition, when the backup file unit 2 is disconnected from the power supply 50, the battery 79
M13.14 is backed up. If the voltage of the battery 79 decreases in this state, the comparator 75
The output of rOJ is inverted to "1". Thus, the transistor 61 is turned on, the relay 63 is operated, and the power supply unit 52 is connected to the AC power supply 50. Therefore, the output of the power supply unit 52 is connected to the diode 53 and the resistor 54.
is supplied to the battery 79 via the battery 79, and the battery 79 is charged. Further, when the output of the comparator 75 becomes "1", the flip-flop 83 is set.

Therefore, the CPU 11 controls the three-state buffer 84 and reads its output "1", and the data bus line 21
The flip-flop 85 is set via the control line 22, and a charging time timer is also set. Then, when the timer value of the timer reaches "0", the output of the buffer 84 is read again.

If the charging of the battery 79 is completed within this time, the output of the comparator 75 becomes rOJ and the flip 70 knob 83 is reset, so the output of the buffer 84 becomes rOJ. If the output of the buffer 84 is rOJ, it is determined that the battery 79 has been charged normally, the flip-flop 85 is reset, the transistor 62 is turned off, and the power supply unit 52 is disconnected from the AC power source a50. Note that when charging of the battery 79 is completed, at that point the output of the comparator 75 becomes "0" and the transistor 61 is controlled to be off. When the voltage of the battery 79 decreases in this way, the power supply unit 5
Since the battery 79 is connected to the AC power supply 50 and charged, the battery 79 always maintains a voltage higher than a predetermined level, and the memory can be backed up reliably.

Furthermore, even if the timer value of the charging timer reaches "0", if the output of the buffer 84 remains "1", it is determined that an abnormality has occurred in the battery 79, and the lamp 18
It is notified by lighting up and sounding the buzzer 19. In other words, an abnormality in the battery 79 can be detected.

In the above embodiment, the battery charging time is checked using a timer to detect battery abnormality, but the invention is not limited to this. For example, a clock IC may be provided to detect battery abnormality when battery charging is completed. Store the time in the RAM 13, then read the time when the battery voltage drops and battery charging starts,
It may be determined that an abnormality has occurred in the battery when the time from when charging of the battery is completed to when charging starts is within a preset time.

Further, in the above embodiment, the main file is also provided with a control circuit for starting up the main power supply in response to a power control signal from the terminal, but this may be omitted.

[Effects of the Invention] As detailed above, according to the present invention, it is possible to quickly switch to the backup file unit when the main file unit is down, and supply power to the backup file unit only during backup. It is possible to reduce power consumption and prevent shortening of lifespan.
Moreover, it is possible to provide an inline system that can reliably back up the power supply when the power supply to the backup file unit is stopped.

[Brief explanation of the drawing]

The figures show an embodiment of the present invention. Figure 1 is a block diagram showing the overall configuration, Figure 2 is a block diagram showing the circuit configuration of the file unit, and Figure 3 is a block diagram showing the circuit configuration of the terminal. , Figure 4 is a circuit diagram showing the specific configuration of the power supply control circuit of the file unit, Figure 5 is a diagram showing the self-check command line connecting the file unit and the terminal, and Figure 6 is a diagram showing the CPU of the file unit.
Figure 7 is a flowchart showing the temporary transmission error processing by the file unit CPU, Figure 8 is a flowchart showing the temporary transmission error processing by the terminal CPU, and Figure 9 is the flowchart showing the temporary transmission error processing by the terminal CPU. FIG. 1...Main file unit, 2...Backup file unit, 31~3ru...Terminal,
4...Data transmission line, 5z, 52...Power control signal transmission line, 11.31...cp
u. 12.32...ROM, 14...RAM file,
15... Power supply control circuit, 16.34... Transmission controller, 52... Power supply unit, 60.61.62.
・NPN transistor, 63 ・Relay, 75 ・
...Comparator, 79...Memory backup battery, 85...D type flip-flop. Applicant's Representative Patent Attorney Takehiko Suzue Figure 1 Figure 6 Figure 7 Figure 8 Figure 9

Claims (1)

[Claims] In an inline system in which multiple terminals that register product sales data and issue receipts are connected inline, and a file unit that files the data processed by each terminal is connected inline, two of the file units are connected inline. One is used as the main file unit, and the other is used as a backup.The main file unit is equipped with a means to detect when it is down and disconnect from the line, and the backup file unit is equipped with a memory backup battery and a voltage drop of this battery. A voltage detecting means for detecting voltage, a charging means for turning on the main power supply for a certain period of time to charge the battery in response to the detection of a drop in battery voltage by the voltage detecting means, and a charging means for turning on the main power supply for a certain period of time to charge the battery in response to the detection of a drop in battery voltage by the voltage detection means; A power supply start-up means for starting up the power supply, and a transmission control means for detecting the start-up of the power by the power supply start-up means, connecting itself to the line, and controlling data transmission with each terminal, and each terminal has a main file. An in-line system comprising: means for detecting unit down; and means for transmitting a power control signal to the backup file unit when the main file is detected by this means as being down.