JPS63209958A - Multilevel drive device for thermal head - Google Patents

Abstract

PURPOSE:To achieve high speed full-color recording with high quality, by correcting the pulse width based on a detected temperature on the rear face of a thermal head and a temperature in a second and the following lines of a page obtained through preliminary operation. CONSTITUTION:Actual temperature at a time when driving of all dots in one page is started is obtained based on the temperature of a thermal head 100 at the head of page, gradation data, recording color and heat accumulation upto an immediately preceeding line. A pulse width generating circuit 600 generates a width data of recording pulse being determined unconditionally from a gradation data, a temperature data and a recording color, and a pulse width data of an auxiliary pulse for cancelling influence of driving of the immediately preceeding line. A binary data generating circuit 700 generates a binary data with specific pitch based on the pulse width data and transfers the binary data repeatedly to the thermal head 100 with specific period.

Description

[Detailed description of the invention] [Table of contents] Overview Industrial field of application Prior art (Figures 17 to 26) Problems to be solved by the invention Means for solving the problems (Figure 1) Effects Embodiment (Figures 2 to 16) Effects of the invention [Summary] The pulse width is finely corrected for each dot by calculating the temperature of the thermal head and predicting the temperature change within one page, and further applying an auxiliary pulse. The dots are driven so that all dots have the desired recording density.

[Industrial application field]

The present invention relates to a multivalued thermal head drive device, and particularly to one that performs temperature compensation of a thermal head with high accuracy.

[Conventional technology]

In a thermal transfer printer, for example, as shown in FIG. 17, an ink sheet 22 and a recording paper 23 are arranged between a thermal head 21 and a platen 24.
is driven according to recording data to generate heat, and the generated heat transfers ink from the ink sheet 22 to the recording paper 23. When one line of recording is completed, the ink sheet 22 and the recording paper 23 are conveyed in the direction of the arrow. By repeating this, a dot pattern is recorded on the recording paper 23.

As methods for controlling the amount of heating (the amount of thermal energy applied to the heated object) in conventional thermal head drive methods, there are two methods: one that controls the width of the drive pulse applied to the heating resistor, and the other that controls the peak value of the drive pulse. There is. In both cases, the driving conditions depend heavily on the temperature of the heating resistor at the time of application of the driving pulse.

FIG. 18 is a schematic cross-sectional view of the thermal head, showing the heat generating part, 25 is a protective layer, 26 is a lead wire,
27 is a heating resistor, 28 is a glaze layer, 29 is a substrate, 3
0 is a heat sink. Heat storage in this thermal head varies from a small time constant (on the order of milliseconds) due to the glaze layer 28 to a large time constant (on the order of seconds to minutes) including the substrate 29 and the heat sink 30. FIG. 19 shows temperature changes inside the thermal head.

Due to heat accumulation in the heating resistor 27 of the thermal head, the driving conditions corresponding to the recording density at a certain dot position largely depend on the recording data immediately before that dot position. In other words, when performing binary recording of black/white, if the previous recorded data is black, this means that the initial temperature of the heating resistor 27 is higher than when it is white, so when driven under the same conditions, Recorded temperature becomes too high. (In FIG. 19, the dot position is indicated by point P.

Also, due to heat accumulation in the glaze layer 28, etc., the temperature of the entire thermal radar may rise, or the temperature may rise locally in areas where high-density recording is concentrated. If this is done, the recording density will increase, causing fine patterns to collapse, white areas to darken, or differences in recording density to occur in the length direction of the thermal head. (In Figure 19, the measurement position of the glaze layer is indicated by point Q.) Furthermore, heat accumulation with a large time constant including the substrate 29 and the heat sink 30 causes a difference in recording density between pages as the ambient temperature changes. let (The measurement position is indicated by point R in Fig. 19.) Since heat storage in this case is relatively slow, in binary recording, a feedback method is used using a temperature detector etc. that detects the temperature of the substrate 29. This can be corrected. That is, as the temperature of the substrate 29 rises, the driving power is reduced.

Regarding heat storage in the glaze layer 28, one time constant was sufficient for binary recording since high accuracy was not required for calculating the time-temperature characteristics of the heating resistor.

It is known that in the case of multilevel recording, the influence of heat accumulation in the glaze layer 28 cannot be ignored unless the driving pulse application period is at least about 100 ms. Therefore,
If the heat accumulation in the glaze layer is not corrected, the speed of multi-tone recording will be extremely slow.
Dots/mm, drive pulse application period 100m
5, it will take 0°1 x 8 x 297 - 237.6 seconds to record an A4 size (210 x 297 mm).

In order to realize multi-gradation recording, the driving voltage or the pulse width must be controlled, and pulse width control is used from the viewpoint of ease of control and control accuracy.

FIG. 20 is an explanatory diagram of drive waveforms and heat generation temperatures, and shows pulse widths Wl<W2<W of recording signals P1, P2, P3, and P4.
3<W4 is defined corresponding to the recording gradation level, and the temperature of the heating element corresponding to the recording signals P1 to P4 changes like the curve aw d, and the pulse width of the recording signal changes. The larger the temperature, the higher the temperature of the heating element, and therefore the higher the recording density. Therefore, by controlling the pulse width of the recording signal, multi-gradation recording becomes possible.

As means for realizing multi-gradation recording by pulse width modulation as described above, a common method is to generate recording pulses based on recording data using a counting circuit. but,
It is necessary to provide a counting circuit for each heating element of the thermal head, which increases the circuit scale. Furthermore, since the recording data is preset in each counting circuit, it can only be applied to DM (diode matrix) type thermal heads.
This cannot be applied to a DD (direct drive) type thermal head.

Therefore, the recording pulse with the pulse width specified by the gradation level is temporally divided, and the thermal head is driven by a means equivalent to binary recording at each divided drive time point, and the pulse is equivalently divided by the control of the division drive circuit. A method of performing multi-gradation recording by width modulation has been proposed.

In this case, since the recording data is shifted to the shift register and then latched by the latch circuit to drive the heat generating element, it can also be used for DD type thermal discs.

In normal binary recording, one line's worth of recording is completed in one drive, but in the above-mentioned split drive method, one line's worth of recording is repeated by driving the number of times corresponding to the recorded data. , which equivalently controls the pulse width of the recording pulse.

FIG. 21 is a diagram showing the principle of multi-gradation recording using pulse width modulation, and shows the case of 8-gradation recording. Pulse width (t1)-to), (tl-to), -・(t?-to
) is defined by the gradation level (Lo, Ll,...L?) of the information to be recorded, as shown in the recording characteristics in the figure (above), and the lowest level Lo (i.e. "white")
), no recording pulse is applied. By the way, in multi-gradation recording using the conventional DD thermal head described above, as shown in FIG. 21(B), the maximum gradation level L7
The pulse width of the recording pulse corresponding to (number of gradation levels - 1
) and repeating normal binary recording (number of gradation levels - 1) times to realize multi-gradation recording.

Therefore, when the gradation level is Lo (white), no recording pulse is applied, so the recording data remains at 10'', and when the gradation level is L4, the recording pulse is repeatedly applied 4 times, so the recording data is the split drive time to I
It becomes "1" at ~ t3', and becomes 0 after time t4 r.
”.In the case of the maximum gradation level L7, the recording pulse is repeatedly applied seven times, so the recording data becomes “1” from time tO′ to t6′ of the divided drive, and from time t7′ onwards, the recording pulse becomes “1”. It becomes “0”.

However, as shown in FIG. 21, the pulse width (to'-to') and (t1'-to
'), -1lr '-to '), the resulting recording density is Lo', L1
',...,L? As shown in ', the effective number of gradations decreases,
The gradation in the intermediate area is impaired. The recording density obtained for a predetermined number of gradation levels is shown in FIG. 21, LoSL1,
..., the pulse of the recording pulse corresponding to each gradation level when you want to divide it equally like L7! (to-to), (t
l-tO), -(tl-to) difference (t i-t i
-+) (i-1 to 7) are not constant, and the smallest portion is considerably smaller than the simple average value Ct7-to)/7. Therefore, the strobe signal ST shown in FIG.
A method has also been proposed in which the pulse width of B is changed for each divided drive.

However, the relationship between the recording pulse width and the recording density shown in FIG. 21 is not constant (for example, if the temperature of the heating element (1) changes at the time of starting driving, the relationship between the recording pulse width and the recording density shown in FIG. In addition, since each heating element (1) on the thermal head has a different thermal history, the recording pulse width of each heating element will be different even if the gradation level is the same. As shown in FIG. 26, they need to be controlled independently.

Therefore, the present applicant has already set the recording period T for one line as the supply period Ts to the minimum value of the difference in pulse width of recording pulses corresponding to each gradation level, which is an arbitrary period shorter than Pm1n. A method has been proposed in which the recording pulse of each heating element (1) is generated by repeatedly driving a binary recording data string, considering the recording pulse as a collection of Ts. (Special application 1986-25
No. 8478, filed on November 20, 1985) This method is called supline split drive and is shown in FIG. Here, the recording characteristics shown in FIG. 21 will be explained as an example. From FIG. 21, the maximum pulse width P7 (-tl-to) is 4.9 ms and the minimum pulse width ΔPm1n is 0.3 ms, so if the supply line period Ts is set to Q and 1 ms, to-17 The time will be represented by a supply line number SL as shown in FIG. The generated binary recording data string is at time t(Ix
“1” in ti-1, that is, supply line number 0 = SL
It becomes "1" at i-+ (SLi-1 is the supline number corresponding to time ti-1) and becomes "0" after time ti, that is, after the supline number SLi.

On the other hand, when the recording area is A4 size and the resolution is 8 lines/mm, the number of heating elements (1) of the thermal head is 17.
28 pieces are required, and if the data transfer rate of the conventional DD type thermal to/do shown in Fig. 22 is 2MHz, then 15
864 μs to transfer 47 minutes of binary recording data string
It will take a long time. Therefore, when using the conventional DD type thermal head shown in FIG. 22, it is impossible to perform pulse width modulation control using divided driving in the supply line period described above. In addition, in FIG. 22, 2-1 to 2-n
indicates a latch, and 3-1 to 3-n indicate a shift register.

In this regard, the applicant has already proposed a thermal head having the configuration shown in FIG. 25. (Special application 1986-174
No. 226, published on August 9, 1985 #) In other words, one line of binary recorded data string is Af[? The divided recording data D1. , DTz, .-1DIR are added to the input terminals DI of one each or a plurality of m-bit shift registers connected in cascade, and are shifted.
Compared to the conventional DD type thermal head shown in Fig. 22,
This results in an isometrically doubled data transfer rate.

That is, by using the multi-data input DD type thermal head shown in FIG. 26, the supply cycle Ts can be shortened to 16 μs.

[Problem that the invention seeks to solve]

The above method has made it possible to perform highly accurate multi-gradation recording including temperature compensation, but especially in full-color recording, the amount of heat stored is enormous, and the glaze layer within one page is not limited to continuous recording. It was necessary to take measures against heat accumulation.

The present invention provides a thermal printer that performs multi-gradation recording by pulse width modulation using a direct drive (hereinafter abbreviated as DD) type thermal head, and uses the detected temperature on the back side of the thermal head and the temperature of the 2nd level in a page obtained by predictive calculation. By correcting the pulse width according to the temperature after the line and applying an auxiliary pulse to cancel the influence of the immediately preceding line, high-quality full-color recording can be performed at high speed. [Means for solving the problem] Figure 1 is a block diagram of the principle of the present invention.
00) is a multi-data input DD type thermal head that can input two or more data, (200) is a temperature sensor such as a thermistor attached to the back of the thermal head, (3
00) is a circuit that converts the temperature of the thermal head into a linear digital value, (500) is a circuit that outputs temperature data that is predicted to change within one page from the heating and cooling characteristics of the thermal head, and (400) is a temperature detection circuit. A circuit that calculates the actual temperature of the thermal head at the start of driving for all dots within one page based on the outputs of the circuit (300) and the intra-page temperature change prediction circuit (500); (600) is gradation data; △Pm1n/ which is uniquely determined by temperature data and recorded color
A circuit (700) generates pulse width data of an auxiliary pulse that cancels the influence of the recording pulse and the immediately preceding line, quantized by (axc). Based on the pulse width data, △Pmin / (ax c ) in increments of 2
This is a circuit that generates value data.

As shown in Fig. 1, the present invention calculates the actual temperature at the start of driving all dots within one page based on the temperature of the thermal head at the beginning of the page, gradation data, recorded color, and amount of heat stored up to the immediately preceding line. The temperature of the pulse width data generator (60
0), the pulse width data of the recording pulse uniquely determined by the gradation data, temperature data, and recording color, and the pulse width data of the auxiliary pulse that cancels the influence of driving the immediately preceding line are generated, and the binary data is generated by the generating circuit. (700) is configured to generate binary data at intervals of ΔPm1n/(aXcXm) based on pulse width data and repeatedly transfer it to the thermal head (100) at a cycle of ΔPm1n/(a X c). It is.

[Effect]

This allows not only the detected temperature of the thermal head but also the temperature change of the thermal head within one page to be predicted and the pulse width to be finely corrected for each dot.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to FIGS. 2 to 16.

FIG. 2 shows the page top temperature detection circuit (3) in the present invention.
00) is a block diagram. Thermal head (100)
The temperature can be measured using a temperature sensor (20
0) and converted into a digital value by an A/D conversion circuit (301). Since this digital value is non-linear with respect to temperature, it is converted into temperature data SD which changes linearly with temperature in a correction circuit (302). The nonlinearity correction circuit (302) is composed of a ROM or the like.

FIG. 3 shows the in-page temperature change prediction circuit (
500). The heating amount calculation circuit (50
1), the change temperature calculation circuit (502) predicts the amount of heat storage in the next line from the heating amount and the amount of heat storage in each dot up to the immediately preceding line, and stores it in the line memory (503).

FIG. 4 is a block diagram of the actual temperature calculation circuit (400) in the present invention. First, the detected temperature on the back side of the thermal heater is lower than the actual temperature of the heating resistor.
After correction by the scaling circuit (401), the register (4)
02) is retained for only one page. In the first line of each page, the temperature data SD held in the register (402) is selected by the selection circuit (404), and the temperature data T
It is output as D. From the second line onward, the register (
402) and the amount of heat stored in the page DF
are added by the addition circuit (403), and this is added by the selection circuit (403).
04) and output as temperature data TD.

FIG. 5 shows a pulse width data generation circuit (6
00), the gradation data DL is 4 bits, the temperature data TD is 7 bits, and the recording color is 2 bits (Y,
The case of 4 colors (M, C, .) is shown.

FIG. 6 shows the internal configuration of the ROM (10), which stores a supply line number NsL that provides a recording density uniquely determined by the tone data DL and the recording color CL. The data for the supply line number NSL was obtained experimentally.

FIG. 7 shows a binary data generation circuit (700
) is a block diagram showing partial areas obtained by dividing one line into .

In this example, m=32, n-54, 1=54
, and −4 are shown, and the series-to-parallel conversion circuit (
Only 6 of the 16 outputs of 6-4) are connected to the shift registers (3-49 to 3-5) on the thermal head (100).
4') data input terminal. Further, in FIG. 7, the number of heating elements (1) to be driven is 512, the supply line period is 17.5 μs, and the maximum pulse width of one recording pulse is 4°43 m5 (the number of supply lines is 256).

FIG. 8 shows 512 heating elements connected to the binary data generation circuit (700) shown in FIG. 7 among the thermal head (100) according to the present invention. The read/write timing of the RAMs (5-1 to 5-4) at this time is shown in FIG. 10, and the period of R/W-“0” is the maximum pulse width of the aforementioned recording pulse, 4. 48m
Corresponds to 5.

In FIG. 7 of this embodiment, the timing control circuit (7)
, and the RAM read/write address and supply number generation circuit (8) performs other parallel processing ((5-1 to 5-5-
4), (40-1 to 40-4), (6-1 to 6-4)
, (41-1 to 4l-4), and (9-1 to 9-4)
), so only one is sufficient.

Hereinafter, the operation of the present invention will be explained in detail with reference to FIGS. 9 to 15 for the case where staggered driving is performed every other dot. In the following, the recording period is assumed to be 11.2 ms.

In FIG. 5, ROM (10) is the recording color CL.

Using the gradation data DL and the temperature data TD at the start of driving of the heating element (1) as addresses, it outputs the supply line number NsL that generates "0" data first in the binary recording data string to be generated. be.

As shown in FIG. 26, the rate of change in recording density at each gradation level when the temperature of the thermal head (100) changes varies depending on each gradation level. Therefore,
In order to keep the recording density constant at each gradation level even if the temperature of the thermal head (100) changes, it is necessary to control the recording pulse width according to the temperature of the thermal spatula (100) for each gradation level. be. In addition, since the control amount of the recording pulse width at this time differs for each gradation level, the recording characteristics are investigated using the temperature of the thermal head (100) as a parameter at each gradation level, and based on the results, for example, as shown in FIG. The contents of ROM (10) are configured as shown in FIG. By doing this, the thermal head (10
0), the recording pulse width is controlled for each heating element even if the gradation level is the same.
The recording density is arbitrarily determined by the gradation data DL and the recording color CL.

The address generation circuit (8) is a RAM (5-1 to 5-4)
When writing, the recording position information corresponding to each gradation data is used as an address, and 512 addresses are outputted only once in ascending order per line, and when reading from RAM, addresses from θ to 511 are repeatedly generated in each supply line. It is.

The RAM (5-1) is a memory that stores a supply line number NSL of 512 dots corresponding to the pulse width of the recording pulse generated in the ROM (10).

The comparison stage m (9-1) compares the supply line number NsL read from the RAM (5-1) during the drive period of the thermal head and the supply line cycle AsL output from the address generation circuit (8). This is a circuit that generates a binary recording data string. The address generation circuit (8) sets X5ST1="0" and X during the driving period of the thermal head.
It also has a function of outputting a supply line number (time elapsed from the rising point of the recording pulse) of 0 to 255 in each period of 5STI="1".

First, the non-marking period (R/W=“O
”), one line of gradation data is input at a speed of, for example, about 6.7 MHz, the ROM (10) generates a supply line number Nst for each dot, and the gradation data for the areas l, 2 .
3. RAM corresponding to each area in the order of 4 (5-1 to 5-
Write in 4).

Next, when reading the supply line number NSL stored in the RAM (5-1), the supply line number ASL indicating the elapsed time is updated by the supply line number update clock CKS having the same cycle as the supply line period TS. At each time, 256 dot position address update clocks CKD are input, and the supline number NsL for 256 dots in each supline number is read out, and the supline number NsL of this special number dot is the supline number A3L at that point.
At the same time, it is latched by the line circuit (40-1). Therefore, the time from the input of the dot position address update clock CKD to the latch to the latch circuit (40-1) is 62.
This means that processing at 5 ns (-16 MHz) is sufficient. Latched supply line number Ns L+! :A
3L generates a binary recording data string in the comparator circuit (9-1), and then this binary recording data string is passed through the latch circuit (9-1) again.
41-1). This operation is repeated for supply line numbers ALL of 0 to 255. This process is first performed on the odd numbered dot (XSSTI-“0”), then on the even numbered dot (XSSTI-1”).
) is similarly performed. (See Figures 11 and 12) The dot position address Ad at this time is 32 x x + y (
x is the number of the shift register (3-1 to 3-16), y is the number of the data terminal output from each shift register (3-1 to 3-16)), and y is 0 to 30 or 1. ~
Each time X increases by 2 up to 31, X increases from 0 to 15, and the dot position address Ad within each line changes as shown in FIGS. 12 to 15. Also, the supply line update clock CKS and the dot position address update clock CKD.
is appropriately selected depending on the operation mode (read/write) of the RAM (5-1). Furthermore, the lowest address at the time of reading is controlled by X5STI.

The binary recording data string latched by the latch circuit (41-1) is input to the 16-bit serial-to-parallel conversion circuit (6-1),
16 shift registers (3-1 to 3-1) shown in FIG.
6) is converted into 16 binary recording data strings to correspond to the input data to the input terminals D11 to Dr16, and is generated by the timing control circuit (7) every time 16 shift clocks CKD are input. It is maintained by the load pulse LCK. At this time, LCK is delayed to compensate for data delay due to pipeline processing. Each of the 16 outputs of the vertical-to-parallel conversion circuit (6-1) is connected to a thermal head (
100) on the 16 shift registers (3-1 to 3-1
6), and the data order of each output corresponds to the dot position of the heating element (1), as shown in FIGS. 13 and 14.

When performing staggered driving, the binary recording data string constituting the 54 binary recording data strings to be transferred to the thermal head (100) is set up every other dot as shown in FIGS. 0''. Therefore, every time the supply line number Nst for 8 dots is read from the RAM (5-1), binary data for 16 dots is essentially transferred to the thermal head (100). The “0” data at this time is
This is achieved by controlling the output gate of the parallel to parallel conversion circuit (6-1) using the data output timing signal ODE generated in the circuit shown in FIG.

Next, FIG. 16 shows the drive timing when an auxiliary pulse is added to cancel the influence of the drive of the immediately preceding line. The signal X5STO is used to select the application period of the auxiliary pulse and the application period of the recording pulse. Suline number Ast is X5ST1="0" and X5STI-"
It changes, for example, in the range of 0 to 127 between X5STO-“1” in each period of 1′. When X5STO="0', supply line number AsL is reset and becomes 0 to 25.
Varies within a range of 5. Since the auxiliary pulse and the recording pulse have a one-to-one correspondence, the pulse width data of both pulses are generated simultaneously in the pulse width data generation circuit (600) shown in FIG. Therefore, the ROM (10) also stores the supply line number N3L' of the auxiliary pulse for the supply line number NsL of the recording pulse shown in FIG. It is.

Note that when recording monochrome halftones, the ROM (
In 10), the recording color CL is unnecessary.

〔Effect of the invention〕

According to the present invention, the pulse width is finely corrected for each dot by predicting not only the detected temperature of the thermal head but also the temperature change of the thermal head within one page, and furthermore, it corresponds to the recording pulse of the same dot in the immediately preceding line. By applying an auxiliary pulse, the thermal head can be driven to achieve the desired recording temperature for all dots on one page, making it possible to perform high-speed thermal head temperature compensation with high precision using an inexpensive and small-scale circuit. Multi-gradation recording can be realized and is extremely useful in practical terms.

[Brief explanation of the drawing]

Fig. 1 is a diagram of the principle of the present invention, Fig. 2 is a page top temperature detection circuit, Fig. 3 is an intra-page temperature change prediction circuit, Fig. 4 is an actual temperature calculation circuit, Fig. 5 is a pulse width data generation circuit, Figure 6 is a configuration example of a ROM, Figure 7 is a block diagram of a binary data generation circuit, Figure 8 is a block diagram of a thermal head, and Figure 9 is a RAM read/write diagram.
Write timing, Figure 10 is the RAM write timing, Figure 11 is a time chart when reading RAM (odd numbered dots), Figure 12 is a time chart when reading RAM (even numbered dots), Figure 13 is standing parallel. Odd numbered dot of conversion circuit, XS, 5T
1-0'' time chart, Figure 14 shows the even numbered dots of the parallel to parallel conversion circuit, X5ST-
"1" time chart, Figure 15 is the ODE signal generation circuit, Figure 16 is a drive timing diagram when adding auxiliary pulses, Figure 17 is an explanatory diagram of the thermal transfer printer, Figure 18 is a schematic sectional view of the thermal head, Fig. 19 is an explanatory diagram of temperature changes inside the thermal head, Fig. 20 is an explanatory diagram of drive waveforms and heat generation temperature, Fig. 21 is an explanatory diagram of drive pulse waveforms, Fig. 22 is a configuration diagram of the DD type thermal head, and Fig. 23 is an illustration of the drive pulse waveform. Figure 24 is an explanatory diagram of a multi-value driving method using Suline division, Figure 24 is an explanatory diagram of an example of correspondence between drive time and Suline number, Figure 25 is a configuration diagram of a multi-input DD thermal head, and Figure 26 is recording density. FIG. 100-m--Thermal head 200--Temperature sensor 300-m--Page top temperature detection circuit 400--
Actual temperature calculation circuit

Claims (3)

[Claims] (1) Holds a binary recording data string for driving n×m heating elements for one line (n is an integer of 2 or more)
m (m is an integer greater than or equal to 2) bit latch circuits, and n
m-bit shift registers, l (l is an integer between 1 and n) data input terminals, a shift clock input terminal commonly connected to the n shift registers, and n
pulse widths Pi and Pi-1 corresponding to two adjacent gradation levels Li and Li-1 are determined using a thermal head equipped with a load pulse input terminal commonly connected to the latch circuits. Difference △Pi (△Pi=｜Pi−Pi−
1｜) is set as △Pmin, △Pmin
/(a×c×m) (a is an integer of 1 or more, c is an integer of n/l or more and smaller than (n/l+1)) from the gradation data to generate a binary recording data string to generate the heat. In thermal printers that perform multivalue drive by pulse width modulating the elements,
Temperature detection means (200) for detecting the temperature on the back surface of the thermal head, page top temperature detection means (300) for converting the detected temperature into linear digital data, and predicting temperature changes within one page. In-page temperature change prediction means (500)
Based on the temperature data output by the page top temperature detection means (300) and the temperature change data within the page generated by the in-page temperature prediction means (500), the actual temperature of the thermal head in each line is determined. Actual temperature calculation means (
400), and the above △Pmin/(a
A pulse width data generation means (600) that generates pulse width data of recording pulses quantized in steps of ×c); and based on the pulse width data generated by this pulse width data generation means (600), △Pmin/(a×c×m)
Binary data generation means (7) that generates binary data at intervals of
00) A thermal head multi-value drive device characterized by comprising: (2) The multi-valued thermal head according to claim 1, wherein the pulse width data generating means (600) determines the pulse width using recording color in addition to gradation data and temperature data. Drive device. (3) A patent characterized in that the pulse width data generating means (600) generates not only pulse width data of the recording pulse but also pulse width data of an auxiliary pulse corresponding to the pulse width of the recording pulse. Claim 1
The thermal head multi-value drive device described in .