JPS63209348A - Modulation system - Google Patents

Abstract

PURPOSE:To attain signal point arrangement for 64-value facilitating the recovery of carrier by converting a signal into 2-series multivalue signal so as to attain 64-value of signal arrangement in modulating the signal by a modulating means in the conversion means. CONSTITUTION:The conversion means 1 converts a signal into a 2-series of multi-value signal so as to attain prescribed 64-value of signal point arrangement in case of modulation by a modulation means 2. Then a multi-point signal output of 2-series by the means 1 is modulated by the means 2 and then outputted. In this case, the signal points of 64-value are not formed to be point- symmetry but in axis symmetry as to either of I, Q axes. Thus, in demodulating a signal, DC voltage/current level is obtained and utilized as DC offset used in the pilot carrier injection method, then the recovery of the carrier is facilitated. Moreover, the signal point arrangement of 64-value is discriminated by 16levelX9level, that is 4X4-bit, thereby reducing the number of bits.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Prior Art (Figures 7 to 10) Problems to be Solved by the Invention Means for Solving the Problems (Figure 1) Effects Embodiment (Figs. 2 to 6) Effects of the invention [Summary] The present invention is equipped with a modulation/demodulation device that outputs a 64-value honeycomb-shaped signal point arrangement for only one orthogonal coordinate axis, and has low average power and peak power. DC Offset) value to facilitate carrier wave regeneration.

[Industrial application field]

The present invention relates to a modulation method, and particularly to a modulation method in which signal points are arranged in a 64-value honeycomb shape, and the average power and peak power are small and carrier wave reproduction is easy.

[Conventional technology]

In digital radio, in order to improve frequency usage efficiency,
As shown in FIG. 7, a multi-value QAM (the example in FIG. 7 is 64-value QAM) is used. In the case of 64 values, as shown in Figure 8, 6 focus information is assigned to one signal point, and the information is distributed around the ■ axis, 11, !, around the Q axis, and so on. +, Q+, Q
By repeating the sequential assignment of "1" and "0" according to +, etc., point P in FIG. 8 is assigned to the information rllolooJ. In this case, the 3 bits on the left rllO
” divides I+ and I+ around the Q axis, and each I+ and [+ are
2. By dividing f2 into I3 and I3, it is determined based on the position of point P, and the right three bits rloOJ are allocated in the same way.

By the way, when demodulating a signal transmitted using this QAM method, it is necessary to regenerate the carrier wave on the receiving side. FIG. 9 shows a block diagram of a demodulator for a general QAM method (64 values in this example).

FIG. 9 shows an example using a Costas type carrier wave regeneration circuit.

The input signal is sent to the multiplier 101 by the hybrid circuit 100.
．． 102. The output signal of the voltage controlled oscillator 110 is directly applied to the multiplier 101, and the multiplier 102
A signal in which the output of the voltage controlled oscillator 110 is shifted in phase by 90° by the phase shifter 111 is applied (lUfl).

The output of each multiplier 101.1 and 02 is a low-pass filter 1
03.104 waveform shaping, analog digital (
AD) They are converted into digital signals by converters 105 and 106, and depending on the level, 1 to I4, Ql to Q
4 is output. As a result, the signal generator 107 outputs Q1
■I4 or 11■d4 is calculated and this is negatively fed back as a control signal for the voltage controlled oscillator 110 via the low-pass filter 109, so that the voltage controlled oscillator 11
0, it is possible to reproduce a carrier wave whose frequency and phase are synchronized with those of the transmitting side. In this way, the AD converter 105
．． The output of 106 is inputted to parallel-to-serial converter 108 to obtain a predetermined serial signal.

By the way, although the frequency utilization efficiency can be improved in this QAM method, there is a problem in that the average power and peak power are large. To solve this problem, a honeycomb signal point arrangement as shown in FIG. 10 was considered. FIG. 10 shows a 64-value honeycomb signal point arrangement, in which 61 signal points arranged in a hexagonal shape plus three points marked with an x are added, and each signal point is arranged point-symmetrically. In the case of this honeycomb-shaped signal point arrangement, the information is not logically determined by position as shown in FIG. 8, so each signal point displays predetermined information.

[Problem that the invention seeks to solve]

In the case of a honeycomb signal point arrangement as shown in Fig. 10, the control signal of the VCO can be easily generated using the output of the A/D converter as in the case of the grid signal point arrangement as shown in Fig. 8. cannot be obtained, resulting in a complicated circuit configuration.

For this reason, on the transmitting side, an offset is given to the signal of the ■ channel (or Q channel) to generate a carrier frequency component (pilot carrier) in the modulated wave, and on the receiving side, the average value deviation is added to the Q channel (or I channel). A method of controlling the VCo based on the phase difference between the received wave and the VCO output signal that appears as (Biloft carrier injection method)
It is conceivable to adopt

However, if pilot carriers are generated simply by shifting the honeycomb signal point arrangement as shown in Figure 10, the advantage of the honeycomb signal point arrangement, which is that it can reduce average power and peak power, will be greatly lost. There was a problem.

An object of the present invention is to provide a modulation method that applies a pilot carrier injection method and enables a 64-value signal point arrangement that facilitates carrier wave regeneration without significantly increasing average power or peak power. It is.

[Means for solving problems]

In order to achieve the above object, in the present invention, as shown in FIG. Convert to The signal point arrangement of this conversion means 1 is
The rightmost signal on the I-axis shown in Figure 1 (shown as an x mark on the I-axis in Figure 1) is deleted, and the signal point 2 in Figure 10 is erased.
quadrant, delete the x mark in the 4th quadrant and add the one marked with ○ in Fig. 1. (However, the x mark in the 3rd quadrant in Fig. 10 is indicated by a Q mark) Change the Q axis to Fig. 10 In comparison, a DC offset is given to the left side. The two-series multi-level signal output from the converting means 1 is then modulated by the modulating means 2 and output.

[Effect]

In this way, the 64-value signal points are not point symmetrical, and one of the I and Q axes is line symmetrical, so
When demodulating this, the DC current/voltage level is obtained,
Since this can be used as a DC offset for use in the conventional pilot carrier injection method, carrier wave regeneration becomes easy.

Moreover, this 64-value signal point arrangement can be distinguished by 16 levels x 9 levels, that is, 4 x 4 bits, and the 10th
The number of focuses can be reduced compared to the 64-value CAM signal point arrangement shown in the figure, which requires 17 levels x 9 levels, that is, 5 x 4 bits.

The 64-value signal points in FIG. 1 are an example of a case where a DC offset of 19/64 of the minimum distance between signal points is given in the one-axis direction, and in this case, the signal points have the minimum average power.

〔Example〕

An embodiment of the present invention will be described based on FIGS. 2 and 3.

FIG. 2 is a block diagram of an embodiment of the modulation method of the present invention, and FIG. 3 shows a receiving apparatus that receives a signal modulated and output according to the present invention and demodulates it.

In Figure 2, the same reference numerals as in Figure 1 indicate the same parts;
10.11 outputs IQ information of signal points for a 6-bit pattern assigned in advance, and R
It is composed of OM, and ROM10 is 4
ROMII outputs a Q signal of 4 bits or more, and 12.13 is a digital-to-analog converter (D-A 14.15 is a low-pass filter that shapes the waveform of the analog signal output from the DA converter 12.13.

16 and 17 are multipliers, 18 is a hybrid circuit for synthesis, 19 is a 90° phase shifter, and 20 is a reference carrier wave oscillator.

Further, in FIG. 3, 40 is a hybrid circuit that distributes the received signal, 41 and 42 are multipliers, 43 is an oscillator for carrier wave regeneration, 44 is a 90° phase circuit,
45.46 is a low-pass filter, and 47.48 is an analog-to-digital converter (A-1) that outputs the output of the low-pass filter 45.46 to an 8- to 10-bit digital signal.
A signal determining section 49 determines which of the 64 signal points is input based on the outputs of the A/D converters 47 and 48, and outputs a corresponding 6-bit digital signal.

Note that the carrier wave regeneration oscillator 43 may be constructed of a voltage controlled oscillator as in FIG. 9, and may be configured to be feedback-controlled by the output of an AD converter.

Next, the operations shown in FIGS. 2 and 3 will be explained.

In the present invention, a 6-bit pattern corresponding to each of the 64 signal points shown in FIG. 1 is assigned in advance. When this 6-bit signal is input from ROM10 in Fig. 2, a signal of 5 bits or more indicating the position of the signal point ■ is outputted, and from the same <ROMII, the signal of Q of this 6-bit signal point is output. A signal of 4 bits or more indicating .

Each of these digital signals is converted by a D-A converter 12.13 into an analog signal corresponding to (1) and Q, waveform-shaped by a low-pass filter 14.15, and then sent to a multiplier 16.
17. The multiplier 16 includes a reference carrier oscillator 20
The oscillation signal is input as is and is passed through the low-pass filter 14.
Further, the oscillation signal of the reference carrier wave oscillator 20 is input to the multiplier 17 after being shifted in phase by 90' by the phase shifter 19, and is thereby modulated by the output of the low-pass filter 15. The outputs of these multipliers 16 and 17 are then combined by the hybrid circuit 18 and transmitted.

This transmission signal is received by the receiving device shown in FIG. 3, divided into two parts by a hybrid circuit 40, and one part is transmitted to a multiplier 41 and the other part is transmitted to a multiplier 42. Multiplier 41
Since the reference carrier signal output from the carrier wave regeneration oscillator 43 is applied to , the (2) component is demodulated. Further, since the reference carrier signal is applied to the multiplier 42 after being shifted in phase by 90' by the phase shifter 44, the Q component is demodulated.

The Q component demodulated in this way is waveform-shaped by low-pass filters 45 and 46,
．． 48, each signal is converted into an 8- to 10-bit digital signal. Based on these, the signal determination section 49
determines the signal point and outputs a 6-bit digital signal corresponding to it.

Note that the ROM10 is set so that the signal point arrangement shown in FIG.
111 is mapped, but the output of ROM10111 is 16 levels in the ■ axis direction and 9 levels in the Q axis direction, so 4 bits are required for each, but in reality, both are 8 to 10 bits for accuracy.

Use it at around 100 yen.

A second embodiment of the present invention will be described with reference to FIGS. 4 to 6.

In this second embodiment, the data of the ■ axis and the Q axis are passed through a digital coefficient multiplier to be decomposed into three axis components that form an angle of 120 degrees to each other, as shown in FIG. This is an example of determining.

ROMs 10' and 11' have the signal point arrangement shown in FIG.
20") is input. ■ Since the axial component has 16 levels, 4 bits or more are required. This output is converted into an analog output by the DA converters 12' and 13'. This % multiplied coefficient multiplier 23
The output is subtracted from the output X of the D-A converter 12' by the subtracter 21 to output component 1=x%y, which is multiplied via the low-pass filter 14' to output the Q component. After that, it is output as a Q component to a multiplier 17' via a low-pass filter 15'.

Similar to FIG. 2, the oscillation signal of the reference carrier wave oscillator 20' is applied to these multipliers 16' and 17', one of which is applied as is, and the other is applied with a phase shifted by 90' by a phase shifter 19'. The signals are modulated by Q and are combined and outputted by the hybrid circuit 18'.

In the receiving device, as shown in FIG. 5, this signal is divided into two by a /% hybrid circuit 40' and transmitted to multipliers 41' and 42'. The reference carrier signal output from the carrier recovery oscillator 43' is applied to the multiplier 41', and the reference carrier signal output from the carrier wave regenerating oscillator 43' is applied to the multiplier 42', and the signal shifted by 90 degrees from the phase shifter 44' is applied to the multiplier 42'. , Q components are demodulated. This ISO component is passed through low-pass filters 45', 46' and A-D converter 47.
', 48' converts it into an 8-10 bit digital signal.

- The digital signal of the D converter 48' is doubled by the digital multiplier 51, the addition is performed by the adder 52, the subtraction is performed by the subtracter 53, and together with the output of the A-D converter 47', The signal is decomposed into three components, each having an angle of 120° with respect to each other, and from these data, the signal determining section 49' determines a signal point, and 6-bit data corresponding to the signal point can be obtained.

Incidentally, in the above description, the transmitter/receiver is configured using FIGS. 2 and 3, and 4 and 5, but there is no need to combine them in this way. The transmitting/receiving device may be configured using FIG. 4 and FIG. 3.

Table 1 shows the average power and peak power of the conventional honeycomb signal point arrangement (Fig. 10) and the honeycomb signal point arrangement of the present invention (Fig. 1) when offset in the -1 direction. shows. Table 1 shows two examples of offsets, 0.25 and 0.5, where the minimum distance between the signal points is 1 and the IW per minimum distance.

Table 1 As can be seen from this table, when the offset is the minimum distance of 0.5, the average power is 1.1% and the peak power is 17.8%.
% can be reduced. The minimum power is also 0.4% peak on average and 8
．． Can be made 9% smaller.

By using the signal point arrangement as shown in Figure 1, when a DC offset is provided in the I-axis (or Q-axis) direction for pilot carrier injection, the overall average power and peak power are the same as in the conventional example. It can be made smaller than when a DCC off-seller is provided. This is because the average of the distances from the origin to each signal point which are shifted due to the DC offset is minimized.

〔Effect of the invention〕

According to the present invention, the levels in the I and Q directions can be kept within the range of 2'n with n as small as possible, that is, the number of bits required for determining signal points on the Q2 axis can be reduced. For example, in the above example, one direction had conventionally 17 (≦25:5 bit) levels, but the present invention has 16 (2':
4-bit) level.

Also, when identifying using three axes, the other two axes have 17 levels, which is the same as before, but the (1) axis direction can be reduced by 1 bit at 16 levels (4 bits).

Furthermore, when a DC offset is provided, the average power and peak power can be made smaller than in the conventional case.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the principle of the present invention, FIG. 2 is a configuration diagram of an embodiment of the invention, FIG. 3 is an example of a receiving device for one embodiment, and FIG. 4 is a configuration diagram of a second embodiment of the invention. 5 is an example of a receiving device for the second embodiment, FIG. 6 is a 3-axis signal point arrangement diagram, FIG. 7 is a 64-value CAM signal point arrangement diagram, FIG. 8 is an explanatory diagram of 64-value CAM signal point arrangement, Figure 9 is QA
M demodulator, FIG. 10 is a 64-value honeycomb signal point constellation diagram.

Claims (1)

[Claims] Conversion means (1
) and a modulation means (2) that amplitude-modulates carrier waves having different phases from each other using the two series of multi-level signals, synthesizes them, and outputs them as a modulated wave, and converts the input data into 64 signals on a vector coordinate plane. In a modulation device that converts points into a signal having a vector of corresponding signal points, the 64 signal points are: one point and each of the first hexagons centered on the one point. Six points corresponding to the vertices, and points that bisect each vertex and each side of a second regular hexagon that is twice the size of the first regular hexagon centered on the one point. 12 points, and 18 points corresponding to the points that divide each vertex and each side into three equal parts of a third regular hexagon that is made by expanding the first regular hexagon three times around the one point. and 23 points corresponding to the points that divide each vertex and each side into quarters, except for one, of a fourth regular hexagon that is made by expanding the first regular hexagon four times around the one point. And, among the sides of a fifth regular hexagon that is made by expanding the first regular hexagon five times around the one point, the two sides that are farthest from the removed apex of the fourth hexagon are Of the 4 points each divided into 5 equal parts,
A modulation method characterized by being composed of four points each corresponding to two points excluding both ends.