JPS63209246A - Receiving buffer assigning system - Google Patents

Receiving buffer assigning system

Info

Publication number
JPS63209246A
JPS63209246A JP62040334A JP4033487A JPS63209246A JP S63209246 A JPS63209246 A JP S63209246A JP 62040334 A JP62040334 A JP 62040334A JP 4033487 A JP4033487 A JP 4033487A JP S63209246 A JPS63209246 A JP S63209246A
Authority
JP
Japan
Prior art keywords
line control
receiving buffer
control device
line
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62040334A
Other languages
Japanese (ja)
Inventor
Makoto Mori
誠 森
Tetsuo Takemura
哲夫 竹村
Toshiaki Suzuki
俊明 鈴木
Hideo Takamura
高村 秀雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP62040334A priority Critical patent/JPS63209246A/en
Publication of JPS63209246A publication Critical patent/JPS63209246A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the influence of a convergence to the inclination of a traffic between data having different high order layer control by classifying plural links into two groups or above and providing a data receiving buffer for a line control device and for a group in a processing device. CONSTITUTION:Receiving buffers 311, 312, 3n1 and 3n2 in a processing device are assigned to a line control device unit and a service access point unit. Thus, by assigning the receiving buffers 311, 312, 3n1 and 3n2 in the processing device to the line control device unit and the service access point unit, line control devices 11,..., 1n use the assigned receiving buffer, and therefore, the receiving buffer hunting competition with other line control device does not occur. Since the receiving buffer is assigned to a service access point unit, the straddle of different high order layer control parts 41 and 4n at the time of reading the data in the receiving buffer is not needed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、回線より受けたデータを転送、格納する処理
装置内受信バッファ割当て管理方法に係り、特にl5D
N加入者線交換機に好適な受信パ。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a reception buffer allocation management method within a processing device for transferring and storing data received from a line, and in particular,
Receiver path suitable for N subscriber line exchange.

ソファ割当て方式に関する。Concerning sofa allocation method.

〔従来の技術〕[Conventional technology]

l5DN加入者線交換機は、第2図に示すよう。 The 15DN subscriber line exchange is shown in FIG.

に、複数加入者線(11〜!−)のエインタフェースの
, of the interface of multiple subscriber lines (11~!-).

リンク制御処理を行なう回線制御装置11〜17LとI
Line control devices 11 to 17L and I that perform link control processing
.

インタフェース上位レイヤ制御を行なう処理装置。A processing device that performs interface upper layer control.

20からなる構成が一般的に知られている。なお、この
種の交換機として関連するものには、例えば。
A configuration consisting of 20 is generally known. Incidentally, related exchanges of this type include, for example.

昭和60年度電子通信学会総合全国大会、論文集、ll
llm1959[l5DN加入者線交換機における信号
処。
1985 IEICE General Conference, Proceedings, ll
llm1959 [l5DN Signal processing in subscriber line exchange.

埋装置構成の一考察」等が挙げられる。A study on the configuration of embedded equipment.''

C発明が解決しようとする問題点〕 第2図に示す構成のl5DN交換機において、。Problems that invention C attempts to solve] In the 15DN switch having the configuration shown in FIG.

回線制御装置11〜1?Lは加入者線からのエフシーム
1−信号を受信するとリンク制御を行ない■フレームの
情報フィールド内にある上位レイヤ信号を、上位レイヤ
制御を行なう処理装置20内の受信バッファ30に転送
するため、受信バッファをハントする必要がある。処理
装置20内の受信バッファ30をシステムで共用する場
合、複数の回線制御装置11〜。
Line control device 11-1? When L receives the FCM 1 signal from the subscriber line, it performs link control and transfers the upper layer signal in the information field of the frame to the reception buffer 30 in the processing device 20 that performs upper layer control. Need to hunt buffers. When the receiving buffer 30 in the processing device 20 is shared by the system, a plurality of line control devices 11--

1?L間で受信バッファハントの競合が生じる問題が。1? There is a problem where receive buffer hunt contention occurs between L.

あった。また、サービスアクセスポイント(SA。there were. There is also a service access point (SA).

P)は、5AP=0が呼制御信号、5AP=16が。P), 5AP=0 is the call control signal, 5AP=16 is the call control signal.

バククト信号に割当てられており、5APQ値に。It is assigned to the Bakuto signal and has a value of 5 APQ.

より、処理装置での上位レイヤ制御は異なるため。Therefore, the upper layer control in the processing device is different.

ナーピスアクセスポイント毎に信号の振分は処理。Signal distribution is processed for each NAPIS access point.

が複雑化する問題があった。また、SAP間のト。The problem was that it became complicated. Also, between SAPs.

ラヒククのかたよりによる輻晴の波及範囲が広が。The spread of radiance due to Rahikuku's bias expands.

る問題があった。               1゜
本発明の目的は、複数の回線制御装置間の受信。
There was a problem. 1゜An object of the present invention is reception between a plurality of line control devices.

バッファハント競合を防ぎ、レイヤ6信号のナー。Prevents buffer hunt contention and nerfs layer 6 signals.

ビスアクセス種別の振分げを容易にするバッファ。A buffer that facilitates the distribution of service access types.

割当て方式を提供することにある。The objective is to provide an allocation method.

〔問題点を解決するための手段〕1゜ 上記目的は、処理装置内の受信バッファを回線制御装置
単位かつサービスアクセンポイント単位に割当てること
により達成される。
[Means for Solving the Problems] 1. The above object is achieved by allocating a reception buffer in the processing device to each line control device and each service access point.

〔作用〕[Effect]

処理装置内の受信バッファを回線制御装置単位かつサー
ビスアクセスポイント単位に割当てるこ・とにより、回
線制御装置は、割当てられた受信パ。
By allocating the reception buffer in the processing device to each line control device and each service access point, the line control device can use the allocated reception buffer.

ソファを使用するので、他の回線制御装置との受。Since a sofa is used, it can be connected to other line control devices.

信バッファハント競合は生じない。また、サーと。No communication buffer hunt contention occurs. Also, sir.

スアクセスポイント単位に受信バッファが割当て5られ
ることがら、受信バッファ内のデータ読取時。
When reading data in the receive buffer, since the receive buffer is allocated to each access point.

における異なる上位レイヤ制御部の振分けが不要。There is no need to assign different upper layer control units to each other.

となる。becomes.

〔実施例〕〔Example〕

以下、本発明の一実施例を第1図により説明する。第1
図は、l5DNユーザ・網インタフニー。
An embodiment of the present invention will be described below with reference to FIG. 1st
The figure shows l5DN user/network interface.

スのリンクの手順制御を行なう回線制御装置n台。n number of line control devices that control the link procedures of the network.

と上位レイヤな処理する処理装置からなるl5DN。The 15DN consists of a processing device that performs upper layer processing.

交換機における処理装置内の受信バッファな回線。A receiving buffer line in the processing unit of an exchange.

制御装置単位かつサービスアクセスポイントをSi3 AP==0,5AP=16の2糧類とした場合の受信バ
ッファ割当てを示す。11〜1?Lは複数のl5DNユ
ーザ・網インタフエース回路を収容し、リンク手順制御
を行なう回線制御装置、20は上位レイヤな処理する処
理装置、511〜3?L1は回線制御装置11、6 。
The reception buffer allocation is shown in the case where there are two service access points for each control device, Si3 AP==0, and 5AP=16. 11-1? L is a line control device that accommodates a plurality of l5DN user/network interface circuits and performs link procedure control, 20 is a processing device that performs upper layer processing, and 511 to 3? L1 is a line control device 11,6.

〜1nの5AP=0用の受信パンツアキニー、312゜
〜3?L2は回線制御装置11〜1九の5AP=16用
の受。
~1n's 5AP = 0 receiving pants akiny, 312°~3? L2 is a receiver for 5AP=16 of line control devices 11 to 19.

信バッファキューであり、各受信バッファキュー。a receive buffer queue, and a receive buffer queue for each receive buffer queue.

は複数の受信バッファから構成される。41はSAP 
consists of multiple receive buffers. 41 is SAP
.

=0の上位レイヤ処理部、42は5AP=16の上位。=0 upper layer processing unit, 42 is the upper layer of 5AP=16.

レイヤ処理部である。SAP = Oの上位レイヤ処理
部。
This is a layer processing section. Upper layer processing unit of SAP=O.

41は、SAP = o用受信バッフアキニー311〜
5?L1の。
41 is the reception buffer for SAP=o 311~
5? L1's.

キュー制御を下記のように行なう。Queue control is performed as follows.

回線制御装置11〜17L毎のSAP = o信号のト
ラヒ。
Traffic of SAP=o signal for each line control device 11 to 17L.

ツクに見合ったバッファ数をSAP = O用受信バク
1.。
The number of buffers commensurate with the number of buffers for SAP = O is 1. .

ファキエー311〜3?L1のそれぞれのバッファ数 
Fakie 311-3? Number of buffers for each of L1
.

(キ≧−長)として設定し、各回線制御装置11〜。(Key≧−Length), and each line control device 11-.

1?Lに、受信バッファの先頭アドレスと受信バッフ。1? In L, the start address of the receive buffer and the receive buffer.

子番号及びSAP種別を通知する。受信バッファ番。Notify the child number and SAP type. Receive buffer number.

号にキニー長分だけあり、巡回制御する。回線側、。There is a Kinney length in the issue, and it is patrolled and controlled. Line side.

御装置11〜1?Lは、SAP = oの■フレームの
受信順に受信バッファ番号の若番から順次、受信バッフ
ァKIフレームの情報フィールドを書込み、受信バッフ
ァへの誓込み毎に回線番号とリンク番号と受信バッファ
番号とエフイールドのバイト長を処、 4 。
Control device 11-1? L writes the information field of the receive buffer KI frame in order of reception of ■frames with SAP = o, starting from the lowest receive buffer number, and writes the line number, link number, receive buffer number, and field for each commitment to the receive buffer. Determine the byte length of 4.

埋装置20にステータスで通知する。5AP=Oの上位
The embedded device 20 is notified of the status. 5AP=O top.

レイヤ処理部41は、ステータス通知を受は該当す。The layer processing unit 41 receives the status notification.

る受信バッファ番号の受信バッファの内容を読み。Read the contents of the receive buffer with the receive buffer number.

取り、対応するリンクの上位レイヤ信号の処理を。and process the upper layer signals of the corresponding link.

行ない、受信バッファを再度、該当する回線制御。Then, re-open the receive buffer and control the appropriate line.

装置にコマンドで通知する。5AP=16の上位レイ。Notify the device with a command. 5 AP = 16 upper rays.

ヤ処理部42は、5AP=16用受信バツフアキニー 
The reception processing unit 42 has a reception buffer for 5AP=16.
.

312〜計2のキュー制御を、5AP=oの上位レイ。312~Total of 2 queue control, 5AP=o upper layer.

ヤ処理部41と同様の手順で行なう。回線制御装置。The procedure is similar to that of the color processing section 41. Line control device.

11〜1?Lは、5AP=16の1フレームの受信順に
、。
11-1? L is in the order of reception of one frame with 5AP=16.

5AP=16用の受信バッファ番号の若番から順次、受
信バッファにエフレームの情報フィールドを書。
5 Write the E-frame information field to the receive buffer in order from the lowest receive buffer number for AP=16.

込み、受信バッファの書込み毎に回線番号とリンク番号
と受信バッファ番号とエフイールドのバイト長を処理装
置20にステータスで通知する。5AP15=16の上
位レイヤ処理部42は、ステータス通知を受は該当する
受信バッファ番号の受信バッファの内容を読み取り、対
応する9ンクの上位レイヤ信号の処理を行ない、受信バ
ッファを再度、該当する回線制御装置にコマンドで通知
する。8AP= oの上位レイヤ処理と5AP=16の
上位レイヤ処理は、一定周期(例えば16nsS)で交
互に実行し、ステー。
The line number, link number, reception buffer number, and field byte length are notified to the processing device 20 as a status each time the reception buffer is written. Upon receiving the status notification, the upper layer processing unit 42 of 5AP15=16 reads the contents of the receive buffer of the corresponding receive buffer number, processes the upper layer signal of the corresponding 9 links, and re-writes the receive buffer of the corresponding line. Notify the control device with a command. The upper layer processing of 8AP=o and the upper layer processing of 5AP=16 are executed alternately at a fixed period (for example, 16 nsS), and the processing stays.

タス通知のあった回線制御装置に対応する受信バ。The receiving bar corresponding to the line control device that received the task notification.

ソファの内容を読み取り、上位レイヤ信号の処理。Read the contents of the sofa and process the upper layer signals.

を行なうことができ、また回線制御装置間の受信。It can also perform reception between line control devices.

バッファハントの競合もない。There is no buffer hunt conflict.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、回線制御装置間の受信バッフ、アハン
トm合を防ぐことができ、上位レイヤ制御。
According to the present invention, it is possible to prevent a receive buffer and a match between line control devices, and to improve upper layer control.

の異なるデータ毎に受信データを分類できるので、。Because the received data can be categorized by different types of data.

競合制御が容易となり、上位レイヤ制御の異なる。Contention control becomes easier and upper layer control is different.

データ間のトラヒックのかたよりに対する輻棲の影響を
防ぐ効果がある。
This has the effect of preventing the influence of congestion on traffic bias between data.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のl5DN交換機における受
信バッファ割当図、第2図は従来例を示す図である。 11〜1n・・・回線制御装置、20・・・処理装置、
30・・・受信バッフアキニー、311〜6九1・・・
回線制御装置フ 11〜1?Lの5APOの受信バラ苧アキニー、312
バッフアキニー、11〜1m・・・回線、41・・・S
 A P =。 0の上位レイヤ処理部、42・・・8AP=16の上位
。 レイヤ処理部。
FIG. 1 is a diagram showing reception buffer allocation in an 15DN exchange according to an embodiment of the present invention, and FIG. 2 is a diagram showing a conventional example. 11-1n... line control device, 20... processing device,
30... Receive buffer akini, 311-691...
Line control device F11-1? L's 5APO reception rose Akinyi, 312
Buff Akinyi, 11-1m...Line, 41...S
A P =. 0 upper layer processing unit, 42...8 AP=16 upper layer. Layer processing section.

Claims (1)

【特許請求の範囲】 1、1回線以上の回線を収容し、前記回線上に設定され
る複数のリンクの手順制御を行なう回線制御装置複数台
と上位レイヤを処理する処理装置からなる通信システム
において、前記複数リンクを2つ以上のグループに分類
し、処理装置内にデータ受信バッファを前記回線制御装
置毎にかつ前記グループ毎に設けたことを特徴とする受
信バッファ割当て方式。 2、前記グループ分類をフレーム内のアドレスフィール
ドの値により行なうことを特徴とする特許請求の範囲第
1項記載の受信バッファ割当て方式。
[Scope of Claims] 1. In a communication system that accommodates one or more lines and includes a plurality of line control devices that perform procedural control of a plurality of links set on the line, and a processing device that processes upper layers. . A reception buffer allocation method, characterized in that the plurality of links are classified into two or more groups, and a data reception buffer is provided in a processing device for each of the line control devices and for each group. 2. The reception buffer allocation method according to claim 1, wherein the group classification is performed based on the value of an address field within a frame.
JP62040334A 1987-02-25 1987-02-25 Receiving buffer assigning system Pending JPS63209246A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62040334A JPS63209246A (en) 1987-02-25 1987-02-25 Receiving buffer assigning system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62040334A JPS63209246A (en) 1987-02-25 1987-02-25 Receiving buffer assigning system

Publications (1)

Publication Number Publication Date
JPS63209246A true JPS63209246A (en) 1988-08-30

Family

ID=12577724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62040334A Pending JPS63209246A (en) 1987-02-25 1987-02-25 Receiving buffer assigning system

Country Status (1)

Country Link
JP (1) JPS63209246A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0478486A2 (en) * 1990-09-26 1992-04-01 International Business Machines Corporation Method and system for providing communication in a layered communication architecture

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0478486A2 (en) * 1990-09-26 1992-04-01 International Business Machines Corporation Method and system for providing communication in a layered communication architecture
EP0478486A3 (en) * 1990-09-26 1995-01-04 Ibm Method and system for providing communication in a layered communication architecture

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