JPS63202017U - - Google Patents
Info
- Publication number
- JPS63202017U JPS63202017U JP9365487U JP9365487U JPS63202017U JP S63202017 U JPS63202017 U JP S63202017U JP 9365487 U JP9365487 U JP 9365487U JP 9365487 U JP9365487 U JP 9365487U JP S63202017 U JPS63202017 U JP S63202017U
- Authority
- JP
- Japan
- Prior art keywords
- patterns
- guard
- signal source
- output line
- line side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Keying Circuit Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9365487U JPS63202017U (enExample) | 1987-06-18 | 1987-06-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9365487U JPS63202017U (enExample) | 1987-06-18 | 1987-06-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63202017U true JPS63202017U (enExample) | 1988-12-27 |
Family
ID=30956411
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9365487U Pending JPS63202017U (enExample) | 1987-06-18 | 1987-06-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63202017U (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998057282A1 (en) * | 1997-06-13 | 1998-12-17 | Hitachi, Ltd. | Semiconductor integrated circuit for verification, circuit simulator, and circuit simulation method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50100906A (enExample) * | 1973-12-31 | 1975-08-11 | ||
| JPS53132773A (en) * | 1977-04-25 | 1978-11-18 | Hitachi Ltd | Multilayer circuit board |
-
1987
- 1987-06-18 JP JP9365487U patent/JPS63202017U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50100906A (enExample) * | 1973-12-31 | 1975-08-11 | ||
| JPS53132773A (en) * | 1977-04-25 | 1978-11-18 | Hitachi Ltd | Multilayer circuit board |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998057282A1 (en) * | 1997-06-13 | 1998-12-17 | Hitachi, Ltd. | Semiconductor integrated circuit for verification, circuit simulator, and circuit simulation method |
| WO1998057281A1 (en) * | 1997-06-13 | 1998-12-17 | Hitachi, Ltd. | Semiconductor integrated circuit for inspection, circuit simulator and circuit simulation method |