JPS63199429A - Finely working method for semiconductor and forming method for semiconductor fine buried structure - Google Patents

Abstract

PURPOSE:To etch and work a semiconductor with precision of several nm or less, to deposit a thin-film without contaminating the interface and to obtain a simplified processing method for forming fine buried structure by irradiating the semiconductor heated in a vacuum with convergent electron beams and directly etching an irradiating section. CONSTITUTION:A semiconductor 11 heated at 200 deg.C or more in a vacuum is irradiated by convergent electron beams 41, thus directly etching an irradiating section, then finely working it. The irradiating section is etched directly by utilizing electron induced desorption by irradiating the semiconductor 1 with convergent electron beams 11 in the vacuum, and a thin-film is shaped onto the semiconductor through a chemical vapor phase deposition method without bringing the semiconductor 11 into contact with atmospheric air at all, thus forming semiconductor fine buried structure. Accordingly, the fine etching working of the semiconductor in nm scale is enabled through a simple process, and fine buried structure after etching working can be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method of finely etching a semiconductor on a nanometer scale, and a method of forming a fine buried structure by thin film deposition after fine etching. The present invention can be used in many ways to form semiconductor quantum wire structures and quantum box structures, which have been difficult to manufacture in the past.

(Conventional technology) In recent years, research has progressed with the aim of developing devices with dramatically improved characteristics or completely new semiconductor devices by utilizing the physical properties of semiconductor quantum wells. Attempts are being made to form thin wires and quantum boxes. Nanomake (
It is necessary to etch a semiconductor having a quantum well structure with precision on the nanometer scale and then deposit a semiconductor thin film to completely bury the etched pattern. The biggest technical challenge for this is nm.
Aiming to realize scale-accurate etching, active research has recently been carried out on methods that replace photolithography by directly irradiating a semiconductor with a beam of light or charged particles and etching the irradiated area. In the latter etching method, etching gas is usually adsorbed onto the semiconductor surface and etching is performed by beam irradiation.

(Problems to be Solved by the Invention) In addition to using an etching gas in the above-mentioned etching by direct beam irradiation, an adsorption layer of etching gas is added before the next microstructure embedding process to avoid interface contamination. There is a problem in that a process for completely desorbing is required, making the overall process somewhat complicated.

Very recently, attempts have been made to etch semiconductors using laser light irradiation without using any etching gas. In this example, photo-induced desorption of the semiconductor is utilized, and since there is no problem of etching gas diffusion, a processing size determined by the resolution of laser light irradiation can be achieved. but,
Since laser light is used, even the smallest etching size is only a few hundred nanometers, which is about the wavelength, and processing accuracy sufficient to form quantum wires and quantum box structures cannot be obtained. Etching of semiconductors using photo-induced desorption has been described by Arnone and Rothschild.
schild) and Ehrlich
Applied Physics Letters (Appl.

It is described in an article published in 1986, Vol. 48, No. 11, pages 736 to 738 of Phys, Lett, 1986. In the example in this paper, 10−
By irradiating single-crystal CdTe heated to about 300°C in a low Torr vacuum with condensed Ar laser light of several hundred mW, an etching gas with a width of about 500 nm and a depth of about 10- is formed. .

In addition, in order to actually form quantum wires and quantum boxes, it is necessary to embed a nine-box structure of thin wires with widths and heights ranging from several nanometers to several + nanometers into a solid in a manner that prevents interfacial contamination, as described above. be. However, until now, there has not been much study on an appropriate method for embedding the above-mentioned micro-etched particles.

The purpose of this invention is to eliminate the drawbacks of the conventional method described above, to perform etching processing of a semiconductor with an accuracy of several nanometers or less, and to form a fine buried structure by subsequently depositing a thin film without contaminating the interface. The objective is to provide a simplified process method for

(Means for Solving the Problems) In order to solve the above-mentioned problems, the semiconductor microfabrication method provided by the first invention of the present application is
The method is characterized in that by irradiating the heated semiconductor with a focused electron beam, the irradiated area is directly etched.

Furthermore, the method for forming a semiconductor fine buried structure provided by the second invention of the present application is to irradiate a semiconductor with a focused electron beam in a vacuum, directly etching the irradiated part using electron-induced desorption, and then etching the irradiated part directly. The method is characterized in that a thin film is formed on the semiconductor by chemical vapor deposition without exposing the semiconductor to the atmosphere even once.

(Operation) Etching according to the first and second aspects of the present invention utilizes the fact that irradiation of a semiconductor with an electron beam causes a phenomenon of desorption of elements constituting the semiconductor. AgB
It has been reported that in many semiconductors such as r, CdS, CdTe, etc., constituent elements are desorbed due to non-thermal action when irradiation with light or electron beam is performed under appropriate conditions. Normally, the energy of the irradiated electron is hundreds to hundreds of thousands of times greater than the energy of the photon.
It is said that the mechanism of desorption due to irradiation is different between the former and the latter. Although many aspects of the desorption mechanism are still unclear, several models have been proposed, including the Auger process and the localization of multiple holes into a single pound. In any case, the purpose of experiments on electron-induced desorption to date has been to confirm the phenomenon and understand the mechanism, and the feasibility of high-speed etching processing on a practical level has not been investigated. A major feature of the present invention is that electron-induced desorption is significantly enhanced by heating the semiconductor substrate to an appropriate temperature, thereby making high-speed etching possible.

The etching process of semiconductors using the photo-induced desorption phenomenon has already been described, but the etching process using electron-induced desorption according to the present invention enables processing with an accuracy several times the diameter of the focused electron beam. , it is possible to form fine battens with a size of several nanometers. Therefore, according to the present invention, it becomes possible to perform fine etching processing sufficient to form semiconductor quantum wire structures and quantum box structures, which were extremely difficult in the past.

Furthermore, in order to actually form quantum wire and quantum box structures, it is necessary to deposit a semiconductor thin film or, in some cases, a dielectric film on the fine battens obtained by the above-mentioned etching to completely bury the fine battens. be. In that case, it is necessary to suppress contamination of the interface between the fine battens and the thin film deposited thereon as much as possible. This is because not only is the problem of interfacial contamination, but also because the object to be buried is nanometer-scale fine bumps, and even a contaminant layer of several atomic layers can cause a change in the shape of the fine bumps. Therefore, of course, once exposed to the atmosphere,
It is not possible to use a method that involves etching the entire semiconductor to be processed by several atomic cycles. Therefore, in the second invention of the present application, in order to prevent interface contamination, etching is performed without exposing the sample to the atmosphere after etching in the same container, or from the container in which etching is performed to another container using a load lock mechanism. Transfer and perform thin film deposition. Further, in order to uniformly and completely embed the fine batten by etching, a chemical vapor deposition (CVD) method is used for thin film deposition.

(Example) Next, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram schematically showing the configuration of an apparatus for performing etching processing and CVD in the first and second inventions of the present application. Since the first invention of the present application is used for the second invention of the present application, examples of both inventions of the present application will be described below. A semiconductor 11 to be processed (hereinafter referred to as a semiconductor sample) is fixed on a heater 21 and placed in a chamber 31.
It can be placed inside. The electron beam 41 is allowed to be generated by the electron gun 42, but at that time, the inside of the chamber 31 is drawn to a high vacuum by the exhaust pump 32 with the valve 51 closed. The sequencer 43 controls the energy, intensity, and scanning of the electron beam 41, and has a machine section for processing signals from the secondary electron detector 44 and observing a scanning electron microscope image on a monitor 45. Electron-induced desorption etching of the semiconductor sample 11 by irradiation with the electron beam 41 occurs by heating the semiconductor sample 11 to an appropriate temperature with the heater 21. To form fine battens by etching,
First, a scanning electron microscope image of the semiconductor sample 11 is observed without heating, a location to be etched is determined, and the scanning location, energy, and beam diameter of the electron beam 41 during etching are determined.

Beam intensity and scanning speed are set by sequencer 43. Subsequently, the semiconductor sample 11 is heated to a specified temperature and irradiated with the electron beam 41 under the set conditions.

Next, in order to deposit a thin film by CVD on the semiconductor sample 11 that has undergone the fine etching process, the semiconductor sample 11 is heated to an appropriate temperature while the generation of the electron beam 41 is allowed to stop, and the valve 51 is opened. A reactive gas, which will be a raw material for the thin film, is introduced into the chamber 31 from the reactive gas inlet 52 . At this time, the internal pressure of the chamber 31 and the deposition rate of the thin film can be controlled by operating the exhaust pump 32 and controlling the amount of reactive gas supplied.

FIG. 2 schematically shows how a semiconductor sample having a quantum well structure is etched by an electron beam 41. An arrow 104 indicates the scanning direction of the electron beam 41. This figure (a) shows a single quantum well Jiff 101 by scanning an electron beam 41 linearly at appropriate intervals.
This shows how the barrier layer 102 sandwiching the barrier layer 102 is etched into a thin line. The width and depth etched in the - times of scanning are determined by the material of the semiconductor sample, the energy of the electron beam 41, the beam diameter, the beam intensity, and the scanning speed. FIG. 2('o) shows how a box-shaped etching button 105 is formed by scanning the electron beam 41 in the vertical direction of the thin linear etching button 103 shown in FIG. 2(a).

Figures 3(a) and (b) are respectively shown in Figures 2(a) and (b).
) The thin linear etching pattern 103 and the box-shaped etching pattern 105 shown in FIG.
This diagram schematically shows how two structures are formed. If the depth of etching by the electron beam is on the order of several tens of nanometers,
By depositing a thin film several hundred nm thick by CVD, the etched holes are completely buried, and the surface becomes almost completely flat after the thin film is deposited.

In this example, the semiconductor sample 11 is an undoped (
A 10 nm thick layer of undoped zinc selenide (Zn5) was placed on a β-type zinc sulfide (ZnS) substrate cut into
e) A quantum well layer and a 10 nm thick undoped ZnS layer epitaxially grown thereon were used. When performing etching, the electron beam 41 is irradiated with an energy of 25
keV, a beam diameter of 10 nm, and a beam current of 100 pA, the semiconductor sample 11 was heated to 300°C.
The top was scanned at a speed of 107ay+/s. Under these conditions, etching depth and width were both 30 nm. By scanning the electron beam 41 in parallel at intervals of 40 nm, a width of 10 nm and a width of 30 nm are obtained.
A fine linear etching pattern 103 of high quality was obtained. Further, by scanning the electron beam 41 in the vertical direction parallel to the thin linear etching pattern 103 at intervals of 40 nm, a box-shaped etching pattern 105 having a side of 10 nm and a height of 830 nm on the upper surface was obtained. These etchings are
10s+X1 (performed over the area of the ban).

The etching process was performed by CVDing the ZnS thin film while heating the semiconductor sample 11 after the etching process to 400°C. 1! i child beam 41
Immediately after the irradiation has stopped, the valve 51 is opened and dimethylzinc (DMZri) and hydrogen sulfide (Has) are supplied into the chamber 31 at a molar ratio of 1:10 from the reactive gas inlet 52, so that the total pressure is 10. The flow rate was controlled to be Torr. Under these conditions, the growth rate of the ZnS thin film was 300 nm.
/hour, but in the example, growth was performed to a thickness of 500 nm.

In order to confirm that the quantum wire 201 or quantum box 202 was formed as expected in the sample produced by the above procedure, the peak position of exciton emission was investigated using low-temperature photoluminescence. The sample was cooled to 6.5K, and ultraviolet laser light of about 100P near 360nm obtained from an Ar ion laser was applied to 10PI.
The sample was irradiated with light focused on the diameter. After the luminescence was collected, it was passed through a spectrometer and received by a photomultiplier tube. As a result of the measurement, it was found that the peak position of luminescence due to excitons in the quantum well portion where no quantum wire or quantum box is formed is at 2.75 eV. On the other hand, it was found that the exciton peak of photoluminescence in the portion where the thin line pattern was provided was at an energy position of about 2.7 eV, and that the exciton peak moved to the lower energy side as the width of the thin line pattern decreased. In addition, the exciton peak of photoluminescence in the area where the box-shaped puncture is provided is at an energy position of approximately 2.6 eV, and in this case as well, it was found that the exciton peak shifts significantly to the lower energy side as the size of the box decreases. Ta.

=12- The above change in the exciton peak position of the photoluminescent SVC is due to an increase in the exciton binding energy due to an increase in the quantum confinement effect, and can be interpreted as a sign that a quantum wire or quantum box is formed. .

In addition, when we measured the optical absorption spectrum instead of photoluminescence, we found that in addition to the same tendency of exciton peak position change, the absorption spectrum shape on the high energy side of the exciton peak was almost dependent on energy in the case of quantum well structure. In contrast, in the case of thin wire and box-shaped structures, absorption decreases at higher energies, and the decrease becomes more pronounced as the wire width and box size decrease. This phenomenon is also interpreted as a sign of the formation of quantum wires and quantum boxes.

In the above example, in order to form Zn5e/ZnS quantum wires and quantum boxes, a Zn5e/ZnS quantum well sample was etched, and ZnS was further subjected to CVD. However, the present invention is not limited to this material system;
It can be widely applied to many kinds of semiconductor materials of group VI and groups 1-2. In order to perform the desired etching for each material, the energy and intensity of the electron beam must be
All you have to do is choose the beam diameter and scanning speed appropriately. Regarding the size of the etching process, in the above example, the electron beam diameter was 10 nm and etching was performed with a width of 30 nm.
Since the electron beam diameter can be reduced to sub-nm, it is clear that further miniaturization is possible. Furthermore, it goes without saying that with respect to thin films deposited by CvD, different types of thin films can be deposited by changing the type of gas to be supplied. Furthermore, in the previous embodiment, etching and CVD were performed in the same chamber in order to prevent surface contamination of the sample after etching and notching. You can move to .

(Effects of the Invention) As described above, by using the present invention, it becomes possible to perform micro-etching of semiconductors on the nm scale with a very simple process, and furthermore, it is possible to form a micro-embedded structure after etching. becomes possible. This makes it possible to provide devices with dramatically improved characteristics compared to conventional ones and completely new semiconductor devices.

[Brief explanation of the drawing]

FIG. 1 is a diagram schematically showing the configuration of an apparatus for performing etching processing and CVD in the first and second inventions of the present application. Further, FIG. 2 is a diagram schematically showing how a semiconductor sample having a quantum well structure is etched into a thin wire shape or box shape using an electron beam by applying the first invention of the present application. Further, FIG. 3 is a schematic diagram showing a semiconductor quantum wire and a quantum box structure formed by depositing a semiconductor thin film by Cvp according to the second invention of the present application on a semiconductor sample after etching with an electron beam. 11... Semiconductor sample, 21... Heater, 31...
Chamber, 32... Exhaust pump, 41... Electron beam, 42... Electron gun, 43... Sequencer, 45...
...Monitor, 51...Pulp, 52...Reactive gas inlet, 101...Quantum well layer, 102...Barrier layer, 103...Thin linear etching button, 104...
- Scanning direction of electron beam, 105... Box-shaped etching button, 201... Quantum wire, 202... Quantum box.

Claims (2)

[Claims] (1) A semiconductor microfabrication method characterized by directly etching the irradiated portion by irradiating a semiconductor heated to 200° C. or higher in vacuum with a focused electron beam. (2) After directly etching the irradiated area using electron-induced desorption by irradiating a semiconductor with a focused electron beam in a vacuum, a chemical vapor is applied onto the semiconductor without ever exposing the semiconductor to the atmosphere. A method for forming a semiconductor fine buried structure characterized by forming a thin film by a phase deposition method.