JPS63198577A - Switching power source - Google Patents

Abstract

PURPOSE:To effectively limit a load current by comparing the output of output current detecting means with a threshold voltage, and limiting the width of a control pulse when the output current is higher. CONSTITUTION:In a switching power source, the DC power of an input terminal 10 is switched by a switching FET 11, transformed by a main transformer 20, then rectified by a rectifier 30, and a DC power is supplied from an output terminal 40 to a load 50. The FET 11 is switched ON and OFF by a driver 12, and a control pulse is supplied thereto from a controller 16. In this case, the output of a current detecting transformer 7 is so wired as to feed it from a rectifying diode 8 directly to the reset terminal R of a R/S latch circuit 14. An auxiliary winding 23 becomes output voltage detecting means, the transformer 7 becomes output current detecting means, and a NAND gate 13 becomes a limiter. Thus, when an output current detected value is high, the width of the control pulse is limited.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a switching power supply device having an overcurrent limiting function.

[Conventional technology]

Switching power supplies are widely used today as power sources for various electrical devices. When using this device, if an overcurrent flows, it will have an adverse effect on the main transformer for voltage transformation, the diode for rectification, or the load circuit.

Therefore, this device is provided with an overcurrent limiting circuit.

Figure 4 shows an example of the wiring diagram.

This device connects a DC power supply to an input terminal 10, switches this current with a switching FET II, transforms it with a main transformer 20, rectifies it with a rectifier circuit 30, and supplies DC power to a load 50 through an output terminal 40. It is configured to do this.

A switching FET II inserted in series with the main winding 21 on the primary side of the main transformer 20 is controlled on/off by the drive circuit 12 . The on/off timing is determined by the voltage control circuit 16 from the drive circuit 1 through the Nant gate 13.
It is controlled by control pulses supplied to 2.

That is, the voltage control circuit 16 expands or contracts the width of the control pulse so that the voltage of the voltage detection terminal 31 provided on the output side of the rectifier circuit 30 becomes a predetermined voltage, and accordingly adjusts the width of the switching FET II. The output voltage is stabilized by changing the switching on/off ratio.

Here, this circuit is added with an overcurrent detection function consisting of a current detection transformer 7 and a circuit following the current detection transformer 7 for monitoring the output current of the circuit. When this circuit detects an overcurrent, it operates to close the Nandt gate 13 at a predetermined timing and limit the width of the control pulse.

The primary side of the current detection transformer 7 is inserted in series with the main winding 21 of the main transformer 20. Further, a rectifying diode 8 and a load resistor 9 are connected to the secondary side of the current detection transformer 7, and the output thereof is connected to the inverting input terminal of the comparison circuit 150.

Further, the reference power supply 5 is connected to the non-inverting input terminal of the comparison circuit 15. Then, the output of the comparison circuit 15 is
It is connected to the reset lft terminal of the R/S latch circuit 14.

On the other hand, the voltage control circuit 16 outputs a control pulse toward the NAND gate 13, and outputs a signal for opening the gate of the NAND gate 13 toward the set terminal of the R/S latch circuit 14.

Here, a power supply for startup and a power supply for normal operation are connected to the R/S latch circuit 14 as drive power supplies. The power supply for startup includes a resistor 1 and a constant voltage diode 2 inserted in parallel to the input terminal 10, and a reverse current blocking diode 3 connecting the connection point between the two and the R/S latch circuit 14.
It is composed of. This power supply supplies a constant voltage necessary for driving the R/S latch circuit 14 when the circuit starts up.

On the other hand, the power supply during normal operation is composed of an auxiliary winding 23 of a main transformer 20, a rectifying diode 4, and a smoothing capacitor 6. This power source extracts a constant voltage from the auxiliary winding 23 of the main transformer 20 while the circuit is operating in a steady state, rectifies it, and supplies it to the R/S latch circuit 14.

In the above device, during normal operation, the voltage control circuit 16
supplies a high-level gate opening signal to the set terminal of the R/S latch circuit 14, so the Q output of the R/S latch circuit 14 becomes high level, and the gate of the Nant gate 13 is opened. . As a result, voltage control circuit 1
The control pulse outputted by 6 is directly supplied to the drive circuit 12 through the Nant gate 13, and the switching FET
11 is driven.

Note that this gate opening signal is used to allow the control pulse to pass through the Nant gate 13, and does not necessarily have to be a high level signal all the time, and may be turned on and off at the same timing as the control pulse.

Further, at this time, since the voltage at the inverting input terminal of the comparator circuit 15 is lower than the voltage at the reference power supply 5, the reset terminal of the R/S latch circuit 14 is at a high level.

Now, when an overcurrent flows through the main winding 21 of the main transformer 20, the comparator circuit 15
The voltage input to the voltage increases and exceeds the voltage of the reference power supply 5.

Then, the reset terminal of the R/S latch circuit 14 becomes low level, and the Q output is inverted from high level to low level. This closes the Nantes gate 13.

In this way, when the control pulse no longer passes through the Nandt gate 13, the output current decreases and the voltage at the inverting input terminal of the comparator circuit 15 decreases. In this way, the reset terminal of the NAND game 13 becomes high level again, and the gate of the NAND gate 13 opens. Overcurrent is controlled by repeating such operations.

[Problem that the invention seeks to solve]

The overcurrent limiting characteristics of a conventional device having such a circuit configuration is shown in the graph of FIG.

FIG. 3 is a graph in which the vertical axis represents the output voltage and the horizontal axis represents the output current, and the broken line in the figure shows the characteristics of this circuit.

In this way, in this device, when the current exceeds the limit value ■1, the overcurrent limiting function operates, and the output voltage begins to drop from point a. If this function continues to operate as it is, the output voltage will gradually decrease.

However, normally, the current value continues to increase until the output voltage becomes zero, and the maximum load current ■2 is! , approximately four times as large. If the current increases in this way, even if it is transient, it may have an adverse effect on the main transformer, rectifier diode, and load circuit.

The present invention has been made with attention to the above points, and an object of the present invention is to provide a switching power supply device having sufficiently effective current limiting characteristics.

[Means for solving problems]

The switching power supply device of the present invention includes a voltage control circuit that generates a control pulse for controlling the output voltage of the circuit, an output current detection means that monitors the output current of the circuit, and an output voltage detection means that monitors the output voltage of the circuit. a C-MOS (complementary metal oxide semiconductor) integrated circuit that operates by accepting the output of the output voltage detection means as a drive power source; the C-MOS collector circuit receives the output of the output current detecting means and compares it with a threshold voltage dependent on the driving power supply voltage, and as a result, the output current is lowered. If the output of the current detection means exceeds the threshold voltage, the limiting circuit operates to limit the width of the control pulse.

[Effect]

The threshold voltage of a C-MOS integrated circuit is normally one half of its power supply voltage.

The switching power supply device of the present invention compares the output of the output current detection means with a threshold voltage, and limits the width of the control pulse if the output of the output current detection means is higher. When the width of this control pulse is limited, the output voltage of the output voltage detection means also decreases. This lowers the threshold voltage and still limits the control pulses even if the output of the output current detection means becomes lower.

This so-called drooping characteristic accelerates the overcurrent limiting function, making it possible to effectively limit the load current.

〔Example〕

FIG. 1 is a wiring diagram showing an embodiment of the switching power supply device of the present invention.

In this wiring diagram, the same parts as in Fig. 4 are given the same symbols,
The redundant functional explanation etc. will be omitted.

This circuit is similar to the comparison circuit 1 provided in the circuit of FIG.
5 and the reference power supply 5 are removed, and the output of the current detection transformer 7 is connected directly to the reset terminal (R) of the R/S latch circuit 14 through the rectifier diode 8. Note that this R/S latch circuit 14 is constituted by a C-MOS integrated circuit.

In the present invention, the auxiliary winding 23 will be referred to as output voltage detection means for monitoring the output voltage of the circuit, and the current detection transformer 7 will be referred to as output current detection means for monitoring the output current of the circuit. Furthermore, the Nant gate 13 will be referred to as a limiting circuit.

The above device operates as follows.

First, in the circuit shown in FIG. 1, during normal operation, the voltage control circuit 16 supplies control pulses to the drive circuit 12 through the R/S latch circuit 14 and the Nant gate 13 to control the switching of the switching FET 11. There is no difference from the one in Figure 4.

Here, the R/S latch circuit 14 of this circuit uses a CMO8 integrated circuit that is reset when the input terminal of the reset terminal switches from low level to high level. Normally, a C-MOS integrated circuit has a property that its threshold voltage is approximately one-half of its power supply voltage.

Therefore, when the output of the current detection transformer 7 directly connected to the reset terminal is lower than the threshold voltage, the Q output of the R/S latch circuit 14 becomes high level, and the gate of the Nandt gate 13 is opened.

FIG. 2 shows the output voltage waveform of this current detection transformer 7. When this voltage reaches the threshold voltage, R/S
The latch circuit 14 is reset.

That is, when an overcurrent flows through the main winding 21 and the input terminal of the reset terminal of the R/S latch circuit 14 becomes higher than the threshold voltage, the R/S latch circuit 14 is reset and its Q output becomes low level. Become. This closes the gate of the Nandt gate 13 and prevents the passage of the control pulse.

Thus, the width of the control pulse is limited and the output current is reduced.

Further, FIG. 3 shows overcurrent limiting characteristics of the switching power supply device of the present invention.

As the load current increases in this circuit, the overcurrent limiting function operates as described above, and the output voltage of the circuit begins to drop at the point of current I (point a in the graph). At the same time, the output voltage of the auxiliary winding 23, which functions as an output voltage detection means, decreases. Since this output voltage is used as a power source for the R/S latch circuit 14, the threshold voltage of the R/S latch circuit 14 decreases as described above.

Therefore, even if the output current decreases, the threshold voltage remains lower, acting to further decrease the output voltage. When the load current reaches point b, R/
Since the power supply voltage for startup is supplied to the S latch circuit 14 through the diode 3, the output current begins to increase,
The voltage becomes zero at the current I3.

As a result of this action, the output voltage-output current characteristic becomes a "dog" shape as shown in the third ffl, and the current limiting function is accelerated by the so-called drooping characteristic. The maximum load current (1) in this case is approximately one-half of the conventional maximum load current (12).

In this way, the maximum load current can be reduced much more effectively than the conventional characteristic shown by the dashed line.

[Modified example]

The switching power supply device of the present invention is not limited to the above embodiments.

The output current detection means, output voltage detection means, limiting circuit, etc. may be replaced with known circuit blocks having similar functions. Furthermore, each circuit block may be configured by being integrated or divided as appropriate.

〔Effect of the invention〕

According to the switching power supply device of the present invention described above,
Since the maximum load current during overcurrent limitation can be made sufficiently small, the influence on each part of the circuit and the load can be reduced.

[Brief explanation of the drawing]

Fig. 1 is a wiring diagram showing an embodiment of the switching power supply device of the present invention, Fig. 2 is an output voltage waveform diagram of its output current detection means, Fig. 3 is its output voltage-output current characteristic diagram, and Fig. 4 is FIG. 2 is a wiring diagram showing an example of a conventional switching power supply device. 7... Output current detection means (current detection transformer)
, 13... Limiting circuit (Nant gate), 14.
... C-MOS integrated circuit (R/S latch circuit), 16 ... Voltage control circuit, 23 ... Output voltage detection means (auxiliary winding).

Claims (1)

[Claims] A voltage control circuit that generates control pulses for controlling the output voltage of the circuit, an output current detection means that monitors the output current of the circuit, an output voltage detection means that monitors the output voltage of the circuit, and this output voltage detection means. The C-MOS integrated circuit has a C-MOS integrated circuit that operates by accepting the output of the controller as a driving power source, and a limiting circuit that limits the width of the control pulse to lower the output voltage in the event of an overcurrent, and the C-MOS integrated circuit includes: Accepts the output of the output current detection means and compares it with a threshold voltage dependent on the driving power supply voltage, and if the output of the output current detection means exceeds the threshold voltage, the limiting circuit operates to limit the width of the control pulse.