JPS63195870A - Digital signal processing circuit - Google Patents

Abstract

PURPOSE:To improve an error rate by removing a pseudo pulse in an output signal outputted from a zero crossing comparator which is generated due to the recessed part of an equalized reproducing signal. CONSTITUTION:Digital information recorded in a perpendicular magnetic recorder 1 is reproduced and equalized, an excess high frequency component is removed by a filter 5 and an output signal (b) from the filter 5 is inputted to an integrating circuit 7 and a delay circuit 6. An output signal from the circuit 6 is converted into binary information expressed by '1' and '0' by the zero crossing comparator 8. An output signal from the circuit 7 is converted into binary information consisting of '1' and '0' by a positive comparator 9 and a negative comparator 10. A signal (g) obtained by executing AND operation between the output signal (c) of the comparator 8 and the output signal (f) of the comparator 10 by an AND circuit 13 and a signal (h) obtained by executing AND operation between the inverted signal (c) from an inverting circuit 11 and the output signal (e) of the comparator 9 by an AND circuit 12 are inputted to an OR circuit 14 and the pseudo pulse is removed by a flip flop 15.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a digital signal processing circuit in a magnetic recording/reproducing system.

<Prior art> The isolated reproduction signal obtained from a conventional magnetic recording/reproduction device that combines a perpendicular magnetic recording medium such as Co-Cr and a ring head becomes a dipulse-shaped reproduction signal as shown in Fig. 2 (bl). (Figure 2(a) shows the recording signal.) When such a reproduced signal is equalized by an equalization circuit into a predetermined waveform form (the waveform form that gives the best error rate), the second
The zero-crossing point (C-1) of this equalized signal (cl) represents the magnetization reversal position.

For example, if MFM, which is a modulation method commonly used in magnetic recording, is used, the reproduced signal after equalization will be as shown by the solid line in FIG. 3 fbl.

Here, FIG. 3 (alt/"iM F M) shows the recording signal after modulation, FIG.
In the signal converted to value information, T indicates the reciprocal of the transfer rate.

However, if the resolution of the reproduction system is too high, the waveform of the equalized reproduction signal (bl) will become large as shown by the dotted line, and the output signal of the zero-cross comparator (cl) will generate pseudo pulses as shown by the dotted line.

<Objective> An object of the present invention is to provide a digital signal processing circuit that can improve the error rate by eliminating pseudo pulses in the output signal of a zero-cross comparator that are generated due to depressions in the reproduced signal after equalization.

<Example> A block diagram of an embodiment according to the present invention is shown in FIG.

1 is a perpendicular magnetic recording medium, 2 is a ring head, 8 is an amplifier, 4 is an equalization circuit, 5 is a low-pass filter, 6 is a delay circuit, 7 is an integration circuit, 8 is a zero cross comparator whose threshold level is zero level, 9 is a χ10 is an al comparator whose threshold level is a positive voltage level Vr1 (hereinafter referred to as a positive comparator); χ10 is a comparator whose threshold level is a negative voltage level -Vr2 (hereinafter referred to as a negative comparator, !: referred to as -t); 11 is an inverting circuit; 12.18 is an inverting circuit; An AND circuit, 14 an OR circuit, and 15 a flip 70 tube.

FIG. 4 shows signal waveforms at various parts in FIG. 1.

Next, the operation of the digital signal processing circuit of this embodiment will be explained in the order of processing with reference to FIGS. 1 and 4.

First, the digital number 7 recorded on the perpendicular magnetic recording medium 1.
Information□7g6V) 2T regenerative amplifier.

The width is increased at a predetermined voltage level. After this amplified reproduction signal is equalized into a predetermined waveform form by an equalizing circuit 4, an excess direct wave component is removed by a -pass filter 5. The output signal of the low-pass filter 5 is as shown in FIG. 4 [bl]. Here, FIG. 4 [al shows a recording signal after modulation with MFM.

Next, the output signal 6 of the low-pass filter 5 is input to the integration circuit 7 and the delay circuit 6 which delays the output signal (bl) of the low-pass filter 5 by the delay time in the integration circuit 7@.

The output signal of the delay circuit 6 is converted to 11111.1'θ''' by the zero cross comparator 8 as shown in FIG.
is converted into binary information. The pulses indicated by dotted lines in the figure are pseudo pulses. The output signal of the integrating circuit 7 is shown in FIG.
As shown in dl, the positive comparator 9. By means of the negative comparator 10, “
1" II Q '1. Then, the output signal C of the zero cross comparator 8 and the output signal f of the negative comparator lO are converted into a signal as shown in FIG. A signal C obtained by inverting the output signal C of the comparator 8 by the inverting circuit 11
The output signal e of the positive comparator 9 is converted into a signal as shown in FIG. 4 (hl) by the AND circuit 12. Furthermore, the output signal i of the OR circuit 14 is passed through the flip-flop 15 and becomes a signal from which pseudo pulses have been removed, as shown in FIG. 4 (jl).

<Effects> When the present invention described above is used, the resolution during reproduction is increased,
As a result, it is possible to eliminate the phenomenon in which the reproduced signal is dented and false pulses are generated, and the error rate can be improved. The present invention is considered to be particularly effective since the resolution of a perpendicular magnetic recording/reproducing system is much higher than that of a conventional longitudinal magnetic recording/reproducing system.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of a digital signal processing circuit according to the present invention, and FIGS. 2, 3, and 4 are signal waveform diagrams, respectively. In the figure, 1: perpendicular magnetic recording medium, 2: ring head, 3:
Amplifier, 4: Equalization circuit, 5: Low pass filter, 6: Delay circuit, 72 integration circuit, 8: Zero cross comparator,
9, 10: Comparator, 11: Inverting circuit, 12.18
: AND circuit, 14: OR circuit, 15: flip-flop.

Claims (1)

[Scope of Claims] 1. An equalization circuit that equalizes a dipulse-shaped reproduction signal obtained from a recording medium to a reproduction head into a predetermined waveform, and removing excess high-frequency components from the output signal of the equalization circuit. a zero-crossing comparator that detects a zero-crossing point of an output signal of the low-pass filter; an integrating circuit that integrates the output signal of the low-pass filter; 1 comparator, a second comparator having a threshold level on the negative voltage side of the output signal of the integrating circuit, the output of the zero cross comparator, and the outputs of the first and second comparators are introduced, and the output signal of the zero cross comparator is A digital signal processing circuit comprising a logic circuit for removing spurious pulses.