JPS63185215A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To prevent a bit of information of a flip-flop from being broken down due to an incidence of alpha rays without adding a capacity to a collector node, and to operate the titled circuit at high speed by using in the reverse direction a transistor whose collector is connected to the fetching point of a signal for the feedback of the flip-flop. CONSTITUTION:Among transistors for constituting a flip-flop, a reverse direction transistor is used for Q1, Q2, Q3 and Q4. Their collectors (usual emitters) are connected to the fetching point 11 of a feedback signal, and accordingly, even if a noise charge is collected in n<+>BL (emitters) of these transistors, its influence does not appear in the feedback signal, therefore, the inversion of information is not generated. Also, when the transistor of a side wall base electrode structure as shown in the figure is used as the transistor, an excellent reverse direction characteristic is obtained, therefore, the increase of a delay time can be prevented.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit, and particularly to a semiconductor integrated circuit that takes measures against so-called soft errors caused by charges generated by the incidence of radiation. be.

[Conventional technology]

Digital circuits used in computers and the like are generally composed of a memory IC and a logic IC.

Among these ICs, it is well known that malfunctions (so-called soft errors) occur in memory ICs due to charges generated by the incidence of radiation such as alpha rays. On the other hand, logic IC
In the past, this type of error did not occur, but as miniaturization has progressed recently, parasitic capacitance has decreased, and countermeasures against this type of error have become necessary.

FIG. 2 shows a logic diagram of an example of a flip-flop that has been widely used in the past. The circuit diagram of FIG. 3 shows the feedback loop portion (bold line portion in FIG. 2) of this flip-flop. Transistor Ql
~The collector of Q4 is connected to the collector dot at node 11, and then to the transistor QF via the emitter follower EFI.
, Qe, and the information is held. Now, consider a case where all transistors Q1 to Qa are off. In this case, node 11 is at a high level, and this output level is passed through the emitter follower to transistor Q.
5. Applied to the base of Qe to hold stored information. Conversely, even when the output node 11 is at a low level, the low level output is fed back to the combined input of the transistors Q5 and Qs, so Qa and Q4 are turned on and the stored information is held.

By the way, when the material of the package that houses the IC is frequently irradiated with alpha rays, and these alpha rays enter the silicon substrate that constitutes the IC, as shown in Fig. A hole-electron pair is generated. Because alpha particles run up to about 70 μm within the silicon substrate, as shown, most of the charge pairs are generated within the p-substrate 17 rather than within a device such as a transistor. Among these charge pairs, electrons gather in the n+ buried layer 16 (denoted as n+ BL). Now, considering the case where the output node 11 is at a high level, when noise charges (electrons) due to the incidence of α rays flow into the collectors of any of the transistors Q1 to Q4, the potential of the node 11 decreases. This potential drop is caused by the emitter follower EF
It is transmitted to node 12 via I, and the transistor Qa
, is applied to the base of Qe. Therefore, if this potential drop is large and the base voltages of Qs and Qs approach considerably the reference potential VBn, positive feedback will occur and the state of the flip-flop will be reversed. Conventionally, since the parasitic capacitance connected to the collector node 11 was large, the amount of potential drop was small and did not pose a problem. However, as miniaturization progresses, the parasitic capacitance is significantly reduced, and as a result, the amount of potential drop due to the inflow of noise charges increases, causing information inversion.

Conventionally, methods of preventing this information destruction (soft error) include increasing the amplitude of the output voltage or adding a capacitor to the output node 11.

[Problem that the invention seeks to solve]

However, if a capacitance is added to the logic circuit or the logic amplitude is increased as a countermeasure against soft errors, the resistance against soft errors improves, but the delay time increases accordingly. As a result, the purpose of aiming at higher speed by reducing the junction capacitance of transistors and the like due to miniaturization and shallower junctions is diminished.

Therefore, an object of the present invention is to provide a method for improving soft error resistance without adding capacitance.

[Means for solving problems]

The above object is achieved according to the invention by replacing at least the transistors of the logic circuit parts most sensitive to soft errors with reverse-operating transistors.

[Effect]

Generally, the noise charge generated within the substrate due to the incidence of alpha rays is
They gather in the n0 buried layer due to an electric field or diffusion. In a normal transistor, the n0 buried layer is the collector, so the collector potential (ie, signal level) fluctuates due to the inflow of noise charges. This potential fluctuation causes the level of information 1 or O to approach 0 or 1, respectively, resulting in malfunction. on the other hand,
According to the present invention, when the transistor is used in the reverse direction (the emitter, which was conventionally placed above, is used as the collector, and the n0 buried layer, which was conventionally used as the collector, is used), the above-mentioned result is obtained as shown in FIG. The noise charges will be collected on the emitter, and the influence on the signal level will be extremely small, and no malfunction will occur. (Note that FIG. 5 shows a transistor with a sidewall base electrode structure that is particularly suitable for reverse direction operation.) By the way, even when the transistor is used in the forward direction,
For example, when this transistor is used in a gate circuit, information inversion only occurs instantaneously and its influence is generally small. The circuit section most affected by noise charges is the flip-flop, and if the collector signals of the cross-coupled transistors are inverted even momentarily, the inverted information will continue to be retained. Therefore, according to the invention, it is most advantageous to use reverse-direction transistors, at least as transistors in the cross-coupled flip-flop circuit portions.

〔Example〕

FIG. 1 shows an embodiment of the present invention. In this embodiment, among the transistors constituting the flip-flop, Ql and Q
Reverse direction transistors are used for l, Qs, and Ql. The collectors (ordinary emitters) of these transistors are connected to the feedback signal take-off point 11, and therefore the yl+ of these transistors
Even if noise charges are collected on the BL (emitter), the feedback signal does not suffer from the noise, so information is not inverted. Other transistors such as QsyQ
Of course, reverse direction transistors may be used as transistors such as 6 and emitter followers. For example, if a reverse direction transistor is used for transistor Q5, Ql, Q
There is an advantage that the characteristics of the current switch made of s are symmetrical, but the resistance to alpha rays is not affected.

In addition, in order to prevent the deterioration of characteristics (increase in delay time due to decrease in hpp and ft of the transistor) due to the use of a reverse direction transistor, it is necessary to use a transistor with a sidewall base electrode structure as shown in FIG.
Since excellent reverse direction characteristics can be obtained by using JP-A-56-1556), deterioration of characteristics can be prevented.

FIG. 6 shows another embodiment of the invention. This flip-flop uses a series gate, and has two feedback loops.The feedback signal is taken from two points, lla and llb, and the emitter follower Q
It is fed back to the bases of transistors Q4 and Qa through e and Qa, respectively. Therefore, the transistors Qx, Qx and Qa whose collectors are connected to the feedback signal extraction points 11a and llb
If a reverse direction transistor is used for , Ql, the resistance to alpha rays can be dramatically improved as in the case of FIG. Of course, in this embodiment as well, reverse direction transistors may be used for transistors other than Qx to Q4, and if sidewall base electrode structure transistors are used, deterioration of characteristics due to the use of reverse direction transistors can be prevented. can.

Although the embodiments have been described above with a focus on ECL, it goes without saying that the present invention can be applied to ICs of any other logic circuit type, such as CML, TTL, NTL, etc.

Furthermore, although the present invention has been described as using reverse-direction transistors for flip-flops among the many circuits included in the IC, it is of course possible to use other reverse-direction transistors for some or all of the gate circuits, for example. It goes without saying that the use of transistors to improve alpha ray resistance is also within the scope of the present invention.

〔Effect of the invention〕

According to the present invention, at least the transistor whose collector is connected to the take-out point of the feedback signal of the flip-flop is used in the opposite direction, so that the influence of noise charges due to α rays does not appear on the feedback signal.

Therefore, without adding capacitance to the collector node or increasing the signal amplitude, it is possible to prevent information destruction in the flip-flop due to the incidence of α rays, and it is possible to increase the speed.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of an embodiment of the present invention, Figure 2 is a logic IC.
Figure 3 is a circuit diagram showing the feedback loop of the flip-flop in Figure 2, and Figure 4 is a logic diagram of a flip-flop that is often used in The noise charge is n ten buried layers (
Figure 5 is a cross-sectional view illustrating the mechanism in which noise charges collect at the emitter (collector) when the transistor is operated in the reverse direction.
FIG. 6 is a circuit diagram of yet another embodiment of the present invention.

Claims (1)

[Claims] 1. In a semiconductor integrated circuit including one or more flip-flops having a feedback loop for retaining information, at least a transistor whose collector is connected to a signal extraction point for the feedback loop is provided. A semiconductor integrated circuit that operates in the opposite direction. 2. The semiconductor integrated circuit according to item 1, wherein the transistor has a base contact taken out from a side surface of a base layer formed in a convex semiconductor.