JPS63181081A - Video processing system - Google Patents

Abstract

PURPOSE:To apply to a wide range of video processing by providing an arithmetic part provided with a state arithmetic part and a numerical arithmetic part, a high speed memory and a light arithmetic part and disposing a converting part in which the output of the light arithmetic part is inputted to the high speed memory. CONSTITUTION:The arithmetic part 1 and the converting part 2 are provided and the state arithmetic part 3 and the numerical arithmetic part 4 are included in the arithmetic part 1. The converting part 2 connects the light arithmetic part 6 to the branch of the output of the high speed memory 5 and returns the output of the light arithmetic part 6 to the input side of the high speed memory 5. Data via the light arithmetic part 6 is returned to the input side of the high speed memory 5, thereby, the same arithmetic processing can be repeatedly applied to one data or the same processing can be applied to series of data groups and sequentially stored in the high speed memory 5 and considerably various processings such as the integrating of the data, the dwindling of the data, the gradual comparison of the data can be attained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital video processing system, and more particularly to a conversion circuit effective for real-time video processing and display, real-time image analysis, and the like.

[Background of the invention and its problems]

The concept of video processing is broad, from so-called image processing technology that makes input images clearer or extracts features to recognize images, to computer graphics technology, and even chromakey used in broadcasting equipment. This includes techniques for screen compositing, screen splitting, and other special effects. Video processing systems include analog processing systems, digital processing systems, and their combined systems, and digital processing systems are important in terms of sophistication, reproducibility, quantitative performance, and diversity of processing results. It is increasing. In this digital processing system, it is necessary to treat an image as a set of pixels, and in image processing for a practical number of pixels, 111x111, the calculations for each pixel and the calculations for the correlation between pixels are enormous.

For example, to measure the particle size distribution of 512 x 512 pixels with 8 bits each for RGB, it would take about 20 minutes per screen to measure the particle size distribution using a system equipped with a 16-bit general-purpose computer and an arithmetic processor. There is an example. Even if this is calculated using a super-large computer with a processing speed of about 20M I PS, a processing time of several seconds is required.

Therefore, there has been a dedicated RC for image processing, and a CRTC for affine transformation and drawing of graphics.

A small number of ICs, such as dedicated ICs for performing certain types of image analysis with a specific number of bits, have been proposed to speed up some video processing. However, the functions of these dedicated ICs can only be applied to a narrow area of video processing technology, and when a video processing system is constructed using these ICs, the applications are extremely limited, and the cost is generally low. This results in poor performance. In addition, these ICs have not been considered for use with other ICs,
It is also practically impossible to construct a multifunctional video processing system by combining these ICs.

Additionally, specialized hardware is often configured for a particular production line. In this case, it goes without saying that the applications are limited, but the conditions of use are also generally strictly limited, and when these conditions are deviated from, an error may occur in the aS or it may become impossible to measure at all. Furthermore, it is not possible to respond quickly to the ever-changing algorithm improvements.

[Purpose of the invention]

This invention was created to solve these conventional problems, and provides a video processing system that can be applied to a wide range of video processing, is capable of faster processing than a general-purpose ultra-large computer, and has high cost performance. The purpose is to

[Summary of the invention]

The video processing system according to the present invention separates the video processing function into calculation and conversion, and the conversion section feeds back the output of the high-speed memory to its input, and a light calculation section is installed in the middle of the feedback path. By setting the light calculation section and feeding back the output light calculation results as necessary, and changing the settings of the light calculation section, it is possible to realize extremely diverse conversions even though it is a light calculation section.Also, since it is a light calculation section, the conversion speed can be On the other hand, in the arithmetic unit, the processing content is divided into state computation and numerical computation, and the state computation unit makes a judgment on each pixel, for example, whether it is a pixel to be processed or not. The result is 1-bit information, and neighboring state information is calculated based on such 1-bit information. On the other hand, the scatter value calculation section performs calculations using the pixel value of each pixel as a parameter, such as calculating the average density, and by separating the low-bit number calculations that involve judgment and the high-bit number calculations, it is extremely fast. In addition, calculations can be executed efficiently.

[Embodiments of the invention]

Next, a first embodiment of the video processing system according to the present invention will be described based on screens.

In FIG. 1, the video processing system has a calculation section 1 and a conversion section 2, and the calculation section 1 includes a state calculation section 3 and a numerical calculation section 4. Pixel data Pij are inputted individually or in batches to the calculation unit 1, and the state calculation unit 3 makes some kind of judgment regarding each pixel data P1j.This judgment may be, for example, ■The pixel itself is a processing pair aii! ■ Whether there is a pixel with a different pixel value from the pixel to be processed in the 8 neighborhood ■ Whether each pixel in the 8 neighborhood is the same as the pixel to be processed ■ The relationship between the pixel and adjacent pixels The numbers of T, F, D, and E to find Euler's number.

(Here, the values of T, F, D, and E are the number of specific arrays of adjacent pixels. In order to determine what kind of array the adjacent pixels are in, it is necessary to (The first step is to determine whether they are the same or not.) ■Otherwise, in the numerical calculation section 4, operations using the density values as parameters include: ■Density average ■First derivative ■Second derivative ■Filter processing■ Other things are done.

In this way, by using separate circuits for calculations with a low number of bits that require judgment and numerical calculations with a high number of bits, processing speed and efficiency can be increased.

The converter 2 connects a light arithmetic unit 6 to a branch of the output of the high speed memory 5, and returns the output of the light arithmetic unit 6 to the input side of the high speed memory 5. The output of the arithmetic unit 1 is connected to the data input and address input A of the high speed memory 5 via a selector 7.8. The output of the light arithmetic unit 6 is guided to the input side of the selector 7, and the selector 7 selectively guides the output of the arithmetic unit 1 and the output of the light arithmetic unit 6 to the data input side of the high speed memory 5. Data Do is input to the side, and the selector 8 selectively transfers the output of the calculation unit 1 and the data DO to the high-speed memory 5.
A high-speed static RAM or the like can be used as the high-speed memory 5 leading to the address input A of . By returning the data that has passed through the light arithmetic unit 6 to the input side of the high-speed memory 5, it is possible to repeatedly perform the same arithmetic processing on a single piece of data, or to perform the same processing on a series of data groups and then sequentially store them in the high-speed memory 5. It also becomes possible to perform extremely diverse processing such as data integration, data gradual reduction, and data successive comparison. The high-speed memory 5 is the arithmetic unit 1
Since the address A can be specified by the output or data Do, the x, y coordinates of the pixel.

It is also possible to specify based on pixel values or other data, or to sequentially increment the address using an auto counter, which has a wide variety of uses.

Of course, it is also possible to give an address to the high-speed memory 5 using data DO and use it as a table for reading data stored at that address.

C3 (chip select) and WE (write enable) signals S are inputted to the high speed memory 5, and known controls such as read and write switching of the high speed memory 5 are performed. Control of this signal S is extremely effective, for example, when writing only pixel data with a specific characteristic to the high-speed memory 5, and ignores pixels with a pixel value of "0" and integrates the number of pixels with other pixel values. This makes processing easier.

Further, data D3 is inputted to the light arithmetic unit 6 as necessary, and the content of the operation to be applied to the output of the high speed memory 5 in the light arithmetic unit 6, for example, the numerical value to be added to the output when performing addition, is determined by this data D3. Given.

Note that if the number of inputs to the selectors 7 and 8 is increased, the expandability of the conversion section will naturally increase.

FIG. 2 shows a second embodiment of the conversion circuit, and the first
In addition to the configuration of the embodiment, a selector 9 is also connected to the data input of the light calculation section 6, and data D3 is input to this selector 9. Data D5 is further input to the selector 9, and data D3. D5 switching is possible. If input data to the light arithmetic unit 6 can be selected in this way,
The expandability of the conversion section is improved. That is, it becomes possible not only to simply select the type of data, but also to transfer and feed back data between conversion units as shown in the embodiment of FIG.

In FIG. 3, a converter 2A similar to the converter in FIG.
A plurality of converters 2B, 2C, and 2D (selector 8 is omitted in the illustration) are arranged, and the outputs of the high-speed memory 5 in each converter are all input to the selector 10. Selector 1
The output of 0 is branched and input to the selector 9 of each conversion section,
The output of any one transformer can be led to the light arithmetic part of any other transformer, and the output of a transformer can be fed back to its own light arithmetic part or passed through another transformer. It is possible to provide feedback.

This makes it possible to realize extremely double-current conversion processing.

Figures 4 to 7 show specific examples of the light operation section,
The configuration of only the first embodiment is illustrated.

Figure 4 shows an example in which an adder 11 is used as a light arithmetic unit. For example, when calculating the area of a binary image or a labeled image, the pixel value can be directly specified as the address D1 without performing any calculations. , the data stored in that address is output from the high-speed memory 5, and the adder 11 adds D3 (here, set to "1") to this data and returns the value to the selector 7, and outputs the data stored in the high-speed memory 5. It is stored again at the address D1. As a result, the number of pixels of each pixel value in the image is counted, and the area of each label area is determined.

FIG. 5 shows a converting section that employs a subtracter 12 as a light operation section.The subtracter 12 receives data D3 in addition to the output of the high-speed memory 5, and the high-speed memory 5 also receives data D3. (chip select), WE (write enable)
A signal S is input. The subtracter 12 can also be realized using an adder by internally calculating the complement, and is often equivalent in concept to that in FIG. For example, when filling the distribution after flattening with each original data value, when gradually decreasing the number of each data used for "filling", etc.
Mili! The subtractor becomes important when there are many different values for i.

FIG. 6 shows a conversion unit that employs the maximum value extraction unit 13 as a light calculation unit, and FIG. 7 shows the minimum value extraction unit 14.
This figure shows a converter that employs the following. Maximum value extraction unit 13
compares the data stored in the high-speed memory with the newly introduced data and returns the larger data to the high-speed memory; conversely, the minimum value extraction unit 14 returns the smaller data to the high-speed memory; The conversion unit can be used for various purposes, but as shown in FIG.
If the maximum and minimum of y are determined by the converter, the fillet diameter can be easily determined by simply processing the final results with an MPU or the like.

FIG. 8 shows a converting section for determining the center of gravity of a figure, and is made up of three sets of converting sections 2A, 2B, and 2C similar to those in FIG. 4 connected in parallel, and each adder 11A, IIB.
, 11C, an X coordinate value Dx, a Y coordinate value Dy, and "1" are input. The conversion unit 2C to which "1" is input is the fourth
As shown in the figure, it is a circuit for quadrature, and the converting units 2A and 2B are
This circuit integrates the X and Y coordinates when the pixel data is "1". The value obtained by dividing the integrated value of the X coordinate by the area is the xi mark of the center of gravity, and the value obtained by dividing the integrated value of the Y coordinate by the area is the Y coordinate of the center of gravity. This calculation may be performed by an MPU or dedicated hardware may be provided; however, considering the versatility and compactness of the system, it is preferable to perform such a complex calculation by an MPU.

Furthermore, in a labeled image, by specifying an address using the pixel value of the pixel data and adding the DX and Dy at that time to the data stored at that address, it is possible to calculate the centroids of a plurality of labeling areas at the same time.

FIG. 9 shows a converter for determining chain coordinates and chain codes, and is made up of a combination of converters 2A and 2B. In this embodiment, the light calculation section 6 and the selector 7 are omitted.

The X coordinate value Dx is input to the data input of the converter 2A,
The y coordinate value Dy is input to the data input of the conversion unit 2B, and the address input of each conversion unit 2A, 2B and C3,
The state calculation unit 3 of the calculation unit 1 is connected to the WE large input. Image memories 15 and 16 are connected to the calculation unit 1, and the image memory 15 records the pixel value of each pixel. The arithmetic unit 1 uses the state arithmetic unit 3 to determine the starting point (for example, the point at which a scan line of a rask scan first enters the area) or the end point (for example, the point at which a scan line of a rask scan exits the area) of each labeling area. It is determined and output as a signal S, and its X coordinate value Dx is registered in the high speed memory 5 of the converter 2A, and its y coordinate value [)y is registered in the high speed memory 5 of the converter 2B. At this time, the signal S specifies writing of only the start point or end point. The state calculation unit 3 of the calculation unit 1 calculates neighborhood information P′ 1 , P′ 2 , P for each pixel based on the pixel values in the image memory 15 .

3. P"4.P"5, P'6, P'7, and P'8 are also determined and registered in the image memory 16, and at the same time, the pixel values input from the image memory 15, that is, the labeling numbers, are stored in each high-speed memory. address input. As a result, the start point coordinates or end point coordinates are registered in each high-speed memory at the address of the labeling number, and the neighborhood information of each pixel is registered in the left image memory 16. Once these pieces of information are extracted, the starting point can be accessed directly by, for example, the MPU, and then the chain coordinates and chain code can be quickly determined.

FIG. 11 shows a conversion section for determining area, circumferential length, endothelium, and complexity, and includes a conversion section 2A similar to that in FIG.
2B (the selector 7 is omitted in the illustration) is connected to the state calculation unit 3 of the calculation unit 1. The calculation unit 1 outputs a neighborhood information signal based on the pixel value of each pixel. In this example, the neighborhood information signal is 1-bit information indicating whether or not a pixel with a pixel value different from that of the target pixel exists in four neighborhoods of the target pixel. The neighborhood information signal is converted to the converter 2
The value is input to the adder 11A of A, and the value is added to the output of the high speed memory 5. The pixel value of the target pixel is input as is to the address inputs of both high-speed memories 5, and an address is assigned to each labeled area. Adder 1 is added each time an address is specified by each pixel value.
A neighborhood information signal is input to 1A, which is added to the data stored at that address and returned to the same address.

As a result, the perimeter length based on the number of boundary pixels is determined for each labeling area. - In the left substitution unit 2B, each time a pixel value is given to the high-speed memory 5, the adder 11B performs
"1" is added to the stored data of that pixel value. As a result, the number of pixels in each labeling area is integrated, and the area quality is determined. If this area and perimeter are further processed by an MPU or the like, the frequency and complexity can also be calculated. Note that the perimeter can be similarly calculated by inputting the neighborhood information signal to C8 of the converting section 2A and inputting "1" to the input section of the adder 11A as in the adder 11B.

FIG. 12 shows a conversion unit for binarization, multi-value conversion, and pseudo color conversion (the light operation unit and the data input selector are omitted from illustration). The numerical arithmetic unit 4 of the arithmetic unit 1 is connected to the address input. An image memory 15 in which pixel values of all pixels are recorded is connected to the calculation section 1, and another image memory 16 is connected to the output of the high speed memory 5. The high-speed memory 5 stores density values or RGB values (data) corresponding to the color code (address) in advance, and the calculation unit 1 calculates the color code from the pixel values in the image memory 15. In the above processing, pixel values are converted into color codes of "0" or "1" at a certain threshold level, and in multi-value conversion, multi-gradation color codes are generated using a plurality of threshold levels. When performing pseudo coloring, the high speed memory 5 stores R and G for one color code.

B Values for each color are generated. The density values or RGB values output from the high-speed memory in this way are stored in the image memory 16.
written and displayed.

FIG. 13 shows a converter for determining the first-order moment around the X-axis in a binary image, and uses converters 2A and 2B similar to those in FIG. 4.

However, in the converting section 2A, the selector 7 is omitted, and in the converting section 2B, the selector 7 and the light beam section are omitted.

The high-speed memory 5 of the conversion unit 2A contains the signals of C8 and WF.
iLS and 1. Calculation part 1 without being subjected to any A
A pixel value is input from , and when the pixel value is "1", writing to the high speed memory 5 is performed. The X coordinate value Dx is input as an address input to the high speed memory 5 of the converter 2A,
The y-coordinate value Dy is input to the high-speed memory 5 of the converter 2B as an address input. High-speed memory 5 of converter 2B
The n-th power of a certain value is stored as a table, and in response to the input of Dy, the n-th power of Dy is output.6The output is input to the adder 11 of the converter 2A,
It is added to the data of the corresponding X coordinate value Dx stored in the high speed memory 5 of the tower section 2A. That is, in the g detection circuit 2A, the value of Dy is integrated and stored for each value of Dx. By summing this integrated value for all Dx, the first moment can be obtained.

FIG. 14 shows a converter for determining Euler's number, and the converters 2A, 2B, 2C, and 2D are similar to those in FIG.
The arithmetic unit 1 is connected to the address input of each high-speed memory 5. The state calculation unit 3 in the calculation unit 1 inputs the pixel value of each pixel as Dl to each high-speed memory 5,
Based on the neighborhood information of each pixel, the values of indices T, F, D, and H for determining the Euler number are output as continuous bit string information I (T, F, D, Fl, and 1. 1
(T, F, D, E)liT extraction I] It is input to the adder 11 of each conversion circuit 2A, 2B, 2C12D via 1Ni7, F extraction circuit 18, D extraction circuit 19, and E extraction circuit 20. Each extraction circuit extracts the respective bit positions of T, F, D, and E and extracts the values of T, F, D, and E, and the extracted values are integrated for each labeling area in each conversion circuit. and stored in the high-speed memory 5. The Euler number is expressed as G4 (4 neighborhood) and G8 (8 neighborhood), and if the area of each labeling region is ▪, then it is given by G4=VE+F G8=VE o+T F .

In the above embodiments, addition and subtraction, maximum and minimum value extraction were exemplified as the contents of light operations in the conversion unit, but in addition to these, numerical operations such as absolute values, comparisons, AND, 0R1NAND, NOR, EX-O
Logical operations such as R+EX-NOR can be freely selected and adopted.

And since the conversion part is equipped with high-speed memory.

As a general lookup table for data reference such as referencing RGB values from so-called color codes,
Alternatively, when labeling images, etc., it can be applied as a key/slash memory that stores labeling information at high speed. In this case, the timing for outputting the labeling information is given from the neighborhood information signal, a counter (address counter) is provided to specify the address of the high-speed memory of the converter, and this address counter is incremented by the neighborhood information signal. address can be specified.

Further, the selector includes any switching means such as a wired OR.

〔Effect of the invention〕

As mentioned above, the video processing system according to the present invention separates the video processing function into calculation and conversion, and in the conversion section, the output of the high-speed memory is fed back to its input, and in the middle of the feedback path, A light calculation section is provided as needed.

By feeding back the output light calculation results and changing the settings of the light calculation section, it is possible to perform extremely diverse conversions even though it is a light calculation section. The processing content is divided into state calculation and numerical calculation in the state calculation part, and the state calculation part makes a judgment on each pixel, for example, whether it is a pixel to be processed or not, and converts the judgment result into 1-bit information. , neighborhood state information is calculated based on such 1-bit information. On the other hand, the scatter value calculation section performs calculations using the pixel value of each pixel as a parameter, such as calculating the average density, and by separating low-bit calculations that require judgment from high-bit numerical calculations, it is extremely fast. It also has the excellent effect of efficiently executing calculations.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a first embodiment of a video processing system according to the present invention, FIG. 2 is a block diagram showing a second embodiment, FIG. 3 is a block diagram showing a third embodiment, and FIG. ~ Figure 7 is a block diagram showing aspects of the light calculation section in the first embodiment, Figure 8 is a block diagram showing a modified example that combines the aspects of Figure 4, and Figures 9 to 14 are other diagrams. It is a block diagram showing a modification of . 1... Arithmetic unit, 2, 2A, 2B, 2C12D.
... Conversion section, 3 ... State calculation section, 4...
... Numerical calculation section, 5 ... High speed memory, 6.
...Light calculation section, 7, 8.9.10, ...
Selector, 11.11A, 11B...adder,
12...Subtractor, 13...Maximum value extraction unit, 14...Minimum value extraction unit, 15.16...
...Image memory, 17...T extraction circuit, 18
......F extraction circuit, 19...D extraction circuit, 20...E extraction circuit. A: Address input, D: Data input, Do, Di, D2. D3...Data, S.
...Signal, I (T, F, D, E) ...Parameters for determining Euler's number.

Claims (1)

[Claims] (1) An arithmetic unit that includes a state arithmetic unit that includes an arithmetic operation that obtains 1-bit information that means the judgment result for each pixel, and a numerical arithmetic unit that performs an arithmetic operation using the pixel value of each pixel as a parameter, and this arithmetic unit. a high-speed memory into which the output of the unit is input, a light calculation unit connected to a branch of the output of the high-speed memory, and a conversion unit into which the output of the light calculation unit is input to the switching means. processing system.