JPS63179792U - - Google Patents
Info
- Publication number
- JPS63179792U JPS63179792U JP7025887U JP7025887U JPS63179792U JP S63179792 U JPS63179792 U JP S63179792U JP 7025887 U JP7025887 U JP 7025887U JP 7025887 U JP7025887 U JP 7025887U JP S63179792 U JPS63179792 U JP S63179792U
- Authority
- JP
- Japan
- Prior art keywords
- charging
- switching means
- circuit
- capacitor
- switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 5
- 238000007599 discharging Methods 0.000 claims description 3
- 238000012935 Averaging Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
Landscapes
- Dc-Dc Converters (AREA)
Description
第１図は本考案の一実施例を説明する回路図で
ある。
１１……トランス巻線、１２……整流用ダイオ
ード（第１のスイツチング手段）、１３……充電
用抵抗、１４……コンデンサ、１５……放電用抵
抗、１６……スイツチ用ダイオード（第２のスイ
ツチング手段）、１７……負荷抵抗、１８……ス
イツチ回路。
FIG. 1 is a circuit diagram illustrating an embodiment of the present invention. 11...Transformer winding, 12...Rectifier diode (first switching means), 13...Charging resistor, 14...Capacitor, 15...Discharging resistor, 16...Switching diode (second switching means) switching means), 17...Load resistance, 18...Switching circuit.
Claims (1)
を得てパルス幅変調制御により前記スイツチング
動作に帰還をかけるパルス幅変調型電源において
、 前記オンオフ出力を整流する第１のスイツチン
グ手段と、 前記平均値を得る平均化回路が、第１のスイツ
チング手段を介して前記スイツチング動作の出力
をコンデンサに充電する充電回路と、前記第１の
スイツチング手段がオフの場合に第２のスイツチ
ング手段を介して前記コンデンサの電荷を放電す
る放電回路とを有し、充電回路と放電回路との時
定数を等しくしたこと を特徴とするパルス幅変調型電源。[Claims for Utility Model Registration] In a pulse width modulation power supply that obtains an average value of on/off outputs due to switching operations and applies feedback to the switching operations through pulse width modulation control, a first switching means for rectifying the on/off outputs; , the averaging circuit for obtaining the average value includes a charging circuit for charging a capacitor with the output of the switching operation via a first switching means, and a charging circuit for charging a capacitor with the output of the switching operation via a first switching means, and a charging circuit for charging a second switching means when the first switching means is off. A pulse width modulation type power supply comprising: a discharging circuit that discharges the charge of the capacitor via the capacitor, and the time constants of the charging circuit and the discharging circuit are made equal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7025887U JPH0640475Y2 (en) | 1987-05-13 | 1987-05-13 | Pulse width modulation type power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7025887U JPH0640475Y2 (en) | 1987-05-13 | 1987-05-13 | Pulse width modulation type power supply |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63179792U true JPS63179792U (en) | 1988-11-21 |
| JPH0640475Y2 JPH0640475Y2 (en) | 1994-10-19 |
Family
ID=30911735
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7025887U Expired - Lifetime JPH0640475Y2 (en) | 1987-05-13 | 1987-05-13 | Pulse width modulation type power supply |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0640475Y2 (en) |
-
1987
- 1987-05-13 JP JP7025887U patent/JPH0640475Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0640475Y2 (en) | 1994-10-19 |