JPS63179678A - High definition still picture reproducing circuit - Google Patents

Abstract

PURPOSE:To attain sure still display even to a moving picture part by introducing an interpolation data in a field or an inter-frame interpolation data selectively during the still picture reproducing period. CONSTITUTION:In throwing a still picture switch S1 for moving picture to the position of earth, a low level voltage is inputted to a changeover switch 3, a mixing ratio switching circuit 8 and a memory control circuit 2. As a result, the memory control circuit 2 inhibits the write in the timing when the AD conversion is finished in the video period and only the readout is executed without changing the write state of memories M1-M4. Moreover, the changeover switch 3 is thrown to the position of a 1st memory M1, to form the inter-field interpolation data by the read data of the 1st memory M1. Moreover, the mixing rate changeover circuit 8 sets the mixing ratio of the inter-frame interpolation data in the mixing circuit 7 and inputs only the in-field interpolation data to a TCI decode circuit 9. Thus, even when the moving picture is in stand still, the still picture reproduction is applied by the in-field interpolation data without flair.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a high-definition still image reproducing circuit employed in a band compression decoder that converts a band pressure line video signal into a high-definition video signal.

Conventional technology A high-definition TV system using the above method was proposed by NHK, and its outline can be found in the magazine ``Nikkei Electronics 19''.
This method, introduced on pages 112 to 116 of the March 12, 1984 issue, performs frame-to-frame interpolation of video data using memory for four fields, as described in the above magazine. Therefore, still images can be easily displayed by controlling the operation of the memory.

Therefore, as shown in Japanese Patent Application Laid-Open No. 191596/1982, the present applicant prohibited writing into the memory for the above four fields and repeatedly read the same contents from this memory to perform a static P display. We first proposed a high-definition TV system with high quality.

(c) Problems to be Solved by the Invention However, in the system disclosed in the above publication, in the still display mode, a still image is always created using four fields worth of video signals from the memory, so the original high-quality image cannot be reproduced. When the signal is a video, the still image will be blurred and look unnatural.

Therefore, the present invention makes it possible to reproduce still images that can reliably display even the first part.

B) Means for solving the problem Therefore, the present invention provides an input prohibition means for prohibiting writing of AD conversion data to memory during the still image reproduction period;
input switching means for supplying one field's worth of read data from the memory to the intra-field sleeve circuit during a still image reproduction period; and a selection for selectively deriving intra-field sleeve data or frame 1 contrast data during a still image reproduction period; The deriving means are arranged in each band compression decoder.

(e) According to the present invention, intra-field data is derived from the read data read from one field of the memory, and inter-frame data read from four fields of the memory. are formed, and a high-quality still image video signal is formed from only one of the complementary data by the action of the selection and derivation means.

(F) Embodiment A band-compressed video signal input from a playback device such as a player is converted into 8-bit AD conversion data at a frequency of 16.2 MH2 in an AD conversion circuit (1).

AD conversion data is transferred to the selector switch (3) under normal conditions.
(Input switching means)
is input. This in-field circuit (3) receives 64.8 MHz from only the current AD conversion data that is input.
z field inner sleeve 1 - form data. On the other hand, AD conversion data is stored in the first memory (M
l) ζ is written. In addition, the first to fourth memories (Ml) to
(M4) is controlled by the memory control circuit (2) for writing and reading, and is read out in one field period, first memory (Ml) → second memory (M2) → third memory (M5).
→It is sequentially transferred to the fourth memory (M4). Therefore, the AD conversion data and the read data from the first to fourth memos IJ (Ml) to (M4) are input to the interframe interpolation circuit, and the AD conversion data for four fields are synthesized to produce a high-definition image. Interframe interpolation data of 64.8MH2 is formed. The same data for both gods is input to the mixing circuit (7).

The mixing ratio of this mixing circuit (7) is set according to the difference between the read data of the fourth memory (M4) and the AD conversion data that are input to the motion detection circuit (5). That is, the motion detection circuit (
5), when the difference between both data is large, it is assumed that the image has a large sharpness and the mixing ratio of intra-field interpolated data is increased, and when the difference between both data is small, the movement of the image is considered to be small. The mixing ratio of the inter-frame interpolated data is set to a large value. Mixed data is processed by TCI decoding circuit (9)
After being input into and synchronized, it is DA-converted and derived in a DAAD conversion circuit O).

The configuration described above is a well-known configuration as a band compression decoder, and the feature of this embodiment lies in the following configuration that enables still image reproduction.

In this embodiment, the first still image switch (Sl) for moving images is connected to the first terminal (T1) of the mixing ratio switching circuit (8), and the second terminal (T2) of the mixing ratio switching circuit (8) is connected to the first still image switch (Sl) for moving images. A second still image switch (S2) for still images to be connected is arranged.

Both still image switches (Sl) (S2), in a steady state where they are switched to the open end side, send a high-level voltage to the mixing ratio switching circuit (8), the memory control circuit (2), and the changeover switch (3). ) is entered.

First, when the first still image switch (Sl) for moving images is switched to the ground side, the selector switch (3), the mixing ratio switching circuit (8), and the memory control circuit (2) 1 are set to low level voltage. is input. As a result, the memory control circuit +21 prohibits writing at the timing when the AD conversion of the video period is completed, and thereafter only reads out each of the memos IJ(Ml) to (M4) without changing the writing state. urge

Further, the changeover switch (3rd pin) is switched to the 1st memory IJ (Ml) side, and field inner dark data is formed by the read data of the 1st memory (Ml).Furthermore, the mixing ratio switching circuit ( 8), when the first input terminal (T1) becomes low level, the mixing ratio of the interframe interpolation data in the mixing circuit (7) is set to 0, and only the inner field dark data is sent to the TCI decoding circuit. (9).Accordingly, when the first still image switch (Sl) is operated, even if the moving image is stopped, the still image is reproduced without blurring using intra-field interpolated data.

On the other hand, when the second still image switch (S2) is switched to the ground side, a low level voltage is input to the memory control circuit (2) and the mixing ratio switching circuit (8).

The memory control circuit (2) receives a low level input,
At the timing when the AD conversion of the video period is completed, writing of the valley notes IJ (Ml) to (M4) is prohibited, and reading is executed while the writing state is fixed. This read data forms frame dark interpolation data (4). When a low level voltage is input to the second input terminal (T2), the mixing ratio switching circuit (8) sets the mixing ratio of the inner field dark data in the mixing circuit (7) to 0, and changes the mixing ratio between frames. Only interpolated data is derived.

Therefore, when the second still image switch (S2) is operated,
Still image playback is performed using inter-frame complementary data, realizing still image playback of a motionless screen with high clarity.

Therefore, for a moving screen, due to the effect of the first still image (g) invention, according to the present invention, the memory control circuit (2) is made to function as an input inhibiting means, and the changeover switch (3) is used to switch the input. By simply allowing the mixing circuit (7) and the mixing ratio switching circuit (8) to function as selection deriving means, appropriate still image reproduction can be performed according to the movement state of the screen.
The effect is great.

[Brief explanation of the drawing]

The figure shows a circuit block diagram of a band compression decoder employing the present invention. (2;...Memory control circuit, (3)...Selector switch, (7)...Mixing circuit, (8)...Mixing switching circuit, (6)...Intra-field interpolation circuit, ( 4)...Interframe interpolation circuit, (Ml) to (M4)...first to fourth memories.

Claims (1)

[Claims] (1) A compressed video signal obtained by band-compressing a high-quality video signal using the TCI multiplex subsampling method is AD-converted, and the AD-converted data is sequentially stored in a memory for 4 fields, while frames are framed based on the read data. forming interpolated data, forming intra-field interpolated data based on the AD conversion data, mixing the inter-frame interpolated data and the intra-field interpolating data based on the motion detection output, and TCI decoding the mixed data; In a band compression decoder that performs DA conversion to form a high-quality video signal, input prohibition means for prohibiting writing of the AD converted data to the memory during still image reproduction, and intra-field interpolation during still image reproduction are provided. an input switching means for supplying one field of read data from the memory to the circuit; and a selection deriving means for selectively deriving the intra-field interpolated data or the inter-frame interpolated data without mixing them during a still image reproduction period; High-quality still image playback circuits each arranged separately.