JPS63178916U - - Google Patents

Info

Publication number
JPS63178916U
JPS63178916U JP6958987U JP6958987U JPS63178916U JP S63178916 U JPS63178916 U JP S63178916U JP 6958987 U JP6958987 U JP 6958987U JP 6958987 U JP6958987 U JP 6958987U JP S63178916 U JPS63178916 U JP S63178916U
Authority
JP
Japan
Prior art keywords
ultrasonic delay
lead wires
delay line
input
terminal pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6958987U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6958987U priority Critical patent/JPS63178916U/ja
Publication of JPS63178916U publication Critical patent/JPS63178916U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図と第2図は本考案の実施例を示すもので
あり、このうち、第1図は超音波遅延媒体を基板
の一方の側にのみ配した場合の平面図、第2図は
基板の両側に超音波遅延媒体を配した場合の平面
図である。第3図イ,ロは第1図の実施例におい
て出力信号の極性を反転させる場合のリード線の
接続関係を示す説明図である。第4図は従来例を
示す平面図、第5図は第4図におけるリード線の
接続構造を示す拡大図である。 1……超音波遅延媒体、2……入出力用圧電素
子、3……基板、4……リード線、5……端子ピ
ン、6……通孔、7……回路パターン、8……舌
片部、9……溝部、10……案内溝。
Figures 1 and 2 show embodiments of the present invention, of which Figure 1 is a plan view in which the ultrasonic delay medium is arranged only on one side of the substrate, and Figure 2 is a plan view of the substrate. FIG. 3 is a plan view of a case where ultrasonic delay media are arranged on both sides of the waveguide. 3A and 3B are explanatory diagrams showing the connection relationship of the lead wires when the polarity of the output signal is inverted in the embodiment of FIG. 1. FIG. 4 is a plan view showing a conventional example, and FIG. 5 is an enlarged view showing a lead wire connection structure in FIG. 4. DESCRIPTION OF SYMBOLS 1...Ultrasonic delay medium, 2...Piezoelectric element for input/output, 3...Substrate, 4...Lead wire, 5...Terminal pin, 6...Through hole, 7...Circuit pattern, 8...Tongue Piece part, 9...Groove part, 10...Guide groove.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] リード線を介することで基板に植設されている
端子ピンと超音波遅延媒体に配設されている入出
力用圧電素子とをそれぞれ接続してなる超音波遅
延線において、入力側のリード線が接続される端
子ピンと、出力側のリード線が接続される端子ピ
ンとの間に位置する基板の側縁部には、刻設され
た1対の溝部を介することで舌片部を区画形成し
、この舌片部には、最外側に位置するいずれか一
方の端子ピンと導通させた回路パターンを形成し
たことを特徴とする超音波遅延線。
In the ultrasonic delay line, which connects the terminal pins implanted on the board and the input/output piezoelectric elements arranged in the ultrasonic delay medium through lead wires, the input side lead wires are connected. On the side edge of the board located between the terminal pin to be connected and the terminal pin to which the output side lead wire is connected, a tongue piece is defined by a pair of carved grooves. An ultrasonic delay line characterized in that a tongue part is formed with a circuit pattern that is electrically connected to one of the outermost terminal pins.
JP6958987U 1987-05-12 1987-05-12 Pending JPS63178916U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6958987U JPS63178916U (en) 1987-05-12 1987-05-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6958987U JPS63178916U (en) 1987-05-12 1987-05-12

Publications (1)

Publication Number Publication Date
JPS63178916U true JPS63178916U (en) 1988-11-18

Family

ID=30910459

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6958987U Pending JPS63178916U (en) 1987-05-12 1987-05-12

Country Status (1)

Country Link
JP (1) JPS63178916U (en)

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