JPS63178376A - Bar code pattern recognizing device - Google Patents

Abstract

PURPOSE:To remove a signal generated by a spot or a void from a quantizing circuit by calculating exclusive OR between a one-bit shift output of a shift register and the output obtained by shifting optional bits and detecting the level of the one-bit shift output by the rising of the initial clock after the falling of the exclusive OR output to output a quantizing signal. CONSTITUTION:A binary signal from a binarizing circuit 12 is fetched into the shift register 21, the exclusive OR operation between the one-bit shift output from the register 21 and an optional-bit shift output is calculated and the level of the one-bit shift output is detected by the rising of the initial clock after the falling of the exclusive OR output to form a quantizing signal. Consequently, a binary signal with bit width smaller than that of an optional-bit signal can not be regarded as a correct signal and is removed. Thereby, a signal generated by a spot or a void can be removed from the quantizing circuit.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a barcode pattern recognition device.

[Prior art] ゛Barcode pattern recognition 111! For example, a barcode printed on a label or the like is scanned with a laser beam, the reflected light is received by a light receiver, converted to 2ils by a signal processing binarization circuit, and the 21-ized signal is quantized by a quantization circuit. A run length counter converts the width of the white or black bar into a digital quantity, a recognition circuit recognizes the barcode pattern, and the recognition information is transmitted to a data processing device.

In such a barcode pattern recognition device, the conventional quantization circuit is constructed of a simple circuit using a D-type flip 70 tube 1 as shown in FIG. This circuit inputs the binarized signal from the binarization circuit to the D input terminal of the 7-lip-flop 1, inputs the clock to the T input terminal, and outputs the quantized signal from the Q output terminal.

[Problems to be Solved by the Invention] In such a quantization circuit, the clock shown in FIG. 7(a) is input to the flip-flop 1, and the clock shown in FIG. 7(b) is input to the flip-flop 1.
When a binary signal corresponding to the barcode shown in Figure 7(C) is input, the level state of the binary signal is set at the rising edge of the clock, so the quantized signal shown in Figure 7(C) is output from the Q output terminal. It will be output. However, in this circuit, if a small spot occurs due to dirt in the white bar, for example, that spot is input as the 21i signal shown in FIG.
A quantized signal as shown in Figure (C) will be output.

As described above, in conventional quantization circuits, if there are spots or voids in a barcode, they cannot be removed and the spot or void is output as a single product signal, so there is a risk that it may be mistakenly read as a bar.

For this reason, it is conceivable to remove signals due to these spots and voids using a recognition circuit in the subsequent stage, but doing so requires a complicated circuit, and there is a problem that processing cannot be performed in real time.

The present invention has been made in view of these points, and it is an object of the present invention to provide a barcode pattern recognition device that can remove signals generated by spots and voids in a quantization circuit.

[Means for Solving the Problems] The present invention converts the barcode pattern signal output from the barcode pattern detector into 21 in a binarization circuit, quantizes the 2il signal in a quantization circuit, and then performs a run. In a barcode pattern recognition device that converts the width of a bar into a digital quantity using a length counter and further performs barcode pattern recognition using a recognition circuit, a quantization circuit is synchronized with a clock to output a binary signal from the binarization circuit. An n-bit (n≧2) shift register that takes in the data, an exclusive OR circuit that takes an exclusive OR of the 1-bit shift output of this shift register and any bit shift output, and The output circuit detects the level of the 1-bit shift output of the shift register at the first rising edge of the clock after the falling edge, and outputs a quantized signal according to the detected level.

[Operation] In the present invention having such a configuration, the binarized signal from the binarization circuit is taken into the shift register, and the exclusive OR of the 1-bit shift output of the shift register and the arbitrary bit shift output is performed. , Furthermore, since the level of the 1-bit shift output of the shift register is detected at the first clock rise after the fall of the exclusive OR output and the quantization signal is created, the bit width smaller than the arbitrary bit can be binarized. The signal is not regarded as a valid signal and is removed.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

As shown in FIG. 1, a barcode pattern signal output from a barcode pattern detector 11 is supplied to a signal processing binarization circuit 12. As shown in FIG.

The barcode pattern detector 11 includes a laser light source 1
The laser beam outputted from 3 is reflected by the rotating polygonal surface 1114 and deflected, and is irradiated onto an article passing above the reading window 15 to scan the bar code attached to the article at a high speed. The reflected light from the article is received by the light receiver 16 and a barcode pattern signal is output to the 211 conversion circuit 12.

The binarization circuit 12 amplifies the input pattern signal, then binarizes it based on a certain reference level, and supplies the binarized signal to the quantization circuit 17.

The quantization circuit 17 quantizes the binary signal into a signal synchronized with a clock, and supplies the quantized signal to the run length counter 18.

The run length counter 18 converts the widths of the white and black bars into digital amounts based on the quantized signal, and supplies the converted signal to the recognition circuit 19. This fi11 circuit 19
detects a bar code from a run-length data string that is a converted signal, then checks guard bars and margin center bars, and then performs character decoding.

Then, by the recognition circuit 19, i! ! Information on the identified barcode is input to the editing circuit interface 20, and the decoded character string is subjected to parity check, modulus check, and scanning direction conversion, and then output to the data processing device.

As shown in FIG. 2, the quantization circuit 17 is provided with, for example, an 8-bit shift register 21, and its 01 input terminal is
In addition to inputting the value signal, a clock is input to the CK input terminal.

A 1-bit shift output from the output terminal Q1 of the shift register 21 and an 8-bit shift output from the output terminal Qs' are supplied to an exclusive OR circuit 22. The output of the exclusive OR circuit 22 is input to the D input terminal of the D-type flip 70 tube 23.

A clock is input to the input terminal of this flip-flop 23.

The flip-flop 23 inputs its d output terminal output to the T input terminal of another D-type flip 7O tube 24. The 1-bit shift output of the shift register 21 is input to the D input terminal of the flip 70 tube 24. A quantized signal is output from the Q output terminal of this flip-flop 24.

Note that each of the flip-flops 23 and 24 constitutes an output circuit.

Next, the operation of this embodiment having such a configuration will be described with reference to FIG. 3 and the fourth factor.

With the clock shown in FIG. 3(a) being input to the T input terminal of the shift register 21 and flip-flop 23 of the quantization circuit 17, the bar width is correctly detected as shown in FIG. 3(b). When the binary signal is input to the shift register 21, the 2i1 signal is shifted in synchronization with the clock, so the output signal from the 01 output terminal is as shown in Figure 3 (C). become. Also, since the output from the Q8 output terminal is shifted by 8 bits from the input bit, it becomes as shown in FIG. 3(d).

Therefore, the 1-bit shift output < 01 output) and the 8-bit shift output (Qs ratio output) are supplied to the exclusive OR circuit 22, and the exclusive OR is taken to obtain the exclusive OR output shown in FIG. 3(e). That is, when the bar width is normal, there is a section in which both the 1-bit shift output and the 8-bit shift output are at a high level, and the exclusive OR output in that section is at a low level.

In the flip-flop 23, the exclusive OR output is held at the rising edge of the clock. That is, the low level exclusive OR output is held. As a result, the signal shown in the force cylinder diagram (f) is output from the fmllfj force terminal of the flip 70 knob 23. Then, the 1-bit shift output of the shift register 21 is held in the flip-flop 24 in synchronization with the rise of this output, that is, the first rise of the clock after the fall of the exclusive OR output. At this time, the 1-bit shift output is at a high level, so the flip-flop 24 holds the high level, and its Q output terminal outputs a high-level quantized output as shown in Figure 3 (Q). will be done. This state will be Q1 after that
When the output falls and the exclusive OR output rises, then the QB ratio output falls and the exclusive OR output falls, and then the output from the Q output terminal of the flip-flop 23 rises with the rise of the first clock. will continue until

In this way, a quantized signal having a width corresponding to the width of the input 21I signal and synchronized with the clock is obtained.

Also, as shown by the solid line in Figure 4(b), when the width of the binary signal is smaller than 8 bits, for example around 7 bits, it is shifted as shown in Figures 4(C) and (d). Q of register 21! When the specific output falls, the 08 output rises. Therefore, the exclusive OR output is shown in Figure 4 (
As shown in e), since a state in which both the 01 output and the 08 output become high level does not occur, the high level state continues.

Therefore, the output from the ζ output terminal of the flip-flop 23 rises as shown in FIG.
1's 08 output falls, the exclusive OR output falls, and then the first clock rises.At this time, the Q1 output of the shift register 21 is already at a low level, so it is shown in Fig. 4 (Q). As shown, the 7 lip-flop 24 does not output a quantized signal.

Furthermore, as shown by the dotted line in the figure, when the width of the binarized signal is about 1 bit, the exclusive OR output falls due to the fall of the 01 output of the shift register 21 and the fall of the QB ratio output, which causes the flip-flop to Even if the ζ output terminal output of 23 rises, the 01 output is always at a low level at that time, so no quantized signal is generated from the Q output terminal of flip 70 tube 24 at this time.

In this way, 21 signals of 7 bits or less can be removed. Therefore, if the width of the white and black bars of the barcode is at least 8 bits or more, the correct barcode will be reliably quantized by the quantization circuit 17, and the quantization circuit 17 will surely quantize the barcode, and the quantization caused by contamination such as spots or voids of 7 bits or less will occur. Thus, the binary signal can be reliably removed. Since this removal process can be performed in real time, the barcode recognition process can be performed quickly.

Next, another embodiment of the invention will be described with reference to the drawings.

Note that the same parts as in the above embodiment are given the same reference numerals and detailed explanations will be omitted.

As shown in FIG. 5, the outputs from the output terminals 01 to Q8 of the shift register 21 are input to the input terminals X0 to X7 of the multiplexer 24, and which input signal is output from the output terminal Y of the multiplexer 24. is determined by the select input to the input terminal Aa=A2,
The output from the output terminal Y is supplied to an exclusive OR circuit 22. Note that the other input to the exclusive OR circuit 22 is the Q1 output as in the previous embodiment.

In such a configuration, the output of the shift register 21 which takes an exclusive OR by the exclusive OR circuit 22 is the Q1 output, and the other is output by the multiplexer 24 from 02 output to
Any selection can be made within the Q8 output range.

Therefore, even if there is some variation in the white and black bar widths of the barcode, the spots and voids will be adjusted accordingly.
Can perform removal processing of digitized signals. That is, fine adjustment of signal removal becomes possible.

In the above embodiment, an 8-bit shift register was used, but it is needless to say that the shift register is not limited to this.

[Effects of the Invention] As described in detail above, according to the present invention, barcode pattern recognition is possible in which signals generated by spots and voids can be removed in a quantization circuit. @1 can be provided.

[Brief explanation of the drawing]

Figures 1 to 4 show an embodiment of the present invention. Figure 1 is a block diagram, Figure 2 is a specific circuit diagram of a quantization circuit, and Figures 3 and 4 are quantization circuits. FIG. 5 is a specific circuit diagram of a quantization circuit showing another embodiment of the present invention, FIG. 6 is a circuit diagram showing a conventional example, and FIGS. The figure is a timing waveform diagram for explaining the operation of the conventional example. DESCRIPTION OF SYMBOLS 11... Barcode pattern detector, 12... Signal processing binarization circuit, 17... Quantization circuit, 18... Run length counter, 19... Recognition circuit, 21...
8-bit shift register, 22... exclusive OR circuit,
23.24...D type flip 70 knobs.

Claims (2)

[Claims] (1) Binarize the barcode pattern signal output from the barcode pattern detector with a binarization circuit, quantize the binarized signal with a quantization circuit, and then measure the width of the bar with a run length counter as a digital quantity. In the barcode pattern recognition device, the barcode pattern recognition device further performs barcode pattern recognition by a recognition circuit. n≧2), an exclusive OR circuit that takes an exclusive OR between the 1-bit shift output of this shift register and any bit shift output, and the first clock after the fall of the exclusive OR circuit output. 1. A barcode pattern recognition device comprising: an output circuit that detects the level of the 1-bit shift output of the shift register at the rising edge of , and outputs a quantized signal according to the detected level. (2) The barcode pattern recognition device according to claim (1), wherein arbitrary bit shift output from the shift register is selectively performed using a multiplexer.