JPS63175250U - - Google Patents
Info
- Publication number
- JPS63175250U JPS63175250U JP6422687U JP6422687U JPS63175250U JP S63175250 U JPS63175250 U JP S63175250U JP 6422687 U JP6422687 U JP 6422687U JP 6422687 U JP6422687 U JP 6422687U JP S63175250 U JPS63175250 U JP S63175250U
- Authority
- JP
- Japan
- Prior art keywords
- storage device
- clock
- circuit
- cycle
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010365 information processing Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6422687U JPS63175250U (sl) | 1987-04-30 | 1987-04-30 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6422687U JPS63175250U (sl) | 1987-04-30 | 1987-04-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63175250U true JPS63175250U (sl) | 1988-11-14 |
Family
ID=30900190
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6422687U Pending JPS63175250U (sl) | 1987-04-30 | 1987-04-30 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63175250U (sl) |
-
1987
- 1987-04-30 JP JP6422687U patent/JPS63175250U/ja active Pending
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