JPS63174732U - - Google Patents
Info
- Publication number
- JPS63174732U JPS63174732U JP15167986U JP15167986U JPS63174732U JP S63174732 U JPS63174732 U JP S63174732U JP 15167986 U JP15167986 U JP 15167986U JP 15167986 U JP15167986 U JP 15167986U JP S63174732 U JPS63174732 U JP S63174732U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- output signal
- switch
- sends out
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009499 grossing Methods 0.000 claims description 3
- 238000001514 detection method Methods 0.000 claims 2
- 230000010354 integration Effects 0.000 claims 2
- 230000009131 signaling function Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第１図はこの考案の実施例を示す回路図、第２
図は従来の信号平滑回路を示す回路図である。
図において、１ａ，１ｂ……演算増幅器、４ａ
……選択スイツチ、４ｂ……開閉スイツチ、５ａ
，５ｂ……電池。なお、図中、同一符号は同一ま
たは相当部分を示す。
Figure 1 is a circuit diagram showing an embodiment of this invention, Figure 2 is a circuit diagram showing an embodiment of this invention.
The figure is a circuit diagram showing a conventional signal smoothing circuit. In the figure, 1a, 1b... operational amplifier, 4a
...Select switch, 4b...Open/close switch, 5a
, 5b...Battery. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
検出する比較回路、上記出力信号を送出する積分
回路、上記比較回路の検出信号に対応する極性の
正もしくは負の電圧を選択・増幅して開閉スイツ
チを介し上記積分回路に入力する補正回路を有し
、上記出力信号と入力信号の偏差が零である時の
上記検出信号により上記開閉スイツチが開路され
ることを特徴とする信号平滑回路。 (2) 補正回路が、前記選択された極性の電圧を
導かれる積分回路を有し、前記出力信号を送出す
る積分回路がホールド回路として機能することを
特徴とする実用新案登録請求の範囲第１項記載の
信号平滑回路。[Claims for Utility Model Registration] (1) A comparison circuit that compares an output signal with an input signal to detect the magnitude thereof, an integration circuit that sends out the output signal, and a positive or negative polarity corresponding to the detection signal of the comparison circuit. It has a correction circuit that selects and amplifies a negative voltage and inputs it to the integration circuit via an on-off switch, and the on-off switch is opened by the detection signal when the deviation between the output signal and the input signal is zero. A signal smoothing circuit characterized by: (2) Utility model registration claim 1, characterized in that the correction circuit has an integrating circuit to which the voltage of the selected polarity is guided, and the integrating circuit that sends out the output signal functions as a hold circuit. Signal smoothing circuit described in section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15167986U JPS63174732U (en) | 1986-10-01 | 1986-10-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15167986U JPS63174732U (en) | 1986-10-01 | 1986-10-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63174732U true JPS63174732U (en) | 1988-11-14 |
Family
ID=31068968
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15167986U Pending JPS63174732U (en) | 1986-10-01 | 1986-10-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63174732U (en) |
-
1986
- 1986-10-01 JP JP15167986U patent/JPS63174732U/ja active Pending