JPS6316933B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a PCM repeater.

PCM repeaters are used in optical communication systems, coaxial cable communication systems, and other communication systems. These repeaters output random noise when the input signal is cut off, causing trouble in the communication line. In order to eliminate this noise, the present invention provides a PCM repeater equipped with a noise prevention circuit so that random noise is not output when the input signal is cut off.

In conventional PCM repeaters that have a waveform shaping circuit, an identification regeneration circuit, and a self-extraction timing circuit, the limiter circuit of the self-extraction timing circuit requires a large limiter gain because the timing component of the input signal fluctuates greatly. Become. Due to this high gain, when the signal is interrupted, the limiter circuit amplifies random noise, operates the identification circuit, and sends unnecessary noise to the communication line. Regarding this, the first
The conventional PCM repeater shown in the figure will be explained.

In Figure 1, 1 is an input signal terminal, 2 is an identification circuit, and 3
4 is a timing information extraction circuit, 4 is a high Q tank circuit, and 5 is a limiter circuit (gain of about 30 dB) 6 is an output terminal for outputting an input signal.

In FIG. 1, an input signal is input to an identification/reproduction circuit 2, and the other part is input to a timing information extraction circuit 3. The timing information extraction circuit 3 and the tank circuit 4
extracts the timing component of the input signal and outputs a sine wave current with the same frequency as the transmission frequency. The signal output from the tank circuit is input to the limiter circuit 5. If the level of the timing component of the input signal fluctuates greatly, a high limiter gain is required. Therefore, the limiter circuit 5 tends to output unnecessary noise especially when the input signal is cut off. This unnecessary noise causes the identification reproducing circuit 2 to malfunction, so that even when no signal is input, the unnecessary noise is output from the repeater, adversely affecting the communication line.

Further, in the case of an optical communication system, when an input signal is cut off, an electric-optical conversion circuit (E/O) is operated, which unnecessarily deteriorates a light emitting element such as a light emitting diode (IED) or a semiconductor laser.

The present invention aims to improve these drawbacks and provide a PCM repeater that regenerates and repeats input signals stably.

The details of the invention will be explained with reference to FIG.

FIG. 2 is a diagram showing the principle of the PCM repeater of the present invention, in which 7 is an input terminal into which a shaped input signal is input, 8 is an identification and regeneration circuit, 9 is a self-extraction timing circuit, and 10, 11, 13, Consists of 14.
10 is a timing information extraction section, 11 is a high Q tank circuit, and 12 is a limiter circuit (gain of about 30 dB).
It is composed of 13 and 14. 13 is a low-gain first limiter circuit (gain of about 15 dB), 14 is a low-gain second limiter circuit (gain of about 15 dB), and 15 is a tuned amplifier circuit that selectively amplifies a part of the output of the first limiter circuit; Built-in clock pulse) band wave generator. 16 is a peak detector, 17
is an AND gate circuit (Z=A・B) where A and B are 2
A logical variable of value, in this case, A indicates the output level 1, 0 of the discrimination circuit, and B indicates the output level of the first limiter circuit 13.
The output of is passed through the tuned amplifier 15 to the peak detector 16
The input signal is identified and reproduced by the identification circuit only when A=1 and B=1 in the positive logic circuit output from the identification circuit.
18 indicates an output terminal.

Now, the input signal appearing at the input terminal 7 is input to the identification/reproduction circuit 8 and the timing circuit 9, and the timing information extraction section 10 extracts the timing component.
A timing component is extracted by a tank circuit 11 with a high value, and its output is inputted to a first limiter circuit 13.
Here, the clock pulse is amplified and limited. Since the limiter circuit 13 has a low gain, the clock pulse maintains linearity with respect to the input signal, so that it is possible to reliably distinguish between the signal and the presence or absence of noise when the signal is interrupted. Therefore, a clock pulse is output from the first limiter circuit 13 only when an input signal is input to the input terminal 7. The output of the first limiter circuit 13 is input to a tuned amplifier circuit 15 and a second limiter circuit 14.

A tuned amplifier circuit 15 selectively amplifies the clock pulse and its output is input to a peak detector 16.
Here, the clock pulse is peak detected. The output of the peak detector 16 is input to an AND gate circuit 17. By the way, random noise generated when a signal is interrupted often has a frequency component lower than the transmission signal frequency, and is hardly outputted from the tuned amplifier circuit 15. As a result, the level difference between the output signal of the tuned amplifier circuit 15 during signal transmission and when the signal is interrupted becomes even larger.

On the other hand, the clock pulse is further amplified and limited in the second limiter circuit 15 to which the output of the first limiter circuit 13 is input, and the output thereof is input to the identification and regeneration circuit 8. The identification and regeneration circuit 8 samples the shaped input signal using the clock pulse of the second limiter circuit 14 to identify and reproduce the input signal.
This identified and reproduced input signal is input to the AND gate circuit 17. In the AND gate circuit 17, the clock pulse of the first limiter circuit passes through the tuned amplifier circuit 15 and is peak-detected by the peak detector 16.
Since it is input to the AND gate circuit 17, A=1 and B=1 in the AND gate circuit 17, so that the identification reproduction signal is output from the AND gate circuit 17.

If the input signal is cut off, the second limiter circuit 14
Even if the gain is set too high and random noise is output, the discrimination circuit 8 is operated and unnecessary noise is output from the discrimination circuit 8, the input signal is not input to the AND gate circuit 17 and the first limiter circuit 13. Since no clock pulse is output, only small amplitude random noise is output, and the frequency component of the random noise is cut out by the tuned amplifier circuit 15. Therefore, since the peak detection signal of the peak detector 16 is hardly inputted to the AND gate circuit 17, A=1 and B=0 in the AND gate circuit 17, and the noise of the identification and reproduction circuit 8 is output from the AND gate circuit 17. Not done.

Therefore, unnecessary noise will not be output from the PCM repeater and cause trouble in the communication line. Therefore, the PCM repeater of the present invention identifies and reproduces the input signal only when the input signal is input, so it always has high reliability.
PCM communication lines can be maintained. In particular, if the PCM repeater of the present invention is used in an optical communication system, the light emitting elements will always operate normally, so a stable communication system can be created without deteriorating the life of the light emitting elements.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration example diagram showing the basic principle of a conventional PCM repeater, and FIG. 2 is a diagram showing a PCM repeater according to the present invention. In Figure 2, 8 is an identification regeneration circuit, 9 is a self-extraction timing circuit, 10 is a timing extraction section, 11 is a high Q tank circuit, 12 is 13, 1
4 a limiter circuit, 13 a low gain first limiter circuit, 14 a low gain second limiter circuit, 15 a tuning circuit, 16 a peak detector,
17 indicates an AND gate circuit.

Claims (1)

[Claims] 1 In a PCM repeater having a self-extraction timing circuit and an identification regeneration circuit, a first limiter circuit and a second limiter circuit with low gain are provided in the self-extraction timing circuit, and the output of the first limiter circuit is branched into two, one of which is The output is input to a peak detector via a tuned amplifier, the other is input to an identification regeneration circuit via a second limiter circuit, and the output of the identification regeneration circuit and the output of the peak detector are input to an AND gate circuit. A PCM repeater characterized by: