JPS63167934A - Dynamic allocating method for register - Google Patents

Abstract

PURPOSE:To effectively utilize a register by allocating a physical address to a logical address to which a physical address to a logical address is not allocated at the time of writing. CONSTITUTION:An allocating state display flag controller 1 generates a control signal of an allocating state display flag 2 by a logical address, etc. from an address bus A. In a state that there is no allocation, and also, at the time of writing, the flag 2 allows a physical address/logical address converting RAM 3 to be writable, executes a control so that a physical address from a physical address generating part 6 is outputted to a physical address electing part 7, and the flag 2 is changed to an allocation existing state. A RAM 3 inputs the logical address from the bus A and writes the physical address from the generating part 6 by a writable signal from the flag 2. The generating part 6 generates a physical address of a register of an idle state, and a physical address selecting part 7 selects the physical address from the RAM 3 or the generating part 6, by a control signal of the flag 2.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a register dynamic allocation method used in information processing devices and the like.

2. Description of the Related Art In a conventional register allocation method, data is written or read from a register specified by a physical address using a physical address and a write/read signal.

Problems to be Solved by the Invention However, in the conventional register allocation method described above, there is a one-to-one ratio of registers to physical addresses, so even if a register is unused, a physical address is not specified for the register. It was unavailable for a limited time.

When sharing registers, it is necessary to allocate the necessary registers in each part in advance, and if one part runs out of registers, another part will use them even if there are unused registers. It is not possible.

SUMMARY OF THE INVENTION The present invention aims to solve these conventional problems and to provide a register dynamic allocation method that allows registers to be dynamically allocated to each part as needed. .

Means for Solving the Problems and Technical Means of the present invention for solving the above problems is that when data is written to a register, the state of a flag indicating whether or not a physical address is assigned to a logical address of the register is used. , select either the physical address of the write physical address generation unit that generates the physical address of the register to be written next from the flag indicating the usage status of the register, or the physical address of the address conversion RAM that converts the logical address to the physical address, Only when there is no physical address assigned to the logical address of the register, write the physical address of the write physical address generator to the address conversion RAM, write the data from the data bus to the register corresponding to the selected physical address, and write the data from the data bus to the register corresponding to the selected physical address. When reading data, the contents of the register corresponding to the physical address output of the address conversion RAM are output to the data bus, and when erasing data from the register, the register assignment flag for the logical address is set to no state, and the physical address of the at trace conversion RAM is output to the data bus. By setting the usage status display flag of the above register for output to unused status,
It is designed to write to and read from registers.

action The effects of the above technical means are as follows.

That is, when writing data to a register, depending on the state of a flag indicating whether or not a physical address is assigned to a logical address of the register, in the case of assignment distribution, the output of the RAM for converting a logical address to a physical address is If there is no allocation, the output of the write physical address generator that generates the physical address of the empty register is selected from the flag indicating the use status of the register, and the output of the address generator is written to the address conversion RAM. Since the contents of the data bus are written to the register corresponding to the physical address, dynamic allocation of registers can be performed.

EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings. The figure is a block diagram showing one embodiment of the present invention.

In the figure, the allocation state display flag controller 1 controls the allocation state display flag 2 to the state of assigning physical addresses to logical addresses using the logical address and write signal from address bus A, and also erases the logical address from address bus A. The allocation status display flag 2 is controlled by the signal to a state where no physical address is allocated to a logical address. The allocation status display flag 2 is set at the time of writing, and if a physical address is not allocated to a logical address, a physical address write command is issued to the physical address/logical address conversion RAM 8. The address conversion RAM 8 receives the logical address and outputs the corresponding physical address to the physical address selection section 7. The register use state display flag controller 4 sets the register use state display flag 5 corresponding to the physical address of the register to be written into the used state when writing, and sets the register use state display flag 5 corresponding to the physical address of the register to the empty state during erasing. 6 is a write physical address generation unit that selects one address from empty registers. The physical address selection unit 7 selects a physical address, a physical address of the logical address conversion RAM 3, or a physical address of the write physical address generation unit 6 using a control signal from the allocation status display flag 2. Reference numeral 8 denotes a register group, which writes data from the data bus D and reads data from the data bus D to the registers corresponding to the physical addresses of the physical address selection section 7.

9 is a bidirectional buffer.

Next, a register dynamic allocation method will be explained.

Based on the logical address, write signal, and logical address and erase signal from the address bus A, the allocation status display flag controller 1 generates a control signal for the allocation status display flag 2. The allocation state display flag 2 is in the no-allocation state, and at the time of writing, the physical address/logical address conversion RAM 8 is enabled for writing, and the physical address selection unit 7 is controlled to output the physical address from the write physical address generation unit 6. Then, the allocation status display flag 2 for the logical address is changed to the allocation cloth status. At the time of reading, the allocation status display flag 2 disables writing to the physical address/logical address conversion RAM 8 and controls the physical address selection section 7 to select a physical address from the physical address/logical address conversion RAM 8 as an output. At the time of erasing, the allocation status display flag 2 indicates the RAMI for physical address and logical address conversion.
is made unwritable, the physical address and the physical address from the logical address conversion RAM 8 are controlled to be selected as the output of the physical address conversion unit 7, and the allocation state display flag 2 for the logical address is changed to an unallocated state. The physical address/logical address conversion RAM 8 takes the logical address from the address bus A as an address input, and writes the physical address from the write physical address generation section 6 in response to the write enable signal from the allocation status display flag 2. In the writable state, the physical address corresponding to the logical address is given to the physical address selection unit 7. Write physical address generator 6
generates the physical address of the empty register from the register usage status display flag 5 and gives it to the physical address selection unit 7, which selects the physical address from the physical address, the logical address conversion RAM 3, or the write physical address generation unit 6. The physical address of is selected by the allocation status display flag 20 control signal. The register usage status display flag controller 4 controls the register usage status display flag 5 for the physical address based on the physical address and erase signals from the physical address selection unit 7. The register group 8 designated by the physical address from the physical address selection unit 7 takes in data input from the data bus D via the bidirectional buffer 9 during writing, and transfers the contents of the register group 8 to the bidirectional buffer during reading. 9 to the data bus D.

As described above, according to the above embodiment, the write physical address generation unit 6 generates a physical address of an unused register, so that a register is assigned to a register having a logical address to which no register is assigned. According to the present invention described above, a physical address of an empty register is generated depending on the usage status of the physical address of the register, and a write is performed. Since physical addresses are sometimes assigned to logical addresses to which no physical addresses have been assigned, registers can be assigned as needed, and registers can be used effectively.

[Brief explanation of the drawing]

The figure is a block diagram showing a register dynamic allocation method in one embodiment of the present invention. 1... Allocation status display flag controller, 2... Allocation status display flag, 3... RAM for address conversion. 4...Register usage status display flag controller, 5
...Register usage status display flag, 6.Write physical address generation section, 7.Physical address selection section, 8.
... Register group, 9... Bidirectional buffer.

Claims (1)

[Claims] When writing data to a register, the write physical address generator, which generates the physical address of the register to be written next, uses the flag that indicates the usage status of the register, depending on the state of the flag that indicates whether a physical address is assigned to the logical address of the register. Select the physical address or the physical address of the address conversion RAM that converts from a logical address to a physical address, and use the above address conversion RAM only when there is no physical address assigned to the logical address of the register.
writes the physical address of the write physical address generation section to the register, writes data from the data bus to the register corresponding to the selected physical address, and when reading data from the register, writes the contents of the register corresponding to the physical address output of the address conversion RAM. When outputting data to the data bus and erasing register data, the register assignment flag for the logical address is set to no state, and the address conversion R
A register dynamic allocation method characterized in that writing and reading of a register is performed by setting a use state display flag of the register to an unused state for an AM physical address output.