JPS6316631A - Manufacture of carrier junction integrated circuit - Google Patents

Abstract

PURPOSE:To prevent a surface of an integrated circuit from being bent or cracked and to improve its reliability and yield, by forming respective processes of assembling, jig-incorporating pressing, sealed-chamber-carriage, depressurizing, low-temperature heating, and low-temperature pressure welding. CONSTITUTION:Assembling of a carrier junction hybrid IC 20 is performed in an assembling process. The carrier junction hybrid IC 20 is incorporated in a jig 30 in a jig- incorporating pressing process, and then a substrate 11a of a hybrid IC 11 is pressed with proper force repulsive to a carrier 12 to be tentatively fixed. The carrier-junction hybrid IC 20 assumptively fixed, together with the jig 30, is then carried into a prescribed sealed chamber in an sealed-chamber-carriage process. In a reduced-pressurizing process, then the air inside the sealed chamber is exhausted to perform depressurization of the sealed chamber to attain a vacuum state. In a low-temperature heating process, the carrier-junction hybrid IC 20 tentatively fixed is heated at maximum allowable temperature within the range where the junction material 23 does not fuse the carrier- junction hybrid IC 20. In a low-temperature pressure-welding process, pressing and heating states are held for definite hours so that pressure welding of the substrate 11a is performed on the carrier 12 through the junction material 23 by low-temperature pressure-welding method.

Description

[Detailed Description of the Invention] [Table of Contents] ・Overview, Field of Industrial Use, Conventional Technology (Figures 3 and 4) ・Problems to be solved by the invention, Means and effects for solving the problems・Example (Fig. 1 (a), (bl, 2)) ・Effects of the invention [Summary] An integrated circuit consisting of components mounted on a dielectric substrate is produced by applying a bonding material to a metal carrier. A method of loading a carrier-bonded integrated circuit formed by bonding the substrate to the carrier using a bonding material having a soft metal with excellent pressure bonding properties on both the front and back surfaces of a solder sheet. By applying pressure to temporarily fix the substrate and performing low-temperature compression bonding via the bonding material, it is possible to ensure the desired thickness of the bonded portion (bonding material) after bonding, and to prevent displacement of the substrate. It also makes it possible to prevent the generation of voids (bubbles, etc.) in the bonded portion, and as a result, it makes it possible to improve the quality and reliability of carrier bonded integrated circuits and improve manufacturing yield. .

[Industrial application field]

The present invention provides a metalized ground conductor film on the lower surface of a dielectric substrate such as alumina ceramic, a wiring pattern (or strip pattern) on the upper surface of the substrate, and mounts circuit components such as functional components at predetermined positions. A method for manufacturing a carrier-bonded integrated circuit, in which an integrated circuit (IC) is bonded and mounted on a plate-shaped metal carrier (metal carrier) via a bonding material for electromagnetic shielding, heat dissipation, etc. In particular, the present invention relates to a method for bonding the integrated circuit and a carrier.

This type of carrier-bonded integrated circuit is required to have a flat high-frequency circuit and each circuit must be highly functional due to the demand for functional modularization of high-frequency circuits. is required. In a functional module with such a shape, multiple integrated circuits or large integrated circuits with high functionality (in the case of hybrid ICs, (in many cases), but are often joined by soldering, etc., and packaged (hermetically sealed). As this type of functional module, i.e., carrier-bonded integrated circuit, becomes more highly integrated and output, a carrier with good thermal conductivity is required, and voids (bubbles) occur at the junction between the carrier and the integrated circuit. A joining method with fewer defects such as
and a bonding structure that has an excellent buffering effect against thermal stress caused by temperature fluctuations during bonding or environmental temperature changes due to the difference in thermal expansion coefficient between the dielectric substrate of the integrated circuit and the metal carrier with excellent thermal conductivity. There is a need for a bonding method that can form a large bonded area (with a large thickness of the bonded portion).

[Conventional technology]

FIG. 3 is an exploded side view of a carrier bonded integrated circuit (10) manufactured by a conventional method, and FIG. 4 is a process block diagram of the conventional method. □In Figure 3, 11
12 represents an integrated circuit (IC), 12 represents a metal carrier, and 13 represents a bonding material. IC11・
In this case, it is formed as a hybrid IC (hybrid integrated circuit), and a dielectric substrate 1 such as alumina ceramic is used.
Metalized earth conductor on the bottom surface of 1a)! ! J11
b, a wiring pattern IIC is provided on the upper surface of the substrate 11a, and circuit components (mainly chip components) 11d such as functional components are mounted at predetermined positions.
The lower surface (earth conductor film 11b) of a is bonded onto the carrier 12 via the bonding material 13. The carrier 12 is made of a metal with excellent thermal conductivity, such as aluminum or brass, and is provided with input/output terminals 12a. Bonding material 13
is a solder sheet made of solder formed into a sheet shape.

This conventional method is carried out according to the procedure shown in FIG.

That is, first, the hybrid IC 11, metal carrier 12, bonding material 13, and flux are prepared, and in the assembly process, flux is applied to the bonding material 13, and this bonding material 1
3 onto the carrier 12, and then the carrier 12
The hybrid IC 11 is placed on the joining member 13 arranged above.
Perform a group cry to arrange the alignment.

Next, in the pressurizing process, use a desired jig etc. to
The substrate 11a of C11 is pressed against the carrier 12 with an appropriate pressing force.

Next, in a heating step, the pressurized hybrid IC 11, metal carrier 12, and bonding material 13 are simultaneously heated using a predetermined heating means to melt the bonding material 13.

Next, in the melt joining process, the melted joining material 13 is cooled (
The hybrid IC (substrate 11a) is bonded and mounted on the carrier 12 via the bonding material 13 by being cured (usually naturally cooled to room temperature).

The joining process is thus completed.

[Problem that the invention seeks to solve]

Since the conventional method described above involves melting the bonding material (solder sheet) 13 to perform bonding, it has the following problems.

■ Even if the thickness of the bonding material (solder sheet) 13 before melting is ensured, the wettability of the ground conductor film 11b of the substrate 11a and the carrier 12 to the solder, the surface tension of the bonding material 13, and the When the bonding material 13 melts due to pressure or the like, the melt is released around the substrate 11a. As a result, the bonding material 13 after bonding cannot maintain the same thickness as before melting and becomes thin (for example, about 0.111), and as a result, the coefficient of thermal expansion of the substrate 11a and carrier 12 decreases as the temperature changes. A problem arises in that the buffering capacity (absorption capacity) for thermal stress caused by the difference is low.

(2) Voids (bubbles, etc.) are likely to occur in the joint (joint material 13) due to the evaporation of a portion of the flux before melting and the action of the flux itself. As a result, the strength of the joint is reduced. In order to reduce the occurrence of voids, the melting temperature of the bonding material 13 is further increased.
The amount of melting in No. 3 increases, and the thickness of the bonding material 13 becomes even thinner.

■ When the bonding material 13 is melted, the substrate 11a is attached to the carrier 12.
Therefore, the substrate 11a (hybrid IC 11) is likely to be misaligned. This results in poor quality.

(2) Due to the reasons (2) and (2) above, the substrate 11a is likely to bend, crack, etc. after bonding, and the size of the substrate 11a may be limited.

The present invention was created in view of these problems, and it makes it possible to ensure the necessary and sufficient thickness of the joint part (joining material) after joining, and solves the above problems. It is an object of the present invention to provide a method for manufacturing a carrier-bonded integrated circuit that obtains a carrier-bonded integrated circuit.

[Means for solving problems]

In the present invention, as a means for solving the above problems,
As illustrated in FIGS. 1 and 2, a conductive film (11b) is provided on the lower surface of the dielectric substrate (11a), and a circuit component (li) is provided on the upper surface.
d) and a metal carrier (12
) and a bonding material (2
3) is prepared, and the bonding material (23) is placed on the carrier (12).
) and the integrated circuit (11) to assemble the carrier-bonded integrated circuit (20);
The carrier bonded integrated circuit (20) assembled above is assembled into the jig (30), and the substrate (11a) is placed on the carrier (12).
There is a jig-incorporating pressurizing process in which the temporary fixing carrier is temporarily fixed by pressing with an appropriate pressure, and then the temporarily fixing carrier bonded integrated circuit (20) is placed in a predetermined sealed room together with the jig (30). A step of transporting the sealed chamber into the sealed chamber, a depressurization step of discharging the air in the sealed chamber and reducing the pressure in the sealed chamber to a vacuum state, and then a temporarily fixed carrier bonding integrated circuit (20) in the sealed chamber.
a low-temperature heating step in which the bonding material (23) is heated at a maximum allowable temperature in a range that does not melt the substrate G11a), and then the pressurized and heated state is maintained for a predetermined period of time, and the substrate G11a) is heated to the carrier (G11a).
12) A method for manufacturing a carrier-bonded integrated circuit is provided, which comprises the following steps: 12) A low-temperature pressure welding step of performing pressure-bonding on the carrier through a bonding material (23).

[For production]

As illustrated in Fig. 1 (a), (b) and Fig. 2,
Using a bonding material (23) having soft metals (23b, 23c) with excellent pressure bonding properties on both the front and back surfaces of a solder sheet (23a), the integrated circuit (
11) and the metal carrier (12) are bonded by the pressure bonding action, so that the bonding material (23) does not melt outside the periphery of the substrate (11a') of the integrated circuit (11) during bonding, and after bonding. The thickness of the bonded portion (bonding material 23) of the substrate (11a) can be ensured to a desired thickness.
) and the carrier (12) can increase the buffering capacity (absorption capacity) of thermal stress caused by the difference in coefficient of thermal expansion.

In addition, since the group vi (11a) and the carrier (12) are temporarily fixed in advance with a jig (30) and then heated at low temperature and bonded together without using flux, voids (bubbles, etc.) in the joint after joining are avoided. ) can be prevented from occurring and displacement of the integrated circuit (11) can be prevented.

〔Example〕

FIGS. 1(a) and 1(b) are explanatory diagrams of an embodiment of the method of the present invention, in which (a) is an exploded side view of a carrier bonded integrated circuit (20) manufactured by the method of the present invention; FIG. 3 is a diagram showing an example of a pressurizing jig used in the method of the present invention.

FIG. 2 is a process block diagram of the method of the present invention. Incidentally, in these figures, the same or equivalent parts as in the above-mentioned Figs. 3 and 4 (conventional example) are designated by the same reference numerals.

In FIG. 1(a), reference numeral 20 indicates a carrier-bonded integrated circuit, 11 indicates an integrated circuit (IC), 12 indicates a metal carrier, and 23 indicates a bonding material. In this example, the IC 11 is formed as a hybrid IC (hybrid integrated circuit), and a metalized earth conductor film 11b is provided on the lower surface of a dielectric substrate 11a such as alumina ceramic, and a wiring pattern II is provided on the upper surface of the substrate 11a.
C is provided, and circuit components (mainly chip components) 11d such as functional components are mounted at predetermined positions. Ru. Note that the earth conductor film 11b is made of a soft metal (23b, 2
It is provided by plating with indium, indium-tin alloy, gold, etc., which have good affinity with 3c). The carrier 12 is a metal with excellent thermal conductivity, such as aluminum.

It is made of brass or the like, and is provided with input/output terminals 12a. The bonding material 23 is a soft metal 23b such as indium with excellent pressure bonding properties on the upper and lower surfaces (both front and back surfaces) of the solder sheet 23a,
23c is provided in the form of a sheet.

The thickness of the bonding material 23 is, for example, the thickness of the solder sheet 23a.
The soft metals 23b and 23C are set to have a thickness of about 0.05 m. One of the features of the present invention is the use of such a bonding material 23.

In the method of the present invention, a pressurizing jig as shown in Figure 1 is used as an example. In Figure 1), 30 indicates the entire pressurizing jig, 31 indicates a plate-shaped base, 32
A and 32B are a pair of columns fixed upright on both side edges of the base 31, and 33 are columns 32A and 32B.
This is a fixed ceiling board fixed to the upper end of the ceiling. Reference numeral 34 designates a female threaded wired disc which is fixed in the vertical direction and freely rotatable in the horizontal direction, and is fitted in the center of the upper surface of the fixed plate 33, and the male thread 35 is screwed into this disc. It is arranged jointly. 3
6 is the pillar 32A.

32B so as to be slidable in the vertical direction, and is a sliding plate fixed to the lower end of the male screw 35. Reference numeral 37 is a holding member fixed to the lower surface of the sliding plate 36. The holding member 37 is made of an elastic material such as silicone rubber.
A recess is provided in the center, and a white edge 3 for pressing is provided along the periphery.
7a is provided.

38 is a male screw 3 interposed between the ceiling plate 33 and the sliding plate 36.
This is a compression coil spring disposed around 5 to prevent rattling. This jig 30 is constructed as described above, and by rotating the tightening disk 34, the holding member 37 moves up and down together with the male screw 35 and the sliding plate 36. A carrier-bonded hybrid IC 20 (each part shown separated in the figure), which is made up of a carrier 12, a bonding material 23, and a hybrid IC 11 mounted and assembled on a base 31, is attached to the outer periphery of the substrate 11a of the hybrid IC 11. Holding member 37
The carrier 12 is elastically pressed by the pressing □ convex edge 37a and temporarily fixed.

The method of the present invention is carried out according to the procedure shown in FIG.

That is, to explain with reference to FIGS. 1A and 2B and FIG. and hybrid ICs 11 are stacked one after another to assemble a carrier-bonded hybrid IC 20.

Next, in the jig assembly pressurizing process, the carrier-bonded hybrid IC 20 assembled above is assembled into the jig 30, and then, as described above, the substrate 11a of the hybrid IC 11 is applied with appropriate pressure against the carrier 12 (the substrate 11a may be damaged). Temporarily fix by applying elastic pressure (not enough pressure).

Next, in a sealed chamber carrying step, the temporarily fixed carrier-bonded hybrid IC 20 is carried together with the jig 30 into a predetermined sealed chamber. A publicly known sealed chamber capable of reducing the pressure and heating the inside thereof is used.

Next, in a depressurization step, the air in the sealed chamber is discharged, and the pressure in the sealed chamber is reduced to a vacuum state. By creating a vacuum inside the sealed chamber in this way, it is possible to prevent oxidation and form a good joint.

Next, in a low-temperature heating step, the temporarily fixed carrier-bonded hybrid IC 20 in the sealed chamber is heated at the maximum allowable temperature within a range in which the bonding material 23 is not melted.

This maximum allowable temperature is set based on the melting temperature of the bonding material 23. For example, the melting point of solder sheet) 23a is 180
℃, a soft metal (in this case, indium) 23b,
When the melting point of 23c is about 130°C, the maximum allowable temperature is set to about 120°C to 125°C.

Next, in a low temperature pressure welding process, the pressurized and heated state is maintained for a predetermined period of time, and the substrate 11a is low temperature pressure welded onto the carrier 12 via the bonding material 23 to bond the substrate 11a.

In this case, the bonding material 23 (soft metals 23b, 23C) bonds the substrate 11a and the carrier 12 by its pressure-bonding action in a state immediately before melting. After that, the hybrid IC11 (based on viHa) is cooled to room temperature (usually natural cooling).
) is fixed on the carrier 12. Note that the heating time is appropriately set depending on the size of the bonding material 23, heating temperature, pressing force, etc. The bonding process is completed in the above manner.

〔Effect of the invention〕

As explained above, according to the present invention, a bonding material having a soft metal with excellent pressure bonding properties on both the front and back sides of a solder sheet is used, and this bonding material is used to bond an integrated circuit (hybrid FC) in a state immediately before melting. ) and the carrier can be bonded by the pressure bonding action, so the bonding material does not melt outside the periphery of the integrated circuit substrate during bonding, and the thickness of the bonded portion (bonding material) after bonding can be adjusted to the desired thickness. For example, 0.2~0.3fi
A desired thickness can be ensured. This 0.
For this type of carrier-bonded integrated circuit, a bonding part (bonding material) with a thickness of about 2 to 0.3 W maximizes the strength of the bonding part, and also reduces the heat generated by the difference in thermal expansion coefficient between the integrated circuit substrate and the carrier. Stress buffering capacity (absorption capacity) can be increased. In addition, in the present invention, the bonding is performed by pressurizing and temporarily fixing with a jig in advance and heating at low temperature without using flux, so it is possible to prevent the generation of voids (bubbles, etc.) in the joint after joining. It is possible to further increase the strength (stress number of the joint part) and prevent the positional shift of the integrated circuit. Therefore, according to the present invention,
It is possible to prevent the occurrence of bending, cracking, etc. in the substrate of the integrated circuit, and it is also possible to eliminate the limitation on the size of the substrate, thereby improving the quality and reliability of the carrier-bonded integrated circuit and improving the manufacturing yield. be able to.

[Brief explanation of drawings]

FIGS. 1(a) and (bl are explanatory diagrams of embodiments of the method of the present invention, FIG. 2 is a process block diagram of the method of the present invention, and FIG. 3 is a carrier bonded integrated circuit (10
), and Figure 4 is a process block diagram of the conventional method. In FIGS. 1 and 2, 20 is a carrier bonded integrated circuit manufactured by the method of the present invention, 11 is an integrated circuit (for example, a hybrid IC), and ! ! a
is a dielectric substrate, 11b is a ground conductor film, 11c is a wiring pattern, lid is a circuit component, 12 is a metal carrier, 12a is an input/output terminal, 23 is a bonding material,
23a is a solder sheet, 23b and 23c are soft metals (for example, indium), 30 is a pressurizing jig,
31 is the base, 32A, 32B are the 4 main supports, 33
34 is a fixed ceiling plate, 34 is a circular plate with a female thread, 35 is °
37 is a holding member, and 37a is a white edge for pressing. (b) An explanatory diagram of an example of the method of the present invention. Salary Figure 1 Process block diagram of the method of the present invention Figure 2

Claims (1)

[Claims] 1. An integrated circuit comprising a dielectric substrate (11a) provided with a conductor film (11b) on the lower surface and circuit components (11d) mounted on the upper surface, a metal carrier (12), and solder. Seat (23a
) has a soft metal (23b, 2
3c) and assembling a carrier-bonded integrated circuit (20) by sequentially stacking the bonding material (23) and the integrated circuit (11) on the carrier (12); , Next, the assembled carrier bonded integrated circuit (20)
is assembled into the jig (30) and the board (11a) is mounted on the carrier (
12) a pressurizing step of incorporating a jig in which the bonded integrated circuit (20) with the jig (30) is temporarily fixed by elastically applying moderate pressure; a step of carrying the sealed chamber into the room; a depressurization step of discharging the air in the sealed chamber and reducing the pressure in the sealed chamber to a vacuum state;
0) at a maximum allowable temperature within a range that does not melt the bonding material (23); then, the pressurized and heated state is maintained for a predetermined period of time, and the substrate (11a) is heated to a carrier (12); A method for manufacturing a carrier-bonded integrated circuit, comprising a low-temperature pressure welding step of performing pressure-bonding on the top of the carrier through a bonding material (23).