JPS63164569A - Image processing method - Google Patents

Abstract

PURPOSE:To sharply shorten processing time as compared to an ordinary method for executing the contraction processing of all picture element including white picture elements by executing the contraction processing of only black picture elements in an original pattern. CONSTITUTION:One byte out of original pattern data supplied to a register is stored in the register 1. A mask data table 3 outputs data in an address 8 in its initial state and the outputted data and the data held in the register 1 are supplied to an AND gate 2. The output of an AND gate 2 is impressed to a priority encoder 4, the position of the most significant '1' bit of the input data is detected by the encoder 4 and a position code is outputted. The position code is applied to a register 5 and the output of the register 5 is sent to a multiplier 6 to execute contraction processing. Since the existence of black picture elements is detected and the contraction processing is executed only when black picture elements are included, the contraction processing can be executed within an extremely short period as compared to the ordinary method.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an image processing method for reducing binary pattern data such as characters and images, and particularly relates to an image processing method for reducing binary pattern data in 1-byte units. It is about the method.

[Prior Art] Generally, in order to perform a reduction process to obtain pattern data of a desired size from an original pattern such as a character or image, the position of a black pixel in the original pattern data is set to the position coordinates after reduction. It is necessary to perform a process to replace it.

Conventionally, this process has been performed using a shift register.

[Problems to be Solved by the Invention] In the above-mentioned conventional method, the post-reduction position of all pixels including not only black pixels but also white pixels of the original pattern is determined.

Therefore, the reduction processing by the above-mentioned conventional method takes an extremely long time, and an image processing method that can perform reduction processing at a higher speed has been awaited.

[Means for Solving the Problems] The present invention has been made based on the above points, and aims to provide an image processing method that can perform pattern data reduction processing at higher speed, and its characteristics are as follows. , a most significant bit detection means for detecting the position of the most significant bit "1" of one line of pattern data, and a mask data holding means for holding data for masking one line of original pattern data. , in an image processing system comprising a bit data holding means for holding data indicating the position of bit "1" of pattern data after reduction processing, the most significant bit 11111 of the pattern data detected by the most significant bit detection means; The position of the reduced bit "1" is determined from the bit data holding means based on the value obtained by multiplying the position by the reduction rate, and then the mask data holding means is calculated based on the value detected by the most significant bit detection means. One line of data obtained by ANDing the mask data read from the means and the original pattern is sent to the most significant bit detection means, and a process of detecting the position of the most significant bit "1" is performed by the most significant bit detection means. This process is repeated until the bit detection means detects that there are no black pixels.

[Operation] In the present invention, when reducing the original pattern data in units of bytes, the priority encoder detects the position of the upper black pixel, that is, the position of the '1' bit, and The process is performed to find the position after the reduction, in order to increase the speed.

[Embodiment] FIG. 1 is a block diagram showing the configuration of an image processing system according to an embodiment of the present invention.

Reference numeral 1 denotes a register, which holds original pattern data for one line (one byte).

2 is an AND gate, which takes the logical product of the output of register 1 and the output from mask table 3, which will be described later.

3 is a mask data table, which holds data for sequentially masking one line (1 byte) of original pattern data held in register 1 up to the already processed position as a table, and the output of register 5, which will be described later. It outputs mask data according to the

4 is a priority encoder, AND gate 2
From the result of ANDing the original pattern data of register 1 (1 line (1 byte)) with the predetermined mask data of mask data table 3, the most significant bit of bit 111 I+ corresponding to the black pixel is 111 I+ bit position is detected and a position corresponding to that position]- code is output.

5 is a register, and the priority encoder 4
It holds a position code indicating the position of the most significant 1'' bit output from the 1'' bit.

A multiplier 6 multiplies the position code held in the register 5 by a reduction rate input in advance, and outputs the result as an address of a bit data table 7, which will be described later.

Reference numeral 7 denotes a bit data table, which holds a data table for outputting a bit "1" to a predetermined bit position after reduction in response to an address specified by the output of the multiplier 6.

Reference numeral 8 denotes an OR gate, which is used to logically OR the data output from the bit data table 7 and the contents held in the register 9, which will be described later.

A register 9 holds the output data of the OR gate 8 and outputs it as reduced pattern data after processing for one line is completed.

Next, an image processing method according to an embodiment of the present invention will be explained by explaining the data processing operation of the image processing system having the above configuration. In the following explanation, a case will be explained in which the original pattern data of 1 byte (8 bits) shown in FIG. 3 is reduced to 1/2. Furthermore, when the original pattern of 1 byte (8 bits) is targeted, the contents of mask data table 3 and bit data table 7 shown in Fig. 1 are as shown in Fig. 2 (1), ■. The state is set.

First, among the original pattern data supplied to register 1, 1-byte data f01110 shown in FIG.
011j is held in register 1. In the initial state, the mask data table 3 stores data f at address 8.
11111111J is output, and this data and the data held in register 1 are applied to AND gate 2.

This AND gate 2 performs the logical AND of the data from the register 1 and the mask data table 3, i.e. "0111" in this case.
0011 J is output and applied to the priority encoder 4. The priority encoder 4 detects the position of the most significant 1'' bit of the input data, and outputs the position]-code. In this embodiment, as shown in FIG. '' is the highest position, so the priority encoder 4 outputs the position code ``6''.The position code ``6'' output from the priority encoder 4 is applied to the register 5 and held there. The position code "6" held in this register 5 is applied to the mask data table 3 and the multiplier 6.

When this multiplier 6 receives the position code "6" from the register 5, it multiplies this 6°' by 1/2 of the specified reduction ratio.As a result, the reduced position code "
3' is output as the address of the bit data table 7. Bit data table 7 is multiplier 6
When inputting the output from , the data j 00001000J of the designated address “3” is read out and applied to the OR gate 8 . L 17) T") I' 0OO01
000J c. After being logically summed with the data stored in the register 9 by the OR gate 8, it is applied to the register 9. In this case, this is the first processing, and in the initial state, the data “0OO00000” is stored in the register 9.
Since "j" is stored, the data output by OR gate 8 is "r 00001000", which is stored in register 9.
is maintained.

Data held by this register 9 ff 0000100
0j is the top position data of black pixel f 0100000
This is the position data of a black pixel when 0j is reduced to 1/2.

At this time, the mask data table 3 receives the highest position data 116 II applied from the register 5, so that the data at the corresponding address 6 "
00111111 J is now being output. Therefore, at the AND gate 2 which inputs this data, the output data l 001111 of the mask data table 3 is again output.
11j and register 1 output data 1' 0111001
1 When the AND with J is taken, this time the result is (7).
fO0110011J is applied to the priority encoder 4. After that, in the same way as the above-mentioned process, the most significant bit "1" of this data j 00110011 j
” is detected and the highest position code “'5” is applied to the register 5. After that, the code "5" held in the register 5 is applied to the multiplier 6 and multiplied by the reduction rate, and the reduced position code "2" (or "3" is also acceptable) is calculated.Bit data table 7 Similarly to the process described above, the data “0000” at address 2 corresponding to the position code “2” output from this multiplier 6 is
0100J is output, and an OR gate 8 which inputs this output performs a logical sum with data r0OO01000J held in the register 9.

As a result, position data Hoooooiio is stored in register 9.
o" will be retained.

The priority encoder 4 handles such processing operations.
Figure 3 (1.
) is the position data "0" when the original pattern data j01110011j is reduced to 1/2 as shown in Figure 3
0001101 J can be obtained.

Figure 4 (1) is a diagram showing an 8x8 dot image pattern, and Figure 4 (2) is a diagram showing the image pattern shown in Figure 4 (1) reduced to 1/2 only in the X direction. FIG. 7 is a diagram showing a subsequent image pattern.

In this embodiment, by performing the above processing for each byte, that is, each line from 1 to 8 in the figure, 1/2 in the X direction is obtained.
The image pattern when reduced is obtained.

Generally, in two-dimensional patterns, the same one-byte pattern is often repeated multiple times. In the image pattern shown in FIG. 4(1), lines 1 to 5 and lines 6 to 8 are each composed of the same pattern. Therefore, if the pattern data is set to have one byte of pattern data and information about the number of times it is repeated as shown in Figure 5, the same pattern data can be repeated without obtaining the reduced data for each line. By doing so, image processing can be performed.

In particular, when pattern data is composed of 1 byte of pattern data and its repeat count data, 1 byte of pattern data becomes 3 as shown in Figure 6.
In the case of an image pattern that is repeated several times, the pattern data after reducing one byte of pattern data in the X direction is obtained by the image processing described above, and then the pattern data after each reduction is Reduction in the Y direction can also be achieved by multiplying the number of repeats by the same reduction rate and reducing the number of times to 3 and 2.

Note that although the present invention relates to reduction, the same can be applied to enlargement processing. Further, although the above embodiment performs reduction processing in units of 1 byte, the present invention is not limited to processing in 1 byte.

[Effects of the Invention] According to the present invention, since reduction processing is performed only on black pixels of the original pattern, processing time is significantly reduced compared to conventional reduction processing performed on all pixels including white pixels. Can be shortened.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an image processing system according to an embodiment of the present invention, and FIGS. 2 (1) and (2) show the contents of the mask data table and bit data table shown in FIG. 1, respectively. Figures 3 (1) and (2) are diagrams showing the original pattern data of 1 byte and 8 bits and data when it is reduced to 1/2, respectively, and Figures 4 (1) and (2) respectively.
2) is a diagram showing a pattern of 8×8 dots and a pattern reduced to 1/2 in the X direction, and FIG. 5 is a diagram graphically representing pattern data consisting of 1 byte of pattern data and the number of repetitions. FIG. 6 is a diagram showing the original pattern reduced to 1/2 in the X-Y direction. 1.5.9... Register 2... AND gate 3... Mask data table 4... Priority encoder 6... Multiplier 7... Bit data table 8... OR gate

Claims (1)

[Claims] The most significant bit of one line of pattern data
A most significant bit detection means for detecting the position of bit "1", a mask data holding means for holding data for masking one line of original pattern data, and a most significant bit detection means for detecting the position of bit "1" of the pattern data after reduction processing. In an image processing system equipped with a bit data holding means for holding data shown in FIG. After determining the position of the reduced bit "1" from the bit data holding means, logical product of the mask data read from the mask data holding means and the original pattern based on the value detected by the most significant bit detecting means. Sending one line of data to the upper bit detection means and repeating the process of detecting the position of the upper bit "1" until the upper bit detection means detects that there is no black pixel. An image processing method characterized by: