JPS63163282A - Multilevel multiplexing function arithmetic system - Google Patents

Multilevel multiplexing function arithmetic system

Info

Publication number
JPS63163282A
JPS63163282A JP30841086A JP30841086A JPS63163282A JP S63163282 A JPS63163282 A JP S63163282A JP 30841086 A JP30841086 A JP 30841086A JP 30841086 A JP30841086 A JP 30841086A JP S63163282 A JPS63163282 A JP S63163282A
Authority
JP
Japan
Prior art keywords
value
analog
values
arithmetic
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30841086A
Other languages
Japanese (ja)
Inventor
Makoto Nomi
能見 誠
Tadashi Takaoka
高岡 征
Kazuo Nakao
中尾 和夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP30841086A priority Critical patent/JPS63163282A/en
Publication of JPS63163282A publication Critical patent/JPS63163282A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate the need to adjust variance in arithmetic error among respective phases which is generated when an arithmetic circuit is simplified and performs arithmetic independently by performing specific function arithmetic processing for plural analog values xi (i=1-n) which are multiplied by time division and obtaining function values f (x1-xn) which have plural analog values as arguments. CONSTITUTION:A circuit which detects the effective value (RMS) of a three- phase AC signal consists of an analog switch 1, an analog switch opening/closing control part 2, a squaring circuit 3, a low-pass filter 4, and an extractor 5. Then sampled values which are time-divided by a switch 1 indicates the mean value in the period and the circuit 3 squares the sampled values successively. Its arithmetic results are smoothed by the filter 3 to obtain the square mean value of three phases, whose square root is extracted to obtain the square root of the square mean value, i.e. RMS value. Thus, the RMS of three or many phases can be obtained by one single-phase RMS converter and an arithmetic error among the phases is eliminated because of the arithmetic circuit of one system.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、アナログ計測、制御において、複数の計測値
の平均値、実効平均値等を、前段において入力を時分割
多重化し、多重化した値に対して関数演算を施し、1つ
の演算回路で演算する方式に関し、特に電力計測、W!
、力変換制御に好適な関数演算方式に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention is an analog measurement and control system in which the average value, effective average value, etc. of a plurality of measured values are input by time-division multiplexing in the previous stage. Regarding the method of performing a functional operation on a value and calculating with one arithmetic circuit, it is particularly useful for power measurement, W!
, relates to a function calculation method suitable for force conversion control.

〔従来の技術〕[Conventional technology]

従来1例えば3相電圧、電流の実効値を計測する場合、
各相の値をまず2乗し、それを加え合せた後で開平(、
r−)演算し、実効値平均を得ていた。しかしながらこ
の方法では各相とも同じ演算を行なうにもかかわらずそ
れぞれ独立した乗算器が必要で、その後加算、開平器を
通す必要があり。
Conventional 1 For example, when measuring the effective value of three-phase voltage and current,
First square the value of each phase, add them together, and then square root (,
r-) was calculated to obtain the effective value average. However, in this method, although the same calculation is performed for each phase, independent multipliers are required for each phase, and after that, it is necessary to perform addition and pass through a square rooter.

回路規模が大きくなる問題があった。一方、アナログ素
子として実効値演算素子(例えばBurrBrown社
のRM S −Converter 4340があるが
、単相用である。
There was a problem that the circuit scale became large. On the other hand, as an analog element, there is an effective value calculation element (for example, BurrBrown's RMS-Converter 4340, but it is for single phase use).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術は、多相電流の実効値平均を検出するのに
各組錘の演算回路が必要で、経済性、装置の大きさの上
で問題があった6また、単相用のRMS演算素子の出力
をそのまま加え合わせただけでは実効平均値を?9るこ
とができないという問題があった。
The above conventional technology requires an arithmetic circuit for each set of weights to detect the average effective value of multiphase currents, which poses problems in terms of economy and device size6.In addition, the RMS calculation for single phase What is the effective average value if you just add the outputs of the elements as they are? The problem was that I couldn't do it.

本発明の目的は、例えば3相交流の実効平均値RM S
 (Root Mean 5quare)を1相分の演
算回路によって求めることによって、回路素子を大幅に
削減すると同時に、独立に演算を行なった場合に生じる
各相の演算誤差のバラツキの調整を不要とすることを目
的とするもので、例とした3相交流の実効値演算以外の
同様な演算にも利用可能とするものである。
An object of the present invention is to calculate the effective average value RMS of three-phase AC, for example.
(Root Mean 5quare) is calculated using an arithmetic circuit for one phase, thereby significantly reducing the number of circuit elements and eliminating the need to adjust for variations in calculation errors for each phase that would occur if calculations were performed independently. This is intended to enable use in similar calculations other than the effective value calculation of three-phase AC as an example.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、例えば3相交流の実効値を演算するに際し
て、まず3相の計測値をアナログスイッチによって時分
割し、その出力を直接単相用実効値演算回路に入力する
ことにより達成される。
The above object is achieved, for example, when calculating the effective value of a three-phase alternating current, by first time-sharing the measured values of the three phases using an analog switch, and directly inputting the output to a single-phase effective value calculation circuit.

〔作用〕[Effect]

この原理は、アナログスイッチによって時分割によるサ
ンプリング周期が、被計測信号の周期より十分小さい場
合、サンプリング値はその周期の平均値を表わし、単相
用実効値演算回路は、そのサンプリング値の2乗を順次
演算する。その演算結果をフィルタによって平滑化すれ
ば、3相の2東平均値を得、それを開平すれば2乗平均
値の2乗根すなわちRMS値を得ることができる。この
ように、−個の単相用RMS変換器で3相あるいは多相
のRMSを得ることが可能であると同時に、1系統の演
算回路であるため、相間の演算誤差もなくなる。
This principle is based on the fact that if the sampling period by time division using an analog switch is sufficiently smaller than the period of the measured signal, the sampling value represents the average value of that period, and the single-phase effective value calculation circuit calculates the square of the sampling value. are calculated sequentially. By smoothing the calculation result using a filter, a two-east average value of the three phases can be obtained, and by square rooting it, the square root of the root mean square value, that is, the RMS value can be obtained. In this way, it is possible to obtain three-phase or multi-phase RMS with - single-phase RMS converters, and at the same time, since it is a single-system arithmetic circuit, there is no arithmetic error between phases.

〔実施例〕〔Example〕

以下1本発明の一実施例を第1図により説明する。第1
図は、本発明の一実施例である3相交流信号の実効値(
RMS)を検出する回路の全体ブロック構成図で、アナ
ログスイッチ1.アナログスイッチ開閉制御部2,2乗
回路3.低域フイルり4.開平器5からなる。
An embodiment of the present invention will be described below with reference to FIG. 1st
The figure shows the effective value (
This is an overall block configuration diagram of a circuit for detecting RMS). Analog switch opening/closing control section 2, square circuit 3. Low frequency fill 4. It consists of a flattener 5.

第2図は、第1図の回路の各部動作波形を示したもので
ある。
FIG. 2 shows operating waveforms of each part of the circuit of FIG. 1.

まず、第1図において、3相交流信号XI 。First, in FIG. 1, a three-phase AC signal XI.

X2F X8は、アナログスイッチ1によって等時間間
隔分だけその出力に接続され、第2図に示すような時分
割多重された信号Xを得る。このXを2乗回路3により
x2を得、次に低域フィルタ4によって平均値x2を得
、開平(平方根)回路5によって実効値平均 Cゞを得
る。
X2F X8 is connected to its output at equal time intervals by analog switch 1 to obtain a time division multiplexed signal X as shown in FIG. From this X, a square circuit 3 obtains x2, a low-pass filter 4 obtains an average value x2, and a square root circuit 5 obtains an effective value average C゜.

この場合、入力信号周波数に対し、アナログスイッチ切
換周波数を十分高く取ることによって、個別回路で演算
した場合と同等な精度と応答性を実現することができる
In this case, by setting the analog switch switching frequency sufficiently high relative to the input signal frequency, it is possible to achieve accuracy and responsiveness equivalent to those obtained when calculation is performed using individual circuits.

第3図は、同じ原理をその他の関数に適用し、かつ、同
一のアナログスイッチの出力を複数の関数演算回路で用
いた場合を示したもので、多重化出力Xをそのままフィ
ルタ4に人力すれば、その出力AVがXi + X2 
g xsの平均値になる。
Figure 3 shows a case where the same principle is applied to other functions and the output of the same analog switch is used in multiple function calculation circuits. For example, the output AV is Xi + X2
It becomes the average value of g xs.

また、Xを比較器6aによって基準値Xaと比較し、比
較器6aの出力でフリップフロップ7aをセットすれば
入力43号x1 、X2 + X8のいずれかが過大値
になったことを検出した出力0VIhを得ろ。さらに絶
縁値回路8によってXの絶対値(x)を比較器6bで基
準値Xbと比較すれば、交流信号の絶対値過大検出出力
OV D 2を得る。
In addition, if X is compared with the reference value Xa by the comparator 6a and the flip-flop 7a is set with the output of the comparator 6a, an output will be generated when it is detected that either of input No. 43 x1, X2 + X8 has become an excessive value. Get 0VIh. Further, by comparing the absolute value (x) of X with the reference value Xb by the comparator 6b by the insulation value circuit 8, an excessive absolute value detection output OV D 2 of the AC signal is obtained.

第4図は、3相交流の電力検出を例とした実施例を示し
たもので、2つのアナログスイッチla。
FIG. 4 shows an example of three-phase AC power detection, in which two analog switches la are used.

1bによって、それぞれ対をなす電流11 g xi 
113電圧ex 、ex 、esを同期して選択したi
1b, each pair of currents 11 g xi
113 voltages ex, ex, es selected synchronously
.

eを乗算器9によって積を計算し、その積e−iをフィ
ルタ4によって平滑すれば平均電力値Pを得ることがで
きる。
The average power value P can be obtained by calculating the product of e by the multiplier 9 and smoothing the product e-i by the filter 4.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明によれば、複数の同質の信号を、
同一の演算を含む処理を必要とする実効値、平均値、積
和値(例えば電力)など、電力制御などで用いる演算値
を得るための演算回路を単純化でき、経済性を高める効
果がある。さらに、同一の演算回路を用いることにより
、個別の場合に発生する回路定数の誤差によるバラツキ
がなく。
As described above, according to the present invention, a plurality of signals of the same quality can be
It is possible to simplify the calculation circuit for obtaining calculation values used in power control, such as effective values, average values, and sum-of-products values (e.g., electric power), which require processing that includes the same calculation, and has the effect of increasing economic efficiency. . Furthermore, by using the same arithmetic circuit, there is no variation due to errors in circuit constants that occur in individual cases.

かつ調整が容易となるなどの効果を得ることができる。In addition, effects such as easier adjustment can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の全体ブロック図、第2図は
その動作波形を示す図、第3声、第4図XI   [U 7 Z 図  −m− 第3図 ¥j4図
Figure 1 is an overall block diagram of an embodiment of the present invention, Figure 2 is a diagram showing its operating waveforms, Figure 3, Figure 4

Claims (1)

【特許請求の範囲】 1、複数のアナログ値x_1(i=1、2、…、n)を
アナログスイッチによって逐次切換えて時分割多重化し
、該多重化されたアナログ値に所定の関数演算処理をお
こない、前記複数のアナログ値を引数とする関数値 f(x_1、x_2、……、x_n)を得ることを特徴
とする多値多重化関数演算方式。 2、前記関数演算処理は、2乗演算処理、フィルタリン
グ処理、開平演算処理からなり、該一連の演算処理によ
り、前記アナログ値の実効値平均を得ることを特徴とす
る第1項の多値多重化関数演算方式。 3、前記関数演算処理は、低域フィルタリング処理から
なり、該フィルタリング処理により前記アナログ値のス
カラ平均値を得ることを特徴とする第1項の多値多重化
関数演算方式。 4、前記関数演算処理は、前記アナログ値と所定の値と
の比較を行なう比較処理からなり、該比較処理により前
記アナログ値の過剰値検出値を得ることを特徴とする第
1項の多値多重化関数演算方式。 5、前記多重化されたアナログ値に複数種類の関数演算
処理をおこなうことにより、同時に多種類の関数値を得
ることを特徴とする第1項の多値多重化関数演算方式。 6、前記複数のアナログ値を複数組設けてなる順序対(
x_i、y_i、……、z_i)、i=1、2、……、
nをそれぞれ、個別のアナログスイッチで同期的に時分
割多重化し、該多重化された複数組のアナログ値に所定
の関数演算処理をおこない、f{g(x_1、y_1、
……、z_1)、……、g(x_i、y_i、……、z
_i)、……、g(x_n、y_n、……、z_n)}
を得ることを特徴とする第1項の多値多重化演算方式。
[Claims] 1. A plurality of analog values x_1 (i=1, 2,..., n) are sequentially switched and time-division multiplexed by an analog switch, and a predetermined functional calculation process is performed on the multiplexed analog values. A multi-value multiplex function calculation method characterized in that the function value f(x_1, x_2, . . . , x_n) is obtained using the plurality of analog values as arguments. 2. The multi-value multiplexing of item 1, wherein the functional calculation process consists of a square calculation process, a filtering process, and a square root calculation process, and the effective value average of the analog values is obtained by the series of calculation processes. conversion function calculation method. 3. The multi-value multiplex function calculation method according to item 1, wherein the function calculation process includes a low-pass filtering process, and a scalar average value of the analog values is obtained by the filtering process. 4. The multivalued multi-value of item 1, characterized in that the function calculation process includes a comparison process of comparing the analog value with a predetermined value, and an excess value detection value of the analog value is obtained by the comparison process. Multiplex function calculation method. 5. The multi-value multiplex function calculation method according to item 1, characterized in that many types of function values are obtained simultaneously by performing a plurality of types of function calculation processing on the multiplexed analog values. 6. Ordered pairs formed by providing a plurality of sets of the plurality of analog values (
x_i, y_i, ..., z_i), i=1, 2, ...,
n are synchronously time-division multiplexed using separate analog switches, and a predetermined function calculation process is performed on the multiplexed sets of analog values to obtain f{g(x_1, y_1,
..., z_1), ..., g(x_i, y_i, ..., z
_i), ..., g (x_n, y_n, ..., z_n)}
The first term is a multi-value multiplexing calculation method characterized by obtaining the following.
JP30841086A 1986-12-26 1986-12-26 Multilevel multiplexing function arithmetic system Pending JPS63163282A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30841086A JPS63163282A (en) 1986-12-26 1986-12-26 Multilevel multiplexing function arithmetic system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30841086A JPS63163282A (en) 1986-12-26 1986-12-26 Multilevel multiplexing function arithmetic system

Publications (1)

Publication Number Publication Date
JPS63163282A true JPS63163282A (en) 1988-07-06

Family

ID=17980725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30841086A Pending JPS63163282A (en) 1986-12-26 1986-12-26 Multilevel multiplexing function arithmetic system

Country Status (1)

Country Link
JP (1) JPS63163282A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005214932A (en) * 2004-02-02 2005-08-11 Daihen Corp Signal processor, and voltage measuring instrument and current measuring instrument using signal processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005214932A (en) * 2004-02-02 2005-08-11 Daihen Corp Signal processor, and voltage measuring instrument and current measuring instrument using signal processor

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