JPS6316175U - - Google Patents
Info
- Publication number
- JPS6316175U JPS6316175U JP10889486U JP10889486U JPS6316175U JP S6316175 U JPS6316175 U JP S6316175U JP 10889486 U JP10889486 U JP 10889486U JP 10889486 U JP10889486 U JP 10889486U JP S6316175 U JPS6316175 U JP S6316175U
- Authority
- JP
- Japan
- Prior art keywords
- memory chip
- external connection
- memory
- electrode
- card
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Description
図面はこの考案の一実施例を示したもので、第
１図および第２図はメモリカードの縦断正面図お
よびその表側ケースを除去した状態の平面図、第
３図はメモリカードの外観斜視図、第４図および
第５図はメモリカードの使用状態を示すパーソナ
ルコンピユータの外観斜視図およびそのメモリカ
ード装着部の拡大断面図である。
１……カード本体、１０……配線基板、１１ａ
，１１ｂ……第１ＲＡＭチツプ、１２ａ，１２ｂ
……第２ＲＡＭチツプ、１６……第１の外部接続
端子、１７……第２の外部接続端子。
The drawings show one embodiment of this invention, and FIGS. 1 and 2 are a longitudinal sectional front view of the memory card and a plan view with the front case removed, and FIG. 3 is a perspective view of the external appearance of the memory card. , 4 and 5 are an external perspective view of the personal computer and an enlarged sectional view of the memory card mounting portion thereof, showing the state in which the memory card is used. 1... Card body, 10... Wiring board, 11a
, 11b...first RAM chip, 12a, 12b
...Second RAM chip, 16...First external connection terminal, 17...Second external connection terminal.
Claims (1)
接続された外部接続端子を有するメモリカードに
おいて、カード本体内に、少なくとも１個の第１
メモリチツプと、少なくとも１個の第２メモリチ
ツプを設けるとともに、前記カード本体の一端部
に、前記第１メモリチツプの電極と接続した第１
の外部接続端子を配列し、前記カード本体の他端
部に、前記第２メモリチツプの電極と接続した第
２の外部接続端子を配列したことを特徴とするメ
モリカード。 In a memory card having a memory chip and an external connection terminal connected to an electrode of the memory chip, at least one first
A memory chip and at least one second memory chip are provided, and a first memory chip connected to an electrode of the first memory chip is provided at one end of the card body.
What is claimed is: 1. A memory card comprising: an array of external connection terminals, and a second external connection terminal connected to an electrode of the second memory chip arranged at the other end of the card body.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10889486U JPS6316175U (en) | 1986-07-16 | 1986-07-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10889486U JPS6316175U (en) | 1986-07-16 | 1986-07-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6316175U true JPS6316175U (en) | 1988-02-02 |
Family
ID=30986506
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10889486U Pending JPS6316175U (en) | 1986-07-16 | 1986-07-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6316175U (en) |
-
1986
- 1986-07-16 JP JP10889486U patent/JPS6316175U/ja active Pending