JPS63161753A - Packet exchange - Google Patents

Abstract

PURPOSE:To attain the reception processing of a packet level at a high speed by judging the kind of packets by header information to switch the output destination of the reception packet from the result. CONSTITUTION:The titled exchange consists of a reception byte number counter 1, a packet discrimination circuit 2, a packet information storage register 3 and a packet register 4, a packet header memory 5 and a packet separating circuit 6, a call control packet buffer 7 and a data packet buffer 8. Then the received packet is sent to the data packet buffer 8 or the call control packet buffer 7 by selection. Based on the packet type discriminated by the packet discrimination circuit 2 to allow the packet separating circuit 6 to separate the reception packet. Thus, the processing time from the reception of the packet to separating processing is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a packet switch, and particularly to a packet switch that separates received packets at high speed.

[Prior Art] In the field of packet communications, a technique is used in which control information such as packet type is included in the header of a packet, and the received packets are separated and processed by a packet switch. Specifically, it is separated into a call control packet for setting and disconnecting a logical channel, and a data packet for transmitting information.

In a conventional packet switch, its line control unit is provided with a receive packet buffer that stores all received packets, and a packet separation means that separates the received packets into call control packets and data packets. When a packet is received, all the received packets are stored in the reception bucket buffer, and then the packet type is determined by the packet separation means, and the received packet is divided into call control packets and data packets. .

[Problems to be Solved] In the conventional packet switching equipment described above, all received packets are stored in a reception packet buffer in the line control section thereof. Subsequent software processing reads the header information of the received packet stored in the receive bucket buffer, determines the type of the packet, and performs processing. Therefore, there is a problem in that a processing time is required from the time a packet is received until the packet level processing is performed for each packet type.

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a packet switching device that can shorten the processing time required from receiving a packet to performing packet separation processing.

[Means for solving problems] In order to achieve the above object, the packet switching device of the present invention has the following features:
header information storage means for storing header information of received packets; packet type determination means for determining the packet type based on the header information stored in the header information storage means; The configuration includes a packet separating means for switching the output destination of the packet.

[Example] Hereinafter, the present invention will be explained in detail based on the drawings.

FIG. 1 is a block diagram of a line control section of a packet switch according to an embodiment of the present invention. In the same figure, 1 is the reception pi! - number counter, 2 is a packet discrimination circuit, 3 is a packet information holding register, 4 is a packet register, 5 is a packet header memory, 6 is a packet separation circuit, 7 is a call control packet buffer, and 8 is a data packet buffer.

In the above configuration, when this packet switch receives a packet, it temporarily writes the header part into the packet header memory 5. At this time, the received byte number counter 1 counts the position representing the packet type among the received packet header information written in the packet header memory 5.

Next, the packet type information of the packet header written in the packet header memory 5 is written into the packet information holding register 3 based on the position information specified by the received byte number counter 1. Then, the packet type information and the packet register 4 are processed by the packet discrimination circuit 2.
Compare with the header information registered in . That is,
The direction of outputting the received packet to the data packet buffer 78 or the call control bucket buffer 7 is selected. Then, based on the packet type determined by the packet discriminating circuit 2, the packet separating circuit 6 separates the received packets. The separated received packets are stored in either the data bucket buffer 78 or the call control bucket buffer 7 depending on the packet type.

As described above, in this embodiment, the line control unit of the packet switch separates packets received by the packet switch into call control packets for setting up and disconnecting logical channels, and data packets for transmitting information. , call control packets are loaded into the call control f311 packet buffer, and data packets are loaded into the data bucket buffer.

[Effects of the Invention] As explained above, according to the present invention, there is an effect that packet level separation processing can be performed faster than in the past.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a circuit control section of a packet switch according to an embodiment of the present invention. 1: Received byte number counter 2: Packet discrimination circuit 3: Packet information holding register 4: Packet register 5: Packet header memory 6: Packet separation circuit 7: Call control packet buffer 8: Data packet buffer 7

Claims (1)

[Claims] header information storage means for storing header information of received packets; packet type determination means for determining the packet type based on the header information stored in the header information storage means; 1. A packet switching device comprising: packet separation means for switching the output destination of packets.