JPS63161672A - Organic thin film element - Google Patents
Organic thin film elementInfo
- Publication number
- JPS63161672A JPS63161672A JP61307662A JP30766286A JPS63161672A JP S63161672 A JPS63161672 A JP S63161672A JP 61307662 A JP61307662 A JP 61307662A JP 30766286 A JP30766286 A JP 30766286A JP S63161672 A JPS63161672 A JP S63161672A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- gate insulating
- insulating film
- film
- approximately
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 41
- 239000010408 film Substances 0.000 claims abstract description 47
- 239000004065 semiconductor Substances 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 abstract description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 5
- IEQIEDJGQAUEQZ-UHFFFAOYSA-N phthalocyanine Chemical compound N1C(N=C2C3=CC=CC=C3C(N=C3C4=CC=CC=C4C(=N4)N3)=N2)=C(C=CC=C2)C2=C1N=C1C2=CC=CC=C2C4=N1 IEQIEDJGQAUEQZ-UHFFFAOYSA-N 0.000 abstract description 3
- 229920003229 poly(methyl methacrylate) Polymers 0.000 abstract description 3
- 229920006254 polymer film Polymers 0.000 abstract description 3
- 229920000015 polydiacetylene Polymers 0.000 abstract description 2
- 239000004926 polymethyl methacrylate Substances 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 150000001875 compounds Chemical class 0.000 description 13
- 230000007547 defect Effects 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 239000000969 carrier Substances 0.000 description 3
- PPBRXRYQALVLMV-UHFFFAOYSA-N Styrene Chemical compound C=CC1=CC=CC=C1 PPBRXRYQALVLMV-UHFFFAOYSA-N 0.000 description 2
- 150000001371 alpha-amino acids Chemical class 0.000 description 2
- 235000008206 alpha-amino acids Nutrition 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- NAQMVNRVTILPCV-UHFFFAOYSA-N hexane-1,6-diamine Chemical compound NCCCCCCN NAQMVNRVTILPCV-UHFFFAOYSA-N 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- -1 vinyl alcohols Chemical class 0.000 description 2
- 229920002554 vinyl polymer Polymers 0.000 description 2
- SLXKOJJOQWFEFD-UHFFFAOYSA-N 6-aminohexanoic acid Chemical compound NCCCCCC(O)=O SLXKOJJOQWFEFD-UHFFFAOYSA-N 0.000 description 1
- FIPWRIJSWJWJAI-UHFFFAOYSA-N Butyl carbitol 6-propylpiperonyl ether Chemical compound C1=C(CCC)C(COCCOCCOCCCC)=CC2=C1OCO2 FIPWRIJSWJWJAI-UHFFFAOYSA-N 0.000 description 1
- QNAYBMKLOCPYGJ-REOHCLBHSA-N L-alanine Chemical compound C[C@H](N)C(O)=O QNAYBMKLOCPYGJ-REOHCLBHSA-N 0.000 description 1
- CKLJMWTZIZZHCS-REOHCLBHSA-N L-aspartic acid Chemical compound OC(=O)[C@@H](N)CC(O)=O CKLJMWTZIZZHCS-REOHCLBHSA-N 0.000 description 1
- WHUUTDBJXJRKMK-VKHMYHEASA-N L-glutamic acid Chemical compound OC(=O)[C@@H](N)CCC(O)=O WHUUTDBJXJRKMK-VKHMYHEASA-N 0.000 description 1
- OFOBLEOULBTSOW-UHFFFAOYSA-N Malonic acid Chemical compound OC(=O)CC(O)=O OFOBLEOULBTSOW-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- QYKIQEUNHZKYBP-UHFFFAOYSA-N Vinyl ether Chemical class C=COC=C QYKIQEUNHZKYBP-UHFFFAOYSA-N 0.000 description 1
- 150000003926 acrylamides Chemical class 0.000 description 1
- 150000001252 acrylic acid derivatives Chemical class 0.000 description 1
- 229920006397 acrylic thermoplastic Polymers 0.000 description 1
- 235000004279 alanine Nutrition 0.000 description 1
- 235000001014 amino acid Nutrition 0.000 description 1
- 229940024606 amino acid Drugs 0.000 description 1
- 150000001413 amino acids Chemical class 0.000 description 1
- 229960002684 aminocaproic acid Drugs 0.000 description 1
- 229940009098 aspartate Drugs 0.000 description 1
- 125000003178 carboxy group Chemical group [H]OC(*)=O 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 150000004985 diamines Chemical class 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229930195712 glutamate Natural products 0.000 description 1
- 125000001165 hydrophobic group Chemical group 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 229910052809 inorganic oxide Inorganic materials 0.000 description 1
- 150000002734 metacrylic acid derivatives Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 125000003367 polycyclic group Chemical group 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 229930195734 saturated hydrocarbon Natural products 0.000 description 1
- TYFQFVWCELRYAO-UHFFFAOYSA-N suberic acid Chemical compound OC(=O)CCCCCCC(O)=O TYFQFVWCELRYAO-UHFFFAOYSA-N 0.000 description 1
- ISXSCDLOGDJUNJ-UHFFFAOYSA-N tert-butyl prop-2-enoate Chemical compound CC(C)(C)OC(=O)C=C ISXSCDLOGDJUNJ-UHFFFAOYSA-N 0.000 description 1
- 229930195735 unsaturated hydrocarbon Natural products 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Materials Engineering (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の目的］
（産業１′、の利用分野）
本発明は、超薄膜をゲート絶縁膜として用いた角°機薄
膜素子である絶縁ゲート型電界効果トランジスタ（ＭＩ
Ｓトランジスタ）に関する。Detailed Description of the Invention [Objective of the Invention] (Field of Application in Industry 1') The present invention relates to an insulated gate field effect transistor (MI
(S transistor).
（従来の技術）
ＭＩＳトランジスタのうち、特に化合物半導体を用いた
ものには、ｓｉのＭＯＳ）ランジスタにない種々の問題
がある。例えば、界面準位が高密度に荏在するため、半
導体の表面電位がゲート電圧を印加しても殆ど変化しな
いことが起こる。(Prior Art) Among MIS transistors, those using compound semiconductors in particular have various problems that Si MOS transistors do not have. For example, because interface states are densely distributed, the surface potential of a semiconductor hardly changes even when a gate voltage is applied.
所謂フェルミ・レベルのピン止めと呼ばれる現象である
。またＧａＡｓや１ｎＰでは、ｓｉに比べてキャリア移
動度が高いため高速動作が期待されているが、Ｓｉに対
する５ｉ０２１１１のような欠陥の少ない酸化膜が得φ
れない。これらの化合物半導体に熱酸化や陽極酸化によ
り形成した酸化膜は界面準位密度が極めて高い。このた
め、これらの化合物半導体を用い、その酸化膜或いは５
ｉ０２やＡｌ１ ｏ３などの無機酸化物をゲート絶縁膜
としてＬｌ Ｉ Ｓ ）ランジスタを形成しても、半導
体表面は反転せず、トランジスタ動作しない。This is a phenomenon called Fermi level pinning. In addition, GaAs and 1nP have higher carrier mobility than Si, so high-speed operation is expected, but oxide films with fewer defects such as 5i02111 for Si can be
Not possible. Oxide films formed on these compound semiconductors by thermal oxidation or anodic oxidation have extremely high interface state density. For this reason, these compound semiconductors are used, and their oxide films or
Even if a Ll I S ) transistor is formed using an inorganic oxide such as i02 or Al1 o3 as a gate insulating film, the semiconductor surface will not be inverted and the transistor will not operate.
界面状態密度の高い化合物半導体を用いてＭＩＳ）ラン
ジスタを実現するためには、数人〜数１０人という極め
て薄い薄膜、いわゆる超薄膜であってしかも欠陥の少な
いものが必要である。In order to realize an MIS (MIS) transistor using a compound semiconductor with a high density of interfacial states, an extremely thin film of several to several dozen members, a so-called ultra-thin film, with few defects is required.
この様な超薄膜の形成技術として近年、ラングミュア・
ブロジェット（Ｌ Ｂ）法に代表される有機分子の薄膜
形成技術が注口され、その各種素子への応用技術開発が
活発化している。実際、ダーラム（Ｄ ｕｒｈａｉ）大
学のロバーツ（Ｇ 、 Ｇ 、 Ｒｏｂｃｒｔｓ）
はＬＢ法による有機薄膜（ＬＢ膜）をゲート絶縁膜とし
て用いたＭＩＳトランジスタの研究を発表している。し
かし化合物半導体では、界面準位の比較的少ないＩｎＰ
を除いて半導体表面の反転現象は観測されていない。ま
たＬＢ膜では数１０人程度或いはそれ以下の超薄膜が得
られるか、この様な超薄膜では欠陥が多く、これをゲー
ト絶縁膜としてこのＬに金属電極を形成した場合、電極
金属が超薄膜内の欠陥に入り込むため、電極と半導体が
簡単に短絡してしまう、という問題があった。In recent years, as a technology for forming such ultra-thin films, Langmuir
Techniques for forming thin films of organic molecules, typified by the Blodgett (LB) method, have been widely used, and the development of technology for its application to various devices is becoming more active. In fact, Roberts (G, G, Robcrts) of Durham University
have published research on MIS transistors using an organic thin film (LB film) produced by the LB method as a gate insulating film. However, in compound semiconductors, InP has relatively few interface states.
No inversion phenomenon on the semiconductor surface has been observed except for. In addition, with the LB film, it is possible to obtain an ultra-thin film of several tens of layers or less, but such an ultra-thin film has many defects, and when a metal electrode is formed on this L using this as a gate insulating film, the electrode metal is There was a problem in that the electrode and the semiconductor could easily short-circuit because the electrode penetrated into defects within the semiconductor.
（発明が解決しようとする問題点）
以上のように化合物半導体を用いたＭＩＳトランジスタ
は、高性能が期待されながら、ゲート絶縁膜として欠陥
のない超薄膜が得られないこと、界面準位密度が高いこ
と、等の理由で実現されていない。(Problems to be Solved by the Invention) As described above, MIS transistors using compound semiconductors are expected to have high performance, but there are problems such as the inability to obtain defect-free ultra-thin films as gate insulating films and the problem of interface state density. This has not been realized due to high cost and other reasons.
本発明はこの様な問題を解決した、超薄膜からなるゲー
ト絶縁膜を用いたＭ Ｉ Ｓ ）ランジスタを提供する
ことを目的とする。An object of the present invention is to provide an M I S transistor using an ultra-thin gate insulating film that solves these problems.
［発明の構成］
（問題点を解決するための手段）
本発明は、超薄膜をゲート絶縁膜として用いるＭＩＳト
ランジスタにおいて、ゲート絶縁膜とゲート電極の間に
半導体薄膜を介在させたことを特徴とする。[Structure of the Invention] (Means for Solving the Problems) The present invention is characterized in that, in a MIS transistor using an ultra-thin film as a gate insulating film, a semiconductor thin film is interposed between the gate insulating film and the gate electrode. do.
（作用）
ゲート絶縁膜とゲート電極の間に半導体薄膜を挿入する
と、欠陥が多い超薄膜からなるゲート絶縁膜に電極金属
が入り込んでゲート電極と半導体が短絡する事態が防雨
される。しかもゲート電極に電圧を印加した時、ゲート
電極から半導体薄膜に注入された電子または正孔等のキ
ャリアは半導体薄膜とゲート絶縁膜の界面に輸送される
から、実効的にゲート絶縁膜に直接電圧を印加したのと
等価になる。つまり半導体薄膜は超薄膜からなるゲート
絶縁膜の耐圧を実効的に向」ニさせる働きをするが、ゲ
ート電極から半導体表面に所定の電位を与える妨げには
ならない。従って界面準位密度の高い化合物半導体を用
いたＭＩＳトランジスタが実現できる。(Function) Inserting a semiconductor thin film between the gate insulating film and the gate electrode prevents the electrode metal from entering the gate insulating film, which is an ultra-thin film with many defects, and causing a short circuit between the gate electrode and the semiconductor. Moreover, when a voltage is applied to the gate electrode, carriers such as electrons or holes injected from the gate electrode into the semiconductor thin film are transported to the interface between the semiconductor thin film and the gate insulating film, so the voltage is effectively applied directly to the gate insulating film. This is equivalent to applying . In other words, the semiconductor thin film functions to effectively improve the withstand voltage of the ultra-thin gate insulating film, but does not prevent a predetermined potential from being applied from the gate electrode to the semiconductor surface. Therefore, a MIS transistor using a compound semiconductor with high interface state density can be realized.
本発明において用いる半導体薄膜は、キャリア走行時間
を十分短いものとするため、短絡防上に必要な最小限の
厚さ、好ましくは数１００人程度量下にする。またこの
半導体薄膜は、ゲート電極金属からのキャリア注入効率
を上げるために、そ７、のイオン化エネルギーまたは電
子親和力がゲート電極金属の仕事関数に近いもの、即ち
オーミックコンタクト或いはそれに近い条件を満たすこ
と、更にもれ電流を少なくするためにゲート電極から注
入されるキャリア以外のキャリアはできるだけ少ないこ
と、が望ましい。In order to make the carrier traveling time sufficiently short, the semiconductor thin film used in the present invention has a minimum thickness necessary for preventing short circuits, preferably several hundred thicknesses. In addition, in order to increase the efficiency of carrier injection from the gate electrode metal, this semiconductor thin film must satisfy the following conditions: (7) the ionization energy or electron affinity is close to the work function of the gate electrode metal, that is, ohmic contact or a condition close to it; Furthermore, in order to reduce leakage current, it is desirable that carriers other than carriers injected from the gate electrode be as small as possible.
（実施例） 以下、本発明の実施例を図面を参照して説明する。(Example) Embodiments of the present invention will be described below with reference to the drawings.
図は一実施例のｎチャネルＭ Ｉ Ｓ トランジスタで
ある・。１はｐ型ＧａＡＳ基板てあり、２，３はソース
、ドレインとなるｎ型層である。これらｎ型層２．３間
の基板１．にＰＭＭＡ高分子膜をＬＢ法により５層累積
して約１０人のゲート絶縁膜４を形成し、この」二に有
機半導体薄膜５として、フタロシアニン誘導体膜をＬＢ
法により５層累積して約３０人の厚みに形成している。The figure shows an example of an n-channel M I S transistor. 1 is a p-type GaAS substrate, and 2 and 3 are n-type layers that become a source and a drain. The substrate 1. between these n-type layers 2.3. 5 layers of PMMA polymer film are accumulated using the LB method to form a gate insulating film 4 of approximately 10 layers, and then a phthalocyanine derivative film is deposited as an organic semiconductor thin film 5 using the LB method.
Using the method, five layers are accumulated to a thickness of about 30 people.
ゲート電極６は約１０００人のＡｕ蒸着膜である。The gate electrode 6 is made of approximately 1000 Au evaporated films.
このような構成により、フェルミ・レベルのピン止めが
なく、正常なＭＯＳトランジスタ動作を示した。With this configuration, there was no pinning at the Fermi level, and normal MOS transistor operation was exhibited.
図の構成において、ゲート絶縁膜４として厚さ約２０人
の５ｉ０２膜を用い、有機半導体薄膜５としてポリジア
セチレン誘導体薄膜をＬＢ法により約１００人累積形成
した。この実施例においてもＧａＡｓ基板１の表面の反
転が実現し、正常なＭＯＳ）ランジスタ動作が観測され
た。In the configuration shown in the figure, a 5i02 film with a thickness of about 20 layers was used as the gate insulating film 4, and a polydiacetylene derivative thin film was deposited by about 100 layers as the organic semiconductor thin film 5 by the LB method. In this example as well, the surface of the GaAs substrate 1 was inverted, and normal MOS transistor operation was observed.
本発明におけるゲート絶縁膜としては、無機絶縁膜では
５ｉ０２膜の他例えばＡｌ１０３等が用いられる。９機
絶縁膜では以下に示すような種々の化合物か用いられる
。As the gate insulating film in the present invention, inorganic insulating films such as Al103 or the like are used in addition to 5i02 film. Various compounds as shown below are used in the 9-layer insulating film.
（１） 下記一般式で表わされる置換可能な飽和および
不飽和炭化水素誘導体
−Ｘ
ここで、Ｒは置換＋１Ｊ能なＣＨ３（ＣＨ２→−或いは
、
ＣＨ３−（−ＣＨ２→ｆ ＣＨ２−ＣＨ２→杜ＣＨ２−
’９璽（但し、ｎおよびｐ＋ｑ＋］は８以上）からなる
疎水基である。また、Ｘは親水基を表わし、−ＣＯＯＨ
，−ＯＨ，−８０３１（、−ＣＯＯＲ’ 。(1) Substitutable saturated and unsaturated hydrocarbon derivatives -X represented by the following general formula, where R is CH3(CH2→-) or CH3-(-CH2→f CH2-CH2→Du CH2 −
It is a hydrophobic group consisting of '9 (where n and p+q+] are 8 or more). Moreover, X represents a hydrophilic group, -COOH
, -OH, -8031(, -COOR'.
Ｎ Ｈ２、Ｎ ” （Ｒ’ ） ３Ｙ −（Ｙ ハ”
口’ｆ ン）などが挙げられる。N H2, N"(R') 3Y - (Y H"
Examples include 口'f ん).
（２）種々の重合性分子
例えば、置換可能なアクリレート、メタクリレート、ビ
ニルエーテル、スチレン、ビニルアルコール、アクリル
アミド、アクリル等のビニル重合体。アラニン、グルタ
メート、アスパルテートなどのα−アミノ酸。ε−アミ
ノカプロン酸等のα−アミノ酸以外のアミノ酸。ヘキサ
メチレンジアミンなどのジアミンとへキサメチレンジカ
ルボン酸等のジカルボン酸１：１混合物よりなるポリイ
ミド重合体。(2) Various polymerizable molecules, such as vinyl polymers such as substitutable acrylates, methacrylates, vinyl ethers, styrene, vinyl alcohols, acrylamides, and acrylics. Alpha-amino acids such as alanine, glutamate, and aspartate. Amino acids other than α-amino acids such as ε-aminocaproic acid. A polyimide polymer consisting of a 1:1 mixture of a diamine such as hexamethylene diamine and a dicarboxylic acid such as hexamethylene dicarboxylic acid.
これらの分子はそれ自身ＬＢ法による累積が可能な場合
は単独で用いることができる。単独で製膜できない場合
は（１）で示したような単独で製膜できる絶縁性分子と
混合して用いる。These molecules can be used alone if they can be accumulated by the LB method. If it cannot be used alone to form a film, it is used in combination with an insulating molecule that can be used alone to form a film, such as shown in (1).
本発明で用いる甲導体薄膜としては、実施例で示したも
のの他、アルバレン化合物、含Ｓ ？ｊＬ索環型化合物
、アミン型化合物、金属錯体化合物、含Ｎ複索環型化合
物、共役系を多く含むポリマーなどが利用できる。また
有機半導体薄膜の他、Ｓｔ。In addition to those shown in the examples, examples of the thin conductor film used in the present invention include albarene compounds, S-containing compounds, etc. jL-ring type compounds, amine-type compounds, metal complex compounds, N-containing polycyclic compounds, polymers containing many conjugated systems, etc. can be used. In addition to organic semiconductor thin films, St.
ＧａＡｓ、ＩｎＰなどの無機半導体薄膜を用いることも
できる。Inorganic semiconductor thin films such as GaAs and InP can also be used.
［発明の効果］
以り述べたように本発明によれば、ゲート絶縁膜とゲー
ト電極の間に半導体薄膜を挿入することにより、超薄膜
からなるゲート絶縁膜の耐圧を実質的に向上し、従来困
難であった化合物′Ｐ−導体を用いたＭＩＳトランジス
タが実現できる。[Effects of the Invention] As described above, according to the present invention, by inserting a semiconductor thin film between the gate insulating film and the gate electrode, the breakdown voltage of the gate insulating film made of an ultra-thin film can be substantially improved; A MIS transistor using a compound 'P-conductor, which has been difficult in the past, can be realized.
【図面の簡単な説明】
図は本発明の一実施例によるＭＯＳトランジスタを示す
図である。
１・・・ｐ型ＧａＡｓ基板、２，３・・・ｎ型層、４・
・・ゲート絶縁膜（Ｐ ＦｖＩ Ｍ Ａ高分子膜）、５
・・・半導体薄膜（フタロシアニンＬＢ膜）、６・・・
ゲート電極（Ａｕ膜）。BRIEF DESCRIPTION OF THE DRAWINGS The figure is a diagram showing a MOS transistor according to an embodiment of the present invention. 1... p-type GaAs substrate, 2, 3... n-type layer, 4...
・・Gate insulating film (PFvI MA polymer film), 5
...Semiconductor thin film (phthalocyanine LB film), 6...
Gate electrode (Au film).
Claims (5)
子において、ゲート電極とゲート絶縁膜の間に半導体薄
膜を介在させたことを特徴とする有機薄膜素子。(1) An organic thin film element having an ultra-thin gate insulating film, characterized in that a semiconductor thin film is interposed between the gate electrode and the gate insulating film.
ト法により形成された有機薄膜である特許請求の範囲第
１項記載の有機薄膜素子。(2) The organic thin film device according to claim 1, wherein the gate insulating film is an organic thin film formed by the Langmuir-Blodgett method.
法により形成された有機薄膜である特許請求の範囲第１
項記載の有機薄膜素子。(3) The semiconductor thin film is an organic thin film formed by the Langmuir-Blodgett method.
The organic thin film device described in .
の範囲第１項記載の有機薄膜素子。(4) The organic thin film device according to claim 1, wherein the gate insulating film is an inorganic insulating film.
求の範囲第１項記載の有機薄膜素子。(5) The organic thin film element according to claim 1, wherein the semiconductor thin film is an inorganic semiconductor thin film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61307662A JPS63161672A (en) | 1986-12-25 | 1986-12-25 | Organic thin film element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61307662A JPS63161672A (en) | 1986-12-25 | 1986-12-25 | Organic thin film element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63161672A true JPS63161672A (en) | 1988-07-05 |
Family
ID=17971737
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61307662A Pending JPS63161672A (en) | 1986-12-25 | 1986-12-25 | Organic thin film element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63161672A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002005349A1 (en) * | 2000-07-12 | 2002-01-17 | California Institute Of Technology | Electrical passivation of silicon-containing surfaces using organic layers |
| EP2068368A2 (en) * | 2007-12-06 | 2009-06-10 | Electronics and Telecommunications Research Institute | Method for manufacturing n-type and p-type chalcogenide material, doped homojunction chalcogenide thin film transistor and method of fabricating the same |
-
1986
- 1986-12-25 JP JP61307662A patent/JPS63161672A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002005349A1 (en) * | 2000-07-12 | 2002-01-17 | California Institute Of Technology | Electrical passivation of silicon-containing surfaces using organic layers |
| US7491642B2 (en) | 2000-07-12 | 2009-02-17 | The California Institute Of Technology | Electrical passivation of silicon-containing surfaces using organic layers |
| US7564120B2 (en) | 2000-07-12 | 2009-07-21 | California Institute Of Technology | Electrical passivation of silicon-containing surfaces using organic layers |
| US8114785B2 (en) | 2000-07-12 | 2012-02-14 | California Institute Of Technology | Electrical passivation of silicon-containing surfaces using organic layers |
| EP2068368A2 (en) * | 2007-12-06 | 2009-06-10 | Electronics and Telecommunications Research Institute | Method for manufacturing n-type and p-type chalcogenide material, doped homojunction chalcogenide thin film transistor and method of fabricating the same |
| US8039926B2 (en) | 2007-12-06 | 2011-10-18 | Electronics And Telecommunications Research Institute | Method for manufacturing N-type and P-type chalcogenide material, doped homojunction chalcogenide thin film transistor and method of fabricating the same |
| EP2068368B1 (en) * | 2007-12-06 | 2012-10-10 | Electronics and Telecommunications Research Institute | Method for manufacturing n-type and p-type chalcogenide thin film transistor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Kymissis et al. | High-performance bottom electrode organic thin-film transistors | |
| US8895417B2 (en) | Reducing contact resistance for field-effect transistor devices | |
| Ernst et al. | Ultimately thin double-gate SOI MOSFETs | |
| JP5455518B2 (en) | Method for reducing Fermi level pinning in non-silicon channel MOS devices | |
| Moselund et al. | Silicon nanowire tunnel FETs: Low-temperature operation and influence of high-$ k $ gate dielectric | |
| US20060088875A1 (en) | Means for electrical contacting or isolation of organic or inorganic semiconductors and a method for its fabrication | |
| KR900008663A (en) | Semiconductor device and manufacturing method thereof | |
| CA1242287A (en) | Semiconductor device exhibiting negative transconductance | |
| EP0239368A2 (en) | Field-effect transistor | |
| Ghosh et al. | Investigation of electrical characteristics in a ferroelectric L-patterned gate dual tunnel diode TFET | |
| Saeidi et al. | Near Hysteresis-Free Negative Capacitance InGaAs Tunnel FETs with Enhanced Digital and Analog Figures of Merit below $\mathrm {V} _ {\text {DD}}= 400\text {mV} $ | |
| Yum et al. | Epitaxial ALD BeO: efficient oxygen diffusion barrier for EOT scaling and reliability improvement | |
| JPH10135481A (en) | Device consisting of thin film transistor | |
| JPS6265472A (en) | Mis type semiconductor element | |
| JPS63161672A (en) | Organic thin film element | |
| Sekiguchi et al. | Subthreshold swing in silicon gate-all-around nanowire MOSFET at cryogenic temperature | |
| Cai et al. | Understanding HZO Thickness Scaling in Si FeFETs: Low Operating Voltage, Fast Wake-Up, and Suppressed Charge Trapping | |
| Kato et al. | The characteristic improvement of Si (111) metal–oxide–semiconductor field-effect transistor by long-time hydrogen annealing | |
| Al-Shadeedi | Lateral and vertical organic transistors | |
| Kawanago et al. | Adhesion lithography to fabricate MoS 2 FETs with self-assembled monolayer-based gate dielectrics | |
| Kamaei et al. | Fully integrated Si: HfO2 Negative Capacitance 2D-2D WSe2/SnSe2 Subthermionic Tunnel FETs | |
| JPS63140576A (en) | Field-effect transistor | |
| Zan et al. | Vertical-channel organic thin-film transistors with meshed electrode and low leakage current | |
| Sasa et al. | A single-electron transistor produced by nanoscale oxidation of InAs | |
| Perera | Optimization of transition-metal dichalcogenides based field-effecttransistors via contact engineering |