JPS63155955A - Picture signal processor - Google Patents

Abstract

PURPOSE:To obtain a binary reproduced picture with high quality by using a binarizing processing means in matching with a character, a graphic, a line drawing, a photograph and a dot photograph so as to process them in parallel in a picture where they exist in mixture thereby forming a synchronized output and adding the selection of each picture or its area designation. CONSTITUTION:An input picture is retarded by two picture elements as the input picture element synchronization and outputs of a binarizing processing means 2 (dither method) and a binarizing processing means 3 (simple binarizing method) are retarded respectively by a time corresponding to four picture element processing so as to output binarized outputs EDO, DHO and BIO of each means in parallel synchronously with the picture element clock GCKO. Since an input picture mixed with various pictures is processed by several kinds of characteristic binarized processing means in parallel at a high speed simultaneously and synchronized output signals are obtained in this way, a binary reproduced picture with high quality is obtained in a picture where various kinds of pictures exist in mixture.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an image signal processing device that reproduces binary image information including gradation images.

Conventional technology In recent years, with the mechanization of office processing and the rapid spread of image communication, the conventional black and white binary manuscript has become a hot topic, and the demand for high quality black and white binary reproduction of gradation images and halftone images has increased. In response to this trend, various binary reproduction means have been developed. However, a single binary processing means can handle various images (images containing a mixture of text, line drawings, halftone images, gradation photographs, etc.).
There is no method that can provide a satisfactory high-quality binary reproduced image for (elements). For example, a systematic dither method is a well-known binary reproduction processing means. (Reference: 21ii display of grayscale images using dither method, Nikkei Electronics, 19785.1, PP50-65) This method is
It attempts to reproduce gradation by the number of dots reproduced within a predetermined area of a bond.
The threshold value prepared in the dither matrix and the input image information are compared for each pixel before binarization processing is performed. In this method, gradation characteristics and resolution characteristics depend on the size of the dither matrix, and are incompatible with each other. Furthermore, when used for printed images, it is difficult to avoid the occurrence of moiré patterns in the reproduced image. To describe more specific features, for example, a binary reproduced image obtained by processing a gradation signal of about 6 bits of an input image signal using a threshold value of a 45° halftone dither matrix,
Although it is relatively adaptable to the human eye, characters processed using the same method have extremely poor character quality with uneven characters, and small characters are difficult to read.
P, 36 to 37) achieve both the above gradation characteristics and high resolution, and are also highly effective in suppressing moiré patterns that occur during halftone image reproduction. However, a unique striped pattern occurs for a specific image signal. Furthermore, since the processing requires calculation, it has the disadvantage that the processing speed for one pixel is slow.

The simple binary reproduction method obtained in comparison with the fixed threshold method cannot be applied to gradation images, but has good adaptability to images such as characters and line drawings.

Problems to be Solved by the Invention As mentioned above, although there is a binary image reproduction means that is optimal for a particular image, it is difficult to simultaneously process images containing a mixture of characters, figures, line drawings, photographs, halftone photographs, etc. When trying to obtain a high-quality reproduced image by using the same method, there is a problem that a single reproduction means cannot handle the problem.

Furthermore, the pixel processing speed of each means is different.

The present invention aims to solve the above-mentioned problem. In order to obtain a high-quality binary reproduction image, the present invention simultaneously processes the mixed image using a plurality of distinctive binary reproduction means and outputs a synchronized output signal. The present invention provides an image signal processing device that can obtain the following.

Means for Solving the Problems The present invention includes a superimposing means for superimposing periodic additional data on an input image signal, and a pixel of interest of the image signal superimposed by the superimposing means with a predetermined threshold value. The difference between the binarization level obtained by comparison and the pixel of interest, that is, the error distribution value determined by a predetermined distribution coefficient that distributes the binarization error to unprocessed pixels around the pixel of interest, is calculated as A first binarization processing means that adds to and corrects pixels corresponding to unprocessed pixels around the pixel, and compares the input image signal with a threshold read out from a random access memory that stores a plurality of threshold levels. The obtained second binarization processing means, the third binarization processing means obtained by comparing the input image signal with a fixed threshold arbitrarily determined in advance, and the input image signal are simultaneously processed. a first delay means for processing in parallel by each of the binarization processing means; A second device that synchronizes and outputs the output image signal from the third binarization processing means.
The above object is achieved by providing the third delay means and the third delay means.

According to the above-mentioned configuration, the present invention can simultaneously process an input image containing a mixture of various images at high speed and in parallel using several types of distinctive binarization processing means, and obtain a synchronized output signal. This was an attempt to achieve a signal processing device.

The embodiment diagram is a schematic block configuration diagram of an image signal processing device in an embodiment of the present invention.

In the figure, 1 is a binarization processing means using the error diffusion method;
It consists of registers and adders (not shown). 2 is a binarization processing means using the dither method, which converts the image signal I DT2
and dither signals RDI and RD2. Reference numeral 3 denotes a simple binary processing means which inputs T2 and a fixed threshold value T from the image signal, compares them by a comparator, and outputs a binary signal.

4 is a read-only memo that stores the signal to be superimposed on the image signal IDT2 of error diffusion processing in 1! J (ROM).

Reference numeral 5 denotes a read/write only memory (RAM) which stores dither signals in the form of a dither matrix and reads out the stored signals, and has a storage capacity of 2 Kbits. Reference numeral 6 denotes a delay means for inputting the input image signal IDT1 and outputting the image signal IDT2, which is composed of a group of registers.

Reference numeral 7 denotes a delay means for inputting the output signal Do of the binarization processing means 2 using the dither method and outputting the binarized output DHO, which is composed of registers and the like. 8 is a delay means for inputting the output signal BO of the simple binary processing means 3 and outputting the binary output signal BIO, and is composed of registers and the like. 9 and 10 are ROM4
11.12 is the RAM5 register that temporarily stores the signals of
This is a register that reads out and temporarily stores the signal. 13,
131 is a switch that inputs the outputs of registers 9, 10 or 11.12 and outputs output signals RN and DT by being alternately switched by the switching signal St; 14 is an input terminal that inputs the input image signal IDTl; Input terminal for inputting main clock signal MCK, 16 is pixel clock G
Input terminal for inputting CK, 17 is line synchronization signal LEB
Input terminal GCL that inputs L, output terminal that outputs KO,
20 to 22 are binary output signals BIO, DHO,
Output terminal that outputs EDO, 23 is main clock MCK1
Input the pixel lock GCK1 line synchronization signal LEBL and check the timing and RO for processing in pixel units and line units.
24 is an input terminal for inputting a signal to be stored in the RAM 5; timing control means for generating and controlling readout timing of M4, read/write timing of RAM 5, and input/output signal synchronization timing of each binarization means 1 to 3; 24 is an input terminal for inputting a signal to be stored in RAM 5; .

In the above configuration, the operation will be explained below.

The input image signal IDT1 is improved by superimposing it with the signal RN read out from the ROM2, which is a low-level periodic signal, to improve horizontal flow patterns and textures for specific image signals, which are shortcomings of the binarization processing means 1 using the error diffusion method. are doing. However, for high-speed operation (the system in this example achieves a processing speed of 70 ns per pixel), the ROM4
The read response speed is slow, typically 150ns to 250ns.
It is ns. Therefore, the data in ROM4 is outputted alternately to registers 9 and 10 by timing signal Rot, and by timing signal 5t=2Dt, register 9.1
The readout time is satisfied by superimposing the signal latched to 0 on the input image signal IDT2 by the changeover switch 13. Therefore, in order to synchronize the pixel processing between the input image signal IDT 1 and the superimposed signal RN, the image signal ID
T2 is a signal delayed by two pixels by the timing signal Dt and the delay means 6.

In this embodiment, the high-speed window processing of one pixel by the binary processing means 1 using the error diffusion method is realized by parallel processing using a register and a single-stage adder using the pixel processing timing signal Dt. The binarized output signal EDO is output after four pixel processing timing signals Dt, that is, four pixel processing.

Next, the binarization processing means 2 which uses the threshold signal stored in the RAM 4 as a dither signal will be explained.

Similarly to the readout of the ROM4 described above, the timing signal R is used to read out the threshold signal from the RAM5 for faster speeds.
At and the timing signal 5t=2Dt are alternately latched, and the threshold signal DT is outputted through the switch 131. For this reason, the comparator compares the image signal IDT2, which is a two-pixel delayed version of the input image signal IDT1, with the threshold signal DT, and outputs a binary signal Do. In order to make the binary signal output Do synchronized with the output EDO from the error diffusion means 1, by adding the pixel processing timing signal Dt for 4 pixel processing to the delay means 7, the binary signal output Do is generated by dithering. Obtain signal DHO.

In order to synchronize with the input delays of the other two types of means, the simple binary means 3 compares the image signal II>T2 delayed by two pixels with the measurement threshold T by a comparator and outputs a binary signal BO. . In order to make this binarized signal B○ an output signal synchronized with the output signal ED○ as described above, the pixel processing timing signal for 4 pixel processing is inputted to the delay means 8, so that the binarized output signal Get BIO.

As described above, according to this embodiment, the input pixel synchronization is delayed by 2 pixels, and the outputs of the binarization processing means 2 (dither method) and the binarization processing means 3 (simple binarization method) are 4 pixels each. By delaying the processing amount, the binarized output ED○, D of each means
HO and BI○ can be output in parallel in synchronization with the pixel clock GCKO.

Effects of the Invention As described above, the present invention processes images containing a mixture of characters, figures, line drawings, photographs, halftone photographs, etc. in parallel using binarization processing means suitable for each image, and moreover, in synchronization. By converting and outputting the image, a high-quality binary reproduced image can be made by adding selection of each image or designation of an image area, which has a great effect.

[Brief explanation of the drawing]

The figure shows block connections of an image signal processing device according to an embodiment of the present invention. 1...Binarization means using error diffusion method, 2...
... Binarization processing means using dither method, 3 ... Simple binarization processing means, 4 ... Read-only memo!
J (ROM), 5... Memo for reading and writing 'J (
RAM), 6...first delay means, 7...
・Second delay means, 8...Third delay means, 9-
12°...Register, 13 and 131...
・Switcher.

Claims (1)

[Claims] a superimposing means for superimposing periodic additional data on an input image signal; and a binarization level obtained by comparing the pixel of interest of the image signal superimposed by the superimposing means with a predetermined threshold value and the pixel of interest. The binarization error, which is the difference, is distributed to the unprocessed pixels around the pixel of interest. An error distribution value determined by a predetermined distribution coefficient is added to the pixels corresponding to the unprocessed pixels around the pixel of interest for correction. a first binarization processing means; a second binarization processing means obtained by comparing the input image signal with a threshold read from a random access memory storing a plurality of threshold levels; a third binarization processing means obtained by comparing the input image signal with a predetermined fixed threshold; and a third binarization processing means for processing the input image signal simultaneously and in parallel by the respective binarization processing means. 1. An image signal processing device comprising: a first delay means; and second and third delay means for synchronizing and outputting output image signals from the second and third processing means.