JPS63151115A - Logic circuit device - Google Patents

Abstract

PURPOSE:To easily change the logic by connecting logic gates with switch matrixes which can be electrically controlled from the external. CONSTITUTION:When turning on/off of switches 26-28 or 43 of switch matrixes 10 is set by signals from the external, terminals of optional logic gates in a logic circuit device can be electrically connected to optional terminals of another logic gates to propagate a signal. Consequently, many kinds of logic function are realized because a logic circuit which can generate the logic where a prescribed logic output to the input of the device appears as the output of the device is realized by connection of internal logic gates corresponding to turning on/off of respective switches in switch matrixes 10. Since these logic functions are realized in accordance with turning-on/off of matrix switches 1, the logic is easily and quickly changed.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a logic circuit device.

[Conventional technology]

Traditionally, logic circuits in which logic gates are arranged in an array are
It is realized in the form of a semiconductor integrated circuit as a gate array. In gate arrays, logic gates are connected by wiring through a metal wiring process, which is one of the manufacturing processes of semiconductor circuits. Therefore, the logic has been changed by changing the photomask in the metal wiring process.

[Problem that the invention seeks to solve]

Therefore, in conventional logic circuits, changing the connections of logic gates once completed requires a lot of time and expense. Furthermore, gate arrays are semiconductor devices that are originally suitable for small-quantity production, but there is a problem in that the production of only one unit requires a high price. Furthermore, during the development of gate arrays, verification of logic designs was performed using computer simulations, and verification using actual electrical signals was impossible. These are all problems that arise when connections are made in a metal layer wiring process that is part of the semiconductor manufacturing process.

In other words, this is a problem that has arisen due to the simultaneous creation of logic during the manufacturing process, and may be resolved if the number of products manufactured increases, but verification of logic design is currently impossible regardless of production volume. Tonafutaru.

An object of the present invention is to solve these problems and provide a logic circuit device that has excellent versatility and allows easy verification of logic designs by making it possible to change the connection of logic gates. do.

[Means for solving problems]

Therefore, the present invention provides a switch means having a group of wires arranged in a matrix and a group of switches capable of switching on/off between the wires according to the input of an electric signal, and a switch group coupled to the switch means and arranged in an array. and a command means for supplying an electrical signal to the switch group.

[For production]

That is, according to the present invention, the connections of logic gates can be easily changed by supplying electrical signals, and the logic functions can be easily changed.

〔Example〕 Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an example of the configuration of a switch matrix according to an embodiment of the logic circuit device of the present invention. Here, 1 is the vertical wiring rl, r2 . ..., rm and horizontal wiring cl, c2
．． ..., a matrix switch that connects an, 2
are switches that connect left and right or upper and lower adjacent blocks (see FIG. 3). Figure 1 shows a switch matrix with n-tree wiring in the horizontal direction and m-tree wiring in the vertical direction, with mxn matrix switches 1,
Total (n+1)x including connection switch 2 between blocks
It is a collection of (m+1) switches.

That is, the mxn switch matrix has terminals that are connected to blocks adjacent to each other vertically, horizontally, and horizontally via the switches 2, respectively.

FIG. 2 shows an example of a logic gate block that can be coupled to the switch matrix shown in FIG. 1, and here vertical wiring rl, r2 . ....

Shows items that can be connected to rm. The logic gate indicated by 3 is a logic gate that accepts at least two or more inputs and has an output of negative logic, and in the example shown in the second figure, 2
It consists of an input NAND circuit. Note that the number of gates included in one block can be any desired, and the types of gates can be combined in any desired manner. In this example,
A combination is required so that the sum of the number of input terminals and the number of output terminals of one or more gates is m.

FIG. 3 shows an embodiment of a logic circuit device to which the present invention is applied, which can be constructed by a combination of a switch matrix as shown in FIG. 1 and a logic gate block as shown in FIG. In the figure, 10 is a switch matrix, 1
2 indicates a logic gate block. Although FIG. 3 shows a configuration consisting of six switch matrices 10 and four logic gate blocks 12, the number of components can be arranged arbitrarily; for example, the unconnected terminals of the switch matrix The device can be expanded by connecting similar switch matrices.

14 is an output buffer circuit for outputting a signal to the outside of the device, and 16 is an output buffer circuit for inputting a signal from outside the device.

This is an input buffer circuit for These buffer circuits 14 and 16 can also be expanded to any desired number by branching using a switch matrix.

18 is a switch matrix control circuit that individually specifies on/off for each switch 1 in each switch matrix 10, and outputs a control signal to each switch according to input from an external input device 20. conduct.

Although the switch matrix control circuit 18 is shown as an independent block in FIG. 3, when implementing the logic circuit device according to the present invention as a semiconductor device, the number of switches 1 constituting the switch matrix 10 is extremely large. Therefore, it is difficult to arrange the switch matrix control circuit 18 and the switch 1 apart from each other because a large number of mutual wirings are required. It is desirable to have a form that incorporates By providing the switch matrix control circuit 18 with a memory whose number of bits corresponds to the number of matrix switches 1, the number of input terminals that receive the on/off decision information of the switches 1 inputted from the outside is reduced. can be converted into That is, in the logic circuit device according to this example, the overall logic can be determined by writing on/off information into the memory inside the switch matrix control circuit 18.

The input device 20 may be a keyboard used during logic design, or an external storage device using a storage medium such as a magnetic disk or magnetic tape that stores switch information.

FIG. 4 shows a configuration example of a circuit for determining on/off of the matrix switch 1, that is, a circuit that combines the switch matrix 10 and its control circuit 18.
6.27 and 28 act as switch 1<MOSl-
The transistors 29, 30 and 31 are registers. 35 is a data input terminal for determining on/off of the switch, 36 is a clock input terminal for shifting the shift registers 29 to 31, and the input device 20
Can be combined with That is, with the circuit configuration shown in FIG.
On/off of the switch matrix can be controlled by an external electrical signal.

Although three shift registers are shown in FIG. 4 for the sake of simplicity, it is desirable to provide the same number of shift registers as the number of switches 1 included in all switch matrices 10.

FIG. 5 shows another example of the configuration of a circuit for determining whether the matrix switch 1 is turned on or off. Here, 43 indicates one matrix switch, and 42 indicates a 1-bit RAM cell. Reference numerals 44 and 45 denote a selection signal line and a data signal line, respectively, from the input device 20 for selecting a 1-bit RAM cell using an XY matrix. In the configuration shown in FIG. 5, a 1-bit RAM cell 12 is provided corresponding to each switch 43 in the switch matrix 10, and the on/off of the matrix switch 43 is controlled by the contents of the RAM cell 42.

That is, each RAM cell constitutes a RAM as a whole,
Any desired on/off data can be written using an external input device 20.

In the configuration shown in FIG. 4 or 5, when the switches 26 to 28 or 43 of the switch matrix 10 are turned on or off by an external signal, the terminals of any logic gate in the logic circuit device can be turned on or off by an external signal. It becomes possible to propagate signals by electrically connecting to the terminals of. therefore,
A logic circuit capable of generating logic in which a predetermined logic output appears as the output of the device in response to the input of the device can be realized by connecting internal logic gates according to whether each switch in the switch matrix 10 is turned on or off. Therefore, the device according to this example can realize various logical functions.And since this logical function is realized according to the on/off of the matrix switch 1, the logic can be changed easily and quickly. be able to.

FIG. 6 shows another embodiment of the switch matrix according to the present invention, in which the switch matrix is configured as a three-dimensional matrix. That is, the arrangement in the X direction jlx
l, x2. ...and Y-direction wiring 3/1. y2.
New wiring zl, z2 . ...
, and a switch 53 is added to each intersection. In this example, there are two switches per logic gate output.

If a circuit such as that shown in FIG. 4 or 5 is applied to such a three-dimensional switch matrix, the degree of freedom in connecting logic gates to each other will be further expanded. Note that when a three-dimensional matrix switch is used, the configuration of the entire device also becomes a three-dimensional configuration.

According to the devices according to the embodiments described above, when used as a standalone device, it is not only possible to change the logic, but also it can be used as a logic simulator by taking advantage of the fact that the logic can be changed. It becomes possible.

In addition, when manufacturing a large number of devices related to each side mentioned above, the manufacturing cost per device is sufficiently lower than the cost required to manufacture one conventional gate array, and it can be used as a general-purpose device whose logic can be changed. Therefore, when used as a small-scale logic circuit device, it is much more advantageous than a gate array.

[Effects of the Invention] As explained above, according to the present invention, logic can be easily changed by connecting logic gates using a switch matrix that can be electrically controlled from the outside. Therefore, when the device according to the present invention is realized as a semiconductor device, it can be used as a versatile logic circuit that can support all logic functions. It can also be used to verify logic designs before manufacturing regular gate arrays.

Furthermore, since the logic function can be changed by the switch matrix, it is also possible to add a learning function to the logic device by feeding back the logic output to the switch matrix.

[Brief explanation of the drawing]

1 is a circuit diagram showing one embodiment of a switch matrix according to the logic circuit device of the present invention; FIG. 2 is a circuit diagram showing an example of the configuration of a logic gate block that can be coupled to the switch matrix shown in FIG. 1; The figure is a block diagram showing an embodiment of the present invention using the circuit shown in Figures 1 and 2. Figures 4 and 5 are for determining on/off of each switch included in the switch matrix. FIG. 6 is a circuit diagram showing another embodiment of the switch matrix according to the present invention. 1.26, 27, 28, 43.53... Matrix switch. 3...Logic gate, ■0...Switch matrix, 12...Logic gate block 18...Switch matrix control circuit, 20...Input device, 29.30.31...Shift register, 42 ...R
AM cell, cl,..., cn, rl, -...,
rm, xi. x2. yl, y2...matrix wiring. Figure 2 Figure 4 Figure 5 Figure 6

Claims (1)

[Scope of Claims] Switch means having a group of wires arranged in a matrix and a group of switches capable of switching on/off between the wires according to the input of an electric signal; A logic circuit device comprising: a logic circuit including arranged logic gates; and command means for supplying the electrical signal to the switch group.