JPS63149646U - - Google Patents
Info
- Publication number
- JPS63149646U JPS63149646U JP4103887U JP4103887U JPS63149646U JP S63149646 U JPS63149646 U JP S63149646U JP 4103887 U JP4103887 U JP 4103887U JP 4103887 U JP4103887 U JP 4103887U JP S63149646 U JPS63149646 U JP S63149646U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- wideband amplifier
- output
- amplifier circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Description
第１図及び第２図は本考案の一実施例を示す図
である。第３図は従来例を示す図である。
１０……アンテナ、１８……アンテナ入力端子
、２０……入力フイルタ、２２……第１広帯域増
幅回路、２４……２分配回路、ｊ……信号（第１
出力信号）、２６……第２広帯域増幅回路、１６
……ＲＦモジユレータ回路、２８……混合回路、
３０……テレビ出力端子、ｉ……信号（第２出力
信号）、３４……チユーナ回路、３２……チユー
ナ出力端子、３６……第３広帯域増幅回路。
FIGS. 1 and 2 are diagrams showing an embodiment of the present invention. FIG. 3 is a diagram showing a conventional example. DESCRIPTION OF SYMBOLS 10...Antenna, 18...Antenna input terminal, 20...Input filter, 22...First broadband amplifier circuit, 24...2 distribution circuit, j...Signal (first
output signal), 26... second wideband amplifier circuit, 16
...RF modulator circuit, 28 ...mixing circuit,
30...TV output terminal, i...signal (second output signal), 34...tuner circuit, 32...tuner output terminal, 36...third wideband amplifier circuit.
Claims (1)
と、このアンテナ入力端子からの不要電波を遮断
する入力フイルタと、この入力フイルタからの信
号を増幅する第１広帯域増幅回路と、この第１広
帯域増幅回路からの信号を２分配する２分配回路
と、この２分配回路からの第１出力信号を増幅す
る第２広帯域増幅回路と、この第２広帯域増幅回
路の出力とＲＦモジユレータ回路からの信号とを
混合する混合回路と、この混合回路からの信号を
出力するテレビ出力端子と、前記２分配回路から
の第２出力信号をチユーナ回路に出力するチユー
ナ出力端子とを備えるＲＦブースタ付モジユレー
タに於いて、 前記２分配回路と前記チユーナ出力端子間に設
けられ前記第２出力信号を増幅する第３広帯域増
幅回路を、備えることを特徴とするＲＦブースタ
付モジユレータ。[Claims for Utility Model Registration] An antenna input terminal that receives input from the antenna, an input filter that blocks unnecessary radio waves from the antenna input terminal, and a first wideband amplifier circuit that amplifies the signal from the input filter. A two-way distribution circuit that divides the signal from this first wideband amplifier circuit into two, a second wideband amplifier circuit that amplifies the first output signal from this two-way distribution circuit, an output of this second wideband amplifier circuit, and an RF modulator circuit. with an RF booster comprising: a mixing circuit that mixes the signal from the mixing circuit; a TV output terminal that outputs the signal from the mixing circuit; and a tuner output terminal that outputs the second output signal from the two-way distribution circuit to the tuner circuit. A modulator with an RF booster, characterized in that the modulator includes a third wideband amplifier circuit that is provided between the two-way distribution circuit and the tuner output terminal and amplifies the second output signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4103887U JPS63149646U (en) | 1987-03-20 | 1987-03-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4103887U JPS63149646U (en) | 1987-03-20 | 1987-03-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63149646U true JPS63149646U (en) | 1988-10-03 |
Family
ID=30855666
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4103887U Pending JPS63149646U (en) | 1987-03-20 | 1987-03-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63149646U (en) |
-
1987
- 1987-03-20 JP JP4103887U patent/JPS63149646U/ja active Pending
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