JPS63148873A - Inverter device - Google Patents

Inverter device

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Publication number
JPS63148873A
JPS63148873A JP61296086A JP29608686A JPS63148873A JP S63148873 A JPS63148873 A JP S63148873A JP 61296086 A JP61296086 A JP 61296086A JP 29608686 A JP29608686 A JP 29608686A JP S63148873 A JPS63148873 A JP S63148873A
Authority
JP
Japan
Prior art keywords
inverter
voltage
current
transformer
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61296086A
Other languages
Japanese (ja)
Other versions
JPH0710184B2 (en
Inventor
Yoshizo Akao
赤尾 佳三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP61296086A priority Critical patent/JPH0710184B2/en
Publication of JPS63148873A publication Critical patent/JPS63148873A/en
Publication of JPH0710184B2 publication Critical patent/JPH0710184B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To prevent an inverter transformer against DC deviation of magnetic field, by providing a detecting means composed of a saturable reactor to detect DC current flowing to the primary side of the inverter transformer and a resistance. CONSTITUTION:An inverter device using GTO's (gate turnoff thyristers) 2GU-2GY as switching element is composed of GTO's, gate circuits 2U-2Y, and an inverter transformer 3. It feeds the current to a load 4 and is equipped with a gate control circuit 10. On this occasion, a series splicer of a saturable reactor 21 and a resistance 22 is used instead of a shunt as a means to detect DC current, with which the current is inputted into the gate control circuit 10 through an isolating amplifier 23. Thus, even if there is a difference in the product of voltage-time whether by the positive or negative output of the inverter, the current can be detected which is sure to give DC deviation of magnetic field to the inverter transformer by the abovementioned detecting means 21-22.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は直流を交流に変換するインバータ装置に係り、
特にインバータ出力側の変圧器の直流偏磁を防止できる
インバータ装置に関する。
[Detailed description of the invention] [Object of the invention] (Industrial application field) The present invention relates to an inverter device that converts direct current to alternating current,
In particular, the present invention relates to an inverter device that can prevent DC bias in a transformer on the inverter output side.

(従来の技術) 第4図にスイッチング素子としてゲートターンオフサイ
リスタ(以下GTOと記す)を使用した従来のインバー
タ装置の一例を示す。第4図において、1は直流電源、
2GU〜2GYはGTO12DLI〜2DYはフィード
バックダイオード、2U〜2YはそれぞれGTo 2G
U〜2GYにゲート信号を増幅して与えるゲート回路、
3はインバータ変圧器、4は負荷、10は0丁0 2G
U〜2GXのゲート回路2U〜2Yに所定のゲート信号
を与えるゲート制御回路である。20はインバータ出力
電流を検出する分流器、23は絶縁増幅器である。
(Prior Art) FIG. 4 shows an example of a conventional inverter device using a gate turn-off thyristor (hereinafter referred to as GTO) as a switching element. In Fig. 4, 1 is a DC power supply;
2GU~2GY are GTO12DLI~2DY are feedback diodes, 2U~2Y are each GTo 2G
A gate circuit that amplifies and gives a gate signal to U~2GY,
3 is the inverter transformer, 4 is the load, 10 is 0 2G
This is a gate control circuit that provides a predetermined gate signal to the gate circuits 2U to 2Y of U to 2GX. 20 is a shunt that detects the inverter output current, and 23 is an isolation amplifier.

第5図は第46のインバータ装置の動作を説明するため
のタイムチャートである。第5図において2GU−V〜
2GY−VはそれぞれGTO2GU〜2GYのアノード
、カソード間の電圧波形を表わしている。vlはインバ
ータ出力電圧波形を表わしている。第5図の斜線部はG
TO2Uだけが特にターンオンが遅い場合の電圧欠損分
を表わしている。インバータ出力の正側と負側とでは電
圧波高値は直流電源の電圧値に等しいから各々のGTO
のスイッチング時間に差があると、第5図に示したよう
にインバータ出力の正側と負側とで電圧時間積に差が生
じる。その結果第4図の場合ではインバータ変圧器3の
1次巻線に第4図に図示した向きに直流電流■が流れイ
ンバータ変圧器3は直流偏磁されることになる。
FIG. 5 is a time chart for explaining the operation of the 46th inverter device. In Fig. 5, 2GU-V~
2GY-V represents the voltage waveform between the anode and cathode of GTO2GU to 2GY, respectively. vl represents the inverter output voltage waveform. The shaded area in Figure 5 is G.
Only TO2U represents the voltage deficit especially in the case of slow turn-on. Since the voltage peak value on the positive side and negative side of the inverter output is equal to the voltage value of the DC power supply, each GTO
If there is a difference in the switching time, a difference occurs in the voltage-time product between the positive side and the negative side of the inverter output, as shown in FIG. As a result, in the case shown in FIG. 4, a direct current (2) flows through the primary winding of the inverter transformer 3 in the direction shown in FIG. 4, causing the inverter transformer 3 to be biased by direct current.

そこで、従来はインバータ変圧器3の1次側に分流器3
を設け、前記直流電流を検出し分流器3の検出電圧を絶
縁増幅器23にて絶縁かつ増幅してゲート制御回路1o
に与え、該検出信号によりインバータの正出力及び負出
力の電圧時間積が等しくなるように制御し、インバータ
変圧器3の直流偏磁を防止するようにしている。
Therefore, in the past, a shunt 3 was installed on the primary side of the inverter transformer 3.
is provided, the DC current is detected, the detected voltage of the shunt 3 is isolated and amplified by the isolation amplifier 23, and the gate control circuit 1o is
The detection signal is used to control the voltage-time product of the positive output and negative output of the inverter to be equal, thereby preventing DC bias in the inverter transformer 3.

(発明が解決しようとする問題点) 一般に、変圧器の巻線に直流電流が流れると変圧器の鉄
心は直流偏磁を受ける。変圧器の鉄心はその磁束密度と
その断面積との積により飽和磁束が決まり、変圧器の鉄
心が直流偏磁を受けた場合、鉄心には直流電流による磁
束及び交流電圧による磁束が重なるため、巻線に流れる
直流電流が大きければ大きいほど鉄心は飽和しやすくな
る。
(Problems to be Solved by the Invention) Generally, when a direct current flows through the windings of a transformer, the iron core of the transformer experiences direct current bias. The saturation magnetic flux of the transformer core is determined by the product of its magnetic flux density and its cross-sectional area, and when the transformer core receives DC bias magnetization, the magnetic flux due to the DC current and the magnetic flux due to the AC voltage overlap in the core, so The greater the direct current flowing through the windings, the more likely the iron core will become saturated.

そこで鉄心を飽和しにくくするためには、鉄心の断面積
を大きくして磁束密度を下げることになるが、同じ鉄心
材料の場合磁束密度を下げれば下げるほど変圧器が大形
化する。
Therefore, in order to make the iron core less likely to saturate, the cross-sectional area of the iron core is increased to lower the magnetic flux density, but when using the same iron core material, the lower the magnetic flux density is, the larger the transformer becomes.

一方、通常の変圧器では定格電流の数パーセントの直流
電流が巻線に流れると鉄心は飽和することが知られてい
る。従って、第4図においてインバータ変圧器3を飽和
させないためには、直流電流1をインバタ変圧器3の定
格1次電流の数パーセント以下になるようインバータの
正出力又は負出力電圧の電圧時間積を制御する必要があ
る。例えば分流器20の定格2次出力電圧が50mVで
インバータ変圧器3を飽和させる直流電流を定格電流の
2%とすると分流器3の2次出力電圧は5Q IVX 
0002−1 11V となる。インバータ装置が高圧、人寄」化すると、装置
内部で発生する磁界や電界の強度が大となるため、分流
器3の2次出力電圧が1 111V程度の場合、装置内
部の磁界や電界の影響を受けやすく、インバータトラン
ス3の1次側に流れる直流電流を正確に検出できず直流
偏磁の防止制御も正常に行うことは困難となる。
On the other hand, it is known that in a normal transformer, the core becomes saturated when a direct current of several percent of the rated current flows through the windings. Therefore, in order to prevent the inverter transformer 3 from becoming saturated in FIG. need to be controlled. For example, if the rated secondary output voltage of the shunt 20 is 50 mV and the DC current that saturates the inverter transformer 3 is 2% of the rated current, the secondary output voltage of the shunt 3 is 5Q IVX
0002-1 11V. When an inverter device becomes high-voltage and crowded, the strength of the magnetic and electric fields generated inside the device increases. Therefore, it is difficult to accurately detect the DC current flowing to the primary side of the inverter transformer 3, and it is difficult to properly perform control to prevent DC bias magnetization.

そこで、第4図に示す従来の方法では分流器20と絶縁
増幅器23の間の電線として同軸ケーブルを使用したり
、さらに該同軸ケーブルを電線管に収納したりなどのシ
ールド処理を施しているが、該シールド処理を施すと、
組立の作業性が悪化しかつコストアップにもなる。また
、前述したように分流器20の検出電圧があまりにも小
さいので前記シールド処理を施しただけでも不十分で誤
検出することを避けられないというのが実情である。
Therefore, in the conventional method shown in FIG. 4, a coaxial cable is used as the wire between the shunt 20 and the isolated amplifier 23, and the coaxial cable is further shielded by being housed in a conduit. , when the shielding treatment is applied,
Assembling workability deteriorates and costs increase. Furthermore, as described above, the detection voltage of the shunt 20 is so small that even the shielding process is insufficient and erroneous detection cannot be avoided.

本発明は上記欠点を除去するためになされたもので、イ
ンバータ変圧器の1次側に流れる直流電流を誤検出せず
確実に検出できる検出手段を具備し、インバータ変圧器
の直流偏磁防止を可能とだインバータ装置を提供するこ
とを目的とする。
The present invention has been made to eliminate the above-mentioned drawbacks, and includes a detection means that can reliably detect the DC current flowing to the primary side of the inverter transformer without erroneously detecting it, and prevents DC bias in the inverter transformer. The purpose is to provide an inverter device that is possible.

[発明の構成] (問題点を解決するための手段及び作用)本発明では、
上記目的を達成するため、インバータ変圧器とインバー
タとの間の線間に抵抗及び僅かの直流電流で飽和する可
飽和リアクトルを直列接続してなる検出手段を設け、イ
ンバータを構成する主スイツチング素子の各々のスイッ
チング時間の差等によりインバータの正出力と負出力と
で電圧時間積に差が生じた場合、前記検出手段に前記電
圧時間積の差により生じる直流電流が流れるようにし、
前記検出手段を構成する抵抗により電流の極性と大きさ
を検出し、該抵抗の両端電圧をインバータの出力電圧制
御系に割り込ませ、インバータの正出力及び負出力の電
圧時間積を可変させてインバータの正出力と負出力の電
圧時間積が等しくなるようにし、インバータ変圧器の1
次側に直流電流が流れないようにして、インバータ変圧
器の直流偏磁を防止している。
[Structure of the invention] (Means and effects for solving the problems) In the present invention,
In order to achieve the above object, a detection means consisting of a resistor and a saturable reactor that saturates with a small amount of direct current are connected in series between the inverter transformer and the inverter, and detects the main switching elements constituting the inverter. When a difference occurs in the voltage-time product between the positive output and the negative output of the inverter due to a difference in each switching time, etc., a direct current generated due to the difference in the voltage-time product flows through the detection means,
The polarity and magnitude of the current are detected by the resistor constituting the detection means, the voltage across the resistor is input to the output voltage control system of the inverter, and the voltage-time product of the positive output and negative output of the inverter is varied. The voltage-time product of the positive output and negative output of the inverter transformer should be equal.
By preventing direct current from flowing to the next side, biased direct current magnetization of the inverter transformer is prevented.

(実施例) 第1図は本発明の一実施例を示す図である。(Example) FIG. 1 is a diagram showing an embodiment of the present invention.

第1図において、第4図と同一の符号を付した部分の名
称とその動作機能は同一であり説明を省略する。第1図
において、第4図と異なる点は第1図では直流電流を検
出する手段として第4図の分流器20の代わりに、可飽
和リアクトル21と抵抗22を直列接続した回路を設け
た点にある。
In FIG. 1, the names and operating functions of the parts designated by the same reference numerals as in FIG. 4 are the same, and their explanations will be omitted. The difference between FIG. 1 and FIG. 4 is that in FIG. 1, a circuit in which a saturable reactor 21 and a resistor 22 are connected in series is provided as a means for detecting direct current, instead of the shunt 20 in FIG. 4. It is in.

第1図において、21は僅かの直流電流で飽和する可飽
和リアクトル、22は可飽和リアクトル21に流れる電
流を電圧に変換する抵抗である。
In FIG. 1, 21 is a saturable reactor that saturates with a small amount of direct current, and 22 is a resistor that converts the current flowing through the saturable reactor 21 into a voltage.

第2図は可飽和リアクトル21のB−H特性でBは磁束
密度、Hは磁界の強さを表わしている。第2図のB−H
特性は図から明らかなように、いわゆる角形ヒステリシ
スの特性で、可飽和リアクトル21に直流電流が流れる
と(第2図のHが増加すると)可飽和リアクトル21の
鉄心が容易に飽和する特性であるものとする。10は公
知のゲート制御回路で従来技術の例で説明したものと同
一機能で、以下詳細に述べる。すなわち、10はインバ
ータの出力電圧制御回路で、GTO2GU〜2GYのO
FFタイミングを制御することによりインバータの正出
力と負出力の電圧幅〈パルス幅)を個別に制御できる機
能を有し、さらに第1図に図示した外部信号eが与えら
れると、その外部信号eの極性に応じて、該正出力と該
負出力の電圧幅を一方は広げ、他方は狭める機能を有す
るものである。
FIG. 2 shows the B-H characteristics of the saturable reactor 21, where B represents the magnetic flux density and H represents the strength of the magnetic field. B-H in Figure 2
As is clear from the figure, the characteristic is a so-called rectangular hysteresis characteristic, in which the iron core of the saturable reactor 21 is easily saturated when a DC current flows through the saturable reactor 21 (as H in FIG. 2 increases). shall be taken as a thing. Reference numeral 10 denotes a known gate control circuit which has the same function as that explained in the example of the prior art, and will be described in detail below. In other words, 10 is an inverter output voltage control circuit, which controls O of GTO2GU to 2GY.
It has a function that allows the voltage width (pulse width) of the positive output and negative output of the inverter to be individually controlled by controlling the FF timing, and furthermore, when the external signal e shown in FIG. Depending on the polarity, one has the function of widening the voltage width of the positive output and the negative output, and the other has the function of narrowing it.

今、仮にGTO2tJ〜2Yのスイッチング時間の差が
生じ、インバータ出力の電圧時間積は負側の方が正側よ
り大きくなったとする。この場合、可飽和リアクトル2
1は僅かの電流で飽和する特性を有する為、インバータ
変圧器3が飽和する前に飽和し、可飽和リアクトル21
には第1図に示した向きの電流1が流れる。
Now, suppose that a difference occurs in the switching times of GTO2tJ to GTO2Y, and the voltage-time product of the inverter output is larger on the negative side than on the positive side. In this case, saturable reactor 2
1 has the characteristic of being saturated with a small amount of current, so it is saturated before the inverter transformer 3 is saturated, and the saturable reactor 21
A current 1 flows in the direction shown in FIG.

その結果検出抵抗22の両端には第1図に図示した電流
Iに比例した電圧が発生し、該電圧は絶縁増幅器23を
通してゲート制御回路10に前記外部信号eとして与え
られる。外部制御信号eはゲート制御回路内の図示しな
い誤差増幅器に与えられ、該誤差増幅器の働きにより、
インバータの正出力の電圧幅は広がり、負出力の電圧幅
は狭められる。該電圧幅の推移動作は該正出力と該負出
力の電圧時間積が等しくなるまで続く。その結果、第1
図に図示した電流Iはほとんど流れなくなり、インバー
タ変圧器3は直流偏磁を受けなくなる。
As a result, a voltage proportional to the current I shown in FIG. 1 is generated across the detection resistor 22, and this voltage is applied to the gate control circuit 10 through the isolation amplifier 23 as the external signal e. The external control signal e is given to an error amplifier (not shown) in the gate control circuit, and due to the function of the error amplifier,
The voltage width of the positive output of the inverter is widened, and the voltage width of the negative output is narrowed. The movement of the voltage width continues until the voltage-time products of the positive output and the negative output become equal. As a result, the first
The current I shown in the figure almost no longer flows, and the inverter transformer 3 is no longer subjected to direct current bias.

また、逆にインバータ出力の電圧時間積が正側の方が負
側より大きい場合は、インバータ変圧器3の1次側に流
れる直流電流の向きが第1図に示した電流■とは逆向き
になり、インバータの正出力の電圧幅は挟まり、負出力
の電圧幅は広がり、前述したのと同じく誤差増幅器の動
きにより、該正出力と該負出力の電圧時間積が等しくな
るよう制御され、インバータ変圧器3は直流偏磁を受け
なくなる。
Conversely, if the voltage-time product of the inverter output is larger on the positive side than on the negative side, the direction of the DC current flowing to the primary side of the inverter transformer 3 is opposite to the current ■ shown in Figure 1. As a result, the voltage width of the positive output of the inverter is narrowed, and the voltage width of the negative output is widened, and as described above, by the operation of the error amplifier, the voltage-time products of the positive output and the negative output are controlled to be equal. The inverter transformer 3 is no longer subjected to direct current bias.

一方、インバータ出力電圧を■1、可飽和リアクトル2
1の巻線抵抗をR1、検出抵抗22の抵抗値をR2とす
ると可飽和リアクトル21が飽和で表わされる。従って
、R2を適当な値に選定すれば、可飽和リアクトル21
が飽和した際の検出抵抗22の両端電圧■2を任意の電
圧に選ぶことが可能である。すなわち例えば該電圧v2
を数十ボルトに選ぶことも可能となり、従来例の分流器
20の検出電圧1  mVに比べ1万倍以上にもなるの
で、装置内部の磁界や電界の影響を極めて小さくするこ
とが可能となる。
On the other hand, the inverter output voltage is 1, the saturable reactor 2 is
The saturable reactor 21 is represented by saturation, where the resistance value of the winding is R1 and the resistance value of the detection resistor 22 is R2. Therefore, if R2 is selected to an appropriate value, the saturable reactor 21
It is possible to select an arbitrary voltage as the voltage (2) across the detection resistor 22 when the voltage is saturated. That is, for example, the voltage v2
It is also possible to select tens of volts, which is more than 10,000 times higher than the 1 mV detection voltage of the conventional shunt 20, making it possible to extremely minimize the effects of magnetic and electric fields inside the device. .

以上は、検出手段に含まれる抵抗を一個として説明した
が、第3図に示すように該抵抗を複数個設け、そのうち
のいずれかの抵抗を電圧検出手段として使用してもよい
。また、言うまでもなく本発明が適用されるインバータ
の構成や主スイツチング素子や相数は第1図に限定され
る訳ではない。
Although the above description has been made assuming that the detection means includes one resistor, a plurality of resistors may be provided as shown in FIG. 3, and any one of the resistors may be used as the voltage detection means. It goes without saying that the configuration, main switching elements, and number of phases of the inverter to which the present invention is applied are not limited to those shown in FIG.

[発明の効果] 以上説明したように本発明によれば、たとえインバータ
を構成する主スイツチング素子のスイッチング時間の差
等のために、インバータの正出力と負出力で電圧時間積
の差が生じても、可飽和リアクトルと抵抗とから成る検
出手段により装置内部の磁界や電界の影響をほとんど受
けることなく、確実に直流偏磁を与える電流の検出が可
能となり、インバータ変圧器の直i偏磁を防止すること
ができる。また、従来のように同軸ケーブルや電線管を
使用しなくてすむので、組立作業も容易となり、かつ低
コスト化に役立つものである。
[Effects of the Invention] As explained above, according to the present invention, even if a difference in voltage-time product occurs between the positive output and the negative output of the inverter due to the difference in switching time of the main switching elements constituting the inverter, etc. Also, the detection means consisting of a saturable reactor and a resistor makes it possible to reliably detect the current that causes DC bias without being affected by the magnetic field or electric field inside the device, and it is possible to detect the DC bias in the inverter transformer. It can be prevented. Furthermore, since there is no need to use coaxial cables or conduits as in the past, assembly work becomes easier and costs are reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す回路図、第2図は本発
明に使用する可飽和リアクトル21の8−)−1特性を
示す図、第3図は、本発明の他の検出手段を示す図、第
4図は従来の検出手段を使用したインバータ装置の回路
図、第5図は第4図のインバータ装置の動作説明するた
めのタイムチャートである。 1・・・直流N源、2 G U 〜2 G Y−G T
 0 。 2DU〜2DY・・・ダイオード、2U〜2Y・・・ゲ
ート回路、3・・・インバータ変圧器、4・・・負荷、
10・・・ゲート制御回路、21・・・可飽和リアクト
ル、22.22a 、22b・・・抵抗、23・・・絶
縁増幅器。 出願人代理人 弁理士 鈴江武彦 第1 図 第2図 第4図 第5図
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing 8-)-1 characteristics of the saturable reactor 21 used in the present invention, and FIG. 3 is a diagram showing another detection method of the present invention. FIG. 4 is a circuit diagram of an inverter device using the conventional detection means, and FIG. 5 is a time chart for explaining the operation of the inverter device of FIG. 4. 1...DC N source, 2 G U ~2 G Y-G T
0. 2DU~2DY...Diode, 2U~2Y...Gate circuit, 3...Inverter transformer, 4...Load,
DESCRIPTION OF SYMBOLS 10...Gate control circuit, 21...Saturable reactor, 22.22a, 22b...Resistor, 23...Isolation amplifier. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2 Figure 4 Figure 5

Claims (1)

【特許請求の範囲】[Claims] インバータと負荷との間に変圧器を有し、前記インバー
タの正出力及び負出力電圧の電圧時間積を個別に可変で
きる機能を持ったインバータ装置において、前記変圧器
の1次線間に抵抗及び可飽和リアクトルを直列接続して
なる直流電流成分を検出する検出手段を設け、前記イン
バータの出力電圧中に直流成分が生じた場合該直流成分
を前記検出手段に含まれる抵抗により極性と大きさを検
出し、該検出電圧を前記インバータの出力電圧制御系に
補正量として割り込ませ、前記インバータの正出力及び
負出力電圧の電圧幅を一方は広げるよう他方は狭めるよ
う可変させて前記インバータの正出力と負出力電圧の電
圧時間積が等しくなるように制御することを特徴とする
インバータ装置。
In an inverter device having a transformer between an inverter and a load and having a function of individually varying the voltage-time products of positive output and negative output voltages of the inverter, a resistance and a resistance are connected between the primary lines of the transformer. A detecting means for detecting a direct current component is provided by connecting saturable reactors in series, and when a direct current component occurs in the output voltage of the inverter, the polarity and magnitude of the direct current component are determined by a resistor included in the detecting means. The detected voltage is input to the output voltage control system of the inverter as a correction amount, and the voltage widths of the positive output and negative output voltages of the inverter are varied so that one widens and the other narrows, thereby adjusting the positive output of the inverter. An inverter device characterized in that the inverter device is controlled so that the voltage-time product of the negative output voltage and the negative output voltage are equal.
JP61296086A 1986-12-12 1986-12-12 Inverter device Expired - Lifetime JPH0710184B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61296086A JPH0710184B2 (en) 1986-12-12 1986-12-12 Inverter device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61296086A JPH0710184B2 (en) 1986-12-12 1986-12-12 Inverter device

Publications (2)

Publication Number Publication Date
JPS63148873A true JPS63148873A (en) 1988-06-21
JPH0710184B2 JPH0710184B2 (en) 1995-02-01

Family

ID=17828935

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61296086A Expired - Lifetime JPH0710184B2 (en) 1986-12-12 1986-12-12 Inverter device

Country Status (1)

Country Link
JP (1) JPH0710184B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0472888U (en) * 1990-11-02 1992-06-26

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0472888U (en) * 1990-11-02 1992-06-26

Also Published As

Publication number Publication date
JPH0710184B2 (en) 1995-02-01

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