JPS63146899U

JPS63146899U -

Info

Publication number: JPS63146899U
Application number: JP4014987U
Authority: JP
Priority date: 1987-03-19
Filing date: 1987-03-19
Publication date: 1988-09-28

Description

[Brief explanation of the drawing]

第１図はこの考案によるデイジタル音楽用シー
ケンサの一実施例を示すブロツク図、第２図は第
１図の第１メモリ部に記憶されたデータフオーマ
ツトを示す説明図、第３図は第１図のプログラマ
ブルタイマを示す説明図、第４図は第１図のカウ
ンタを示す説明図、第５図は第１図の外部割込み
図信号発生装置を示す説明図、第６ａ〜６ｃ図は
第１図のものの動作を示す説明図である。１……第１メモリ部、２……第２メモリ部、３
……ＣＰＵ部、４……プログラマブルタイマ、５
……発振器、６……分周器、７……カウンタ、８
……外部割込み信号発生装置、９……インタフエ
ース、１０……バツフアレジスタ、１１，１２…
…カウンタレジスタ、１３……スイツチ、１４…
…チヤタリング除去回路、１５……ワンシヨツト
回路。 FIG. 1 is a block diagram showing an embodiment of a digital music sequencer according to this invention, FIG. 2 is an explanatory diagram showing a data format stored in the first memory section of FIG. 1, and FIG. FIG. 4 is an explanatory diagram showing the programmable timer in FIG. 1, FIG. 5 is an explanatory diagram showing the external interrupt signal generator in FIG. FIG. 3 is an explanatory diagram showing the operation of the one shown in FIG. 1...First memory section, 2...Second memory section, 3
...CPU section, 4...Programmable timer, 5
... Oscillator, 6 ... Frequency divider, 7 ... Counter, 8
...External interrupt signal generator, 9...Interface, 10...Buffer register, 11, 12...
...Counter register, 13...Switch, 14...
...Chattering removal circuit, 15...One shot circuit.

補正昭６２．７．２４実用新案登録請求の範囲を次のように補正する
。Amendment July 24, 1982 The scope of claims for utility model registration is amended as follows.

【実用新案登録請求の範囲】音程、音量等のイベントデータおよび楽器の状
態を制御するコントロールデータがシーケンシヤ
ルに記憶された第１メモリ部と、ＣＰＵ部と、前
記ＣＰＵ部の動作プログラムが記憶された第２メ
モリ部と、前記ＣＰＵ部に割込み信号を送るプロ
グラマブルタイマを具えたデイジタル楽器用シー
ケンサにおいて、前記プログラマブルタイマに適
用するソースクロツクを前記割込み信号の間隔に
相当する周期に分周したクロツクを計数するカウ
ンタと、前記割込み信号より優先順位の高い外部
割込み信号を前記ＣＰＵ部に適用する部材とを設
けたことを特徴とするデイジタル楽器用シーケン
サ。図面の簡単な説明を次のように補正する。明細書第１０頁第２０行目の「音楽用」を「楽
器用」と補正する。同書第１１頁第６行目の「外部割込み図」を「
外部割込み」と補正する。[Claims for Utility Model Registration] A first memory section in which event data such as pitch and volume and control data for controlling the state of the musical instrument are sequentially stored, a CPU section, and an operating program for the CPU section is stored. In a digital musical instrument sequencer comprising a second memory section and a programmable timer that sends an interrupt signal to the CPU section, a clock obtained by dividing a source clock applied to the programmable timer into a period corresponding to the interval of the interrupt signal is counted. A sequencer for a digital musical instrument, comprising: a counter; and a member for applying an external interrupt signal having a higher priority than the interrupt signal to the CPU section. The brief description of the drawing has been amended as follows. "For music" on page 10, line 20 of the specification is corrected to "for musical instruments." The “external interrupt diagram” on page 11, line 6 of the same book is changed to “
"External interrupt".

Claims

[Scope of utility model registration request]

a first memory section in which event data such as pitch and volume and control data for controlling the state of the musical instrument are sequentially stored; a CPU section; a second memory section in which an operating program for the CPU section is stored; A sequencer for a digital musical instrument comprising a programmable timer that sends an interrupt signal to the programmable timer; A digital music sequencer comprising: a member for applying an external interrupt signal having a high priority to the CPU section.