JPS6314534B2 - - Google Patents

Info

Publication number
JPS6314534B2
JPS6314534B2 JP20147983A JP20147983A JPS6314534B2 JP S6314534 B2 JPS6314534 B2 JP S6314534B2 JP 20147983 A JP20147983 A JP 20147983A JP 20147983 A JP20147983 A JP 20147983A JP S6314534 B2 JPS6314534 B2 JP S6314534B2
Authority
JP
Japan
Prior art keywords
circuit
wave
unique word
phase
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP20147983A
Other languages
Japanese (ja)
Other versions
JPS6093836A (en
Inventor
Tokihiro Mishiro
Ryushiro Yoshizawa
Tadayoshi Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20147983A priority Critical patent/JPS6093836A/en
Publication of JPS6093836A publication Critical patent/JPS6093836A/en
Publication of JPS6314534B2 publication Critical patent/JPS6314534B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/14Relay systems
    • H04B7/15Active relay systems
    • H04B7/204Multiple access
    • H04B7/212Time-division multiple access [TDMA]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Radio Relay Systems (AREA)

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は初期捕捉方式に係り、特にPSK−
TDMA衛星通信方式に使用する初期捕捉方式に
関するものである。
[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to an initial acquisition method, and particularly to a PSK-
This relates to the initial acquisition method used in TDMA satellite communication systems.

(b) 従来技術と問題点 多数の地球局が共通の衛星中継器を使用して相
互に通信を行う為には、第1図aに示す様にこの
衛星中継器の時間軸上に設けたフレームFを地球
局の数に応じて時分割し時間スロツトA,B,C
…を設ける。各地球局は自局に割当られた時間ス
ロツトの中にフレームFの間隔で繰り返すバース
ト状の電波を送出する。
(b) Prior art and problems In order for a large number of earth stations to communicate with each other using a common satellite repeater, a satellite repeater is installed on the time axis of the satellite repeater as shown in Figure 1a. Frame F is time-divided according to the number of earth stations and divided into time slots A, B, and C.
... will be established. Each earth station transmits a burst of radio waves that repeats at frame F intervals during the time slot assigned to it.

各地球局からの電波はこの衛星中継器で中継さ
れ、各局は他局の電波を受信して多元接続通信を
行う事ができる。
Radio waves from each earth station are relayed by this satellite repeater, and each station can receive radio waves from other stations to perform multiple access communications.

ここで、割当られた時間スロツトの中にバース
ト状の電波を送出する為には特定の地球局(基準
局)がフレームFの間隔で送出する基準バースト
を基準にして送信時間を制御している。
Here, in order to transmit burst-shaped radio waves within the allocated time slot, the transmission time is controlled based on the reference bursts transmitted at frame F intervals by a specific earth station (reference station).

第1図bは前記の基準バーストの構成を示した
図である。
FIG. 1b is a diagram showing the structure of the reference burst.

同図に於て、CRは受信波から基準搬送波を再
生する為に搬送波再生回路で使用する無変調波の
部分を、BTRはクロツクを再生する為にピツト
タイミング再生回路で使用する同期パターンを、
UKは局識別、位相不確定さ除去の為のユニーク
ワード信号は、OHは回線状態の情報、データの
長さ等を含むオーバーヘツド情報等をそれぞれ示
す。
In the figure, CR is the unmodulated wave part used in the carrier wave recovery circuit to recover the reference carrier wave from the received wave, and BTR is the synchronization pattern used in the pit timing recovery circuit to recover the clock. ,
UK indicates a unique word signal for station identification and phase uncertainty removal, and OH indicates line status information, overhead information including data length, etc.

尚、各局のデータA,B…にも前記搬送波再生
回路用パターンCRやビツトタイミング再生回路
用同期パターンBTR等を含んでいる。
It should be noted that the data A, B, . . . of each station also includes the carrier wave regeneration circuit pattern CR, the bit timing regeneration circuit synchronization pattern BTR, etc.

そして前記の様にバースト状で受信された
PSK波からデータを再生する為の基準搬送波を、
いかに高速に抽出するかが受信装置にとつて先ず
必要な事である。
And as mentioned above, it was received in burst form.
The reference carrier wave for reproducing data from the PSK wave,
The first thing a receiver needs to do is how to extract the information at high speed.

この搬送波再生に就いては種々の方法が公知に
なつている。代表的な例として逆変調、再変調、
周波数逓倍法などがある。しかし、何れの場合で
も搬送波成分のないPSK波から搬送波成分を抽
出する為には、前記の例の様に変調又は逓倍等の
非線型操作を行う必要がある。
Various methods are known for this carrier wave regeneration. Typical examples include inverse modulation, remodulation,
There are frequency multiplication methods, etc. However, in any case, in order to extract a carrier wave component from a PSK wave without a carrier wave component, it is necessary to perform nonlinear operations such as modulation or multiplication as in the above example.

例えば、逆変調は2つの波の位相差360度の中
にn個の安定点(nは変調相数に等しい)を持つ
位相検波器を含むフエイズロツクループ回路
(PLL回路と省略)と考える事ができるので所謂
ベースバンド信号の逓倍に他ならない。
For example, consider inverse modulation as a phase lock loop circuit (abbreviated as PLL circuit) that includes a phase detector that has n stable points (n is equal to the number of modulation phases) within the 360 degree phase difference between two waves. This is nothing but multiplication of the so-called baseband signal.

即ち、PSK波から搬送波成分を抽出する為に
は変調相数に等しい次数の逓倍が行われ、4相の
場合には4逓倍が行われるので逓倍前と比べて等
価的な信号対雑音比が約12dB劣化する。
In other words, in order to extract the carrier wave component from the PSK wave, multiplication with an order equal to the number of modulation phases is performed, and in the case of 4 phases, multiplication by 4 is performed, so the equivalent signal-to-noise ratio is lower than before multiplication. Deterioration of approximately 12dB.

又、受信周波数は相手局の送信周波数の変動及
び衛星中継器の送信周波数の変動等が加わるので
大きく変動する。
Furthermore, the reception frequency fluctuates greatly due to fluctuations in the transmission frequency of the other station and fluctuations in the transmission frequency of the satellite repeater.

そこで、逓倍による信号対雑音比の劣化及び受
信周波数の変動が大きい初期捕捉の時は、搬送波
再生回路の中に含まれるPLL回路が追尾不能と
なる為に搬送波再生回路が動作せず、従つて基準
搬送波が抽出できない場合が生ずると云う問題が
あつた。
Therefore, during initial acquisition where the signal-to-noise ratio deteriorates due to multiplication and the received frequency fluctuates greatly, the PLL circuit included in the carrier wave recovery circuit becomes unable to track, so the carrier wave recovery circuit does not operate. There was a problem in that the reference carrier wave could not be extracted in some cases.

(c) 発明の目的 本発明は上記従来技術の問題に鑑みなされたも
のであつて、PSK−TDMA衛星通信方式に於て
受信波の信号対雑音比が悪くしかも大きな受信周
波数変動の場合にも安定に動作する初期捕捉方式
を提供する事を目的としている。
(c) Purpose of the Invention The present invention has been made in view of the above-mentioned problems of the prior art, and is intended to solve the problems of the prior art described above. The purpose is to provide an initial acquisition method that operates stably.

(d) 発明の構成 上記発明の目的はPSK−TDMA衛星通信方式
に於て、受信局の復調部に含まれる搬送波再生回
路の動作状態を基準局から送出されたユニークワ
ード信号が受信局で検出されない初期捕捉状態の
時には、1個の引き込み安定点を持つ様に、該ユ
ニークワード信号が周期的に検出できる状態の時
は変調相数に等しい数の引き込み安定点を持つ様
に制御する事を特徴とするる初期捕捉方式を提供
する事により達成される。
(d) Structure of the Invention The purpose of the invention is to detect, in the PSK-TDMA satellite communication system, the operating state of a carrier regeneration circuit included in the demodulation section of the receiving station when a unique word signal sent from the reference station is not detected by the receiving station. In the initial acquisition state, control is performed to have one stable pull-in point, and when the unique word signal can be detected periodically, control is performed to have a number of stable pull-in points equal to the number of modulation phases. This is achieved by providing an initial acquisition method that

(e) 発明の実施例 第2図は本発明を実施する為のPSK−TDMA
復調部の概略のブロツク接続図の一例を示す。
(e) Embodiment of the invention Figure 2 shows PSK-TDMA for implementing the invention.
An example of a schematic block connection diagram of a demodulator is shown.

図中、1は位相検波器を、2は搬送波再生回路
を、3はビツトタイミング再生回路を、4は瞬時
極性判定回路を、5はユニークワード検出回路
を、6〜8はそれぞれ端子を示す。
In the figure, 1 is a phase detector, 2 is a carrier wave recovery circuit, 3 is a bit timing recovery circuit, 4 is an instantaneous polarity determination circuit, 5 is a unique word detection circuit, and 6 to 8 are terminals, respectively.

同図に於て、端子6に加えられた受信波は3つ
に分割され第1の受信波は搬送波再生回路2で基
準搬送波成分が抽出され、この基準搬送波成分は
位相検波器1に加えられる。一方、位相検波器1
に加えられた第2の受信波は前記の基準搬送波成
分を用いて復調された後、瞬時極性判定回路4に
加えられる。尚、ビツトタイミング再生回路3に
加えられた第3の受信波からクロツクを抽出し、
このクロツクを瞬時極性判定回路4に加え、ここ
で復調波から受信データを取り出す。
In the figure, the received wave applied to the terminal 6 is divided into three parts, the first received wave is extracted with a reference carrier component by the carrier regeneration circuit 2, and this reference carrier component is added to the phase detector 1. . On the other hand, phase detector 1
The second received wave applied to is demodulated using the reference carrier component, and then applied to the instantaneous polarity determination circuit 4. Note that the clock is extracted from the third received wave applied to the bit timing recovery circuit 3,
This clock is applied to the instantaneous polarity determining circuit 4, where the received data is extracted from the demodulated wave.

初期捕捉状態に於て、基準局から送出した基準
バーストに含まれるユニークワード信号が検出さ
れない時には、ユニークワード検出器5からのユ
ニークワード検出信号が搬送波再生回路2に送ら
れないので、この搬送波再生回路2は安定点が1
つの状態で動作する。
In the initial acquisition state, when the unique word signal included in the reference burst sent from the reference station is not detected, the unique word detection signal from the unique word detector 5 is not sent to the carrier wave regeneration circuit 2. 2 has a stable point of 1
Operates in one state.

一方、ユニークワード信号が検出された時には
このユニークワード検出信号で通常動作である4
つの安定点を持つ状態(4相PSK波の場合)で
搬送波再生回路2が動作する。
On the other hand, when a unique word signal is detected, normal operation is performed using this unique word detection signal.
The carrier regeneration circuit 2 operates in a state having two stable points (in the case of a 4-phase PSK wave).

第3図は第2図に示した搬送波再生回路2のよ
り具体的なブロツク接続図で点線の部分は本発明
を実施する為に付加した部分である。
FIG. 3 is a more specific block connection diagram of the carrier wave recovery circuit 2 shown in FIG. 2, and the dotted line portions are the portions added to implement the present invention.

図中、10は遅延回路を、11,14,23は
位相検波器を、12,15は低域ろ波器を、1
3,16は電圧比較器を、20,21は位相変調
器を、17,22は90度ハイブリツド回路を、2
4はリトリガ型単安定マルチバイブレータ回路
を、18は電圧制御発振器を、19はピーク保持
型ループろ波器を、25,26はそれぞれアンド
回路を、30〜32は端子をそれぞれ示す。
In the figure, 10 is a delay circuit, 11, 14, 23 are phase detectors, 12, 15 are low-pass filters, 1
3 and 16 are voltage comparators, 20 and 21 are phase modulators, 17 and 22 are 90 degree hybrid circuits, 2
4 is a retrigger type monostable multivibrator circuit, 18 is a voltage controlled oscillator, 19 is a peak holding type loop filter, 25 and 26 are AND circuits, and 30 to 32 are terminals.

これらの各ブロツクは次の様に接続される。 Each of these blocks is connected as follows.

端子30は遅延回路10を介して位相変調器2
0及び21の端子2と、又位相検波器11、低域
ろ波器12、電圧比較器13、アンド回路25を
介して位相変調器20の端子1と、更に位相検波
器14、低域ろ波器15、電圧比較器16、アン
ド回路26を介して位相変調器21の端子1にそ
れぞれ接続される。
The terminal 30 is connected to the phase modulator 2 via the delay circuit 10.
0 and 21, and via the phase detector 11, low-pass filter 12, voltage comparator 13, and AND circuit 25, the terminal 1 of the phase modulator 20, and further the phase detector 14 and the low-pass filter. It is connected to the terminal 1 of the phase modulator 21 via the voltage converter 15, the voltage comparator 16, and the AND circuit 26, respectively.

そして、ハイブリツド回路17の端子1及び2
はそれぞれ位相検波器11及び14の端子2と、
端子3は端子32及び電圧制御発振器18、ピー
ク保持型ループろ波器19を介して位相検波器2
3の端子2とそれぞれ接続される。
Terminals 1 and 2 of the hybrid circuit 17
are terminals 2 of phase detectors 11 and 14, respectively, and
Terminal 3 is connected to phase detector 2 via terminal 32, voltage controlled oscillator 18, and peak holding loop filter 19.
3, respectively.

更にハイブリツド回路22の端子1及び3はそ
れぞれ位相変調器20及び21の端子3と、端子
2は位相検波器23を介して端子32と、端子3
1はリトリガ型単安定マルチバイブレータ回路2
4を介してアンド回路25及び26の別の端子と
接続される。
Furthermore, terminals 1 and 3 of the hybrid circuit 22 are connected to terminals 3 of phase modulators 20 and 21, respectively, and terminal 2 is connected to terminals 32 and 3 via a phase detector 23, respectively.
1 is a retrigger type monostable multivibrator circuit 2
4 to other terminals of AND circuits 25 and 26.

この様に接続された各ブロツクの動作は次の様
である。
The operation of each block connected in this way is as follows.

端子30に加えられた受信波は3つに分割さ
れ、第1の受信波は位相検波器11、低域ろ波器
12、電圧比較器13により、第2の受信波は位
相検波器14、低域ろ波15、電圧比較器16に
よりそれぞれ復調されてデイジタル信号が取り出
され、このデイジタル信号はアンド回路25と2
6に加えられる。
The received wave applied to the terminal 30 is divided into three parts, the first received wave is sent to the phase detector 11, the low-pass filter 12, and the voltage comparator 13, and the second received wave is sent to the phase detector 14, A digital signal is extracted by demodulation by a low-pass filter 15 and a voltage comparator 16, and this digital signal is passed through AND circuits 25 and 2.
Added to 6.

一方、第3の受信波は前記の低域ろ波器12及
び15の遅延時間と等しい遅延時間を持つ遅延回
路10を通つて位相変調器20及び21に加えら
れる。
On the other hand, the third received wave is applied to the phase modulators 20 and 21 through a delay circuit 10 having a delay time equal to that of the low-pass filters 12 and 15.

ここで、ユニークワード信号が検出されない時
は端子31にユニークワード検出信号が加えられ
ないので、リトリガ型単安定マルチバイブレータ
24及びアンド回路25及び26は動作せず、従
つて前記の復調されたデイジタル信号は逆変調用
の位相変調器20及び21に加えられない。そこ
で、遅延回路10を通つた第3の受信波は位相変
調器20,21とハイブリツド回路22を通つて
そのままPLL回路の位相検波器23に加えられ
る。
Here, when the unique word signal is not detected, the unique word detection signal is not applied to the terminal 31, so the retrigger type monostable multivibrator 24 and the AND circuits 25 and 26 do not operate, and therefore the demodulated digital No signal is applied to phase modulators 20 and 21 for inverse modulation. Therefore, the third received wave that has passed through the delay circuit 10 passes through the phase modulators 20 and 21 and the hybrid circuit 22, and is directly applied to the phase detector 23 of the PLL circuit.

一方、電圧制御発振器18の出力波も位相検波
器23に加えられ、ここで基準バースト中の無変
調波の部分CRと位相比較が行われる。この場合、
逆変調と云う非線型操作が行われていないので、
このPLL回路は第4図の点線に示す様に2つの
波の位相差360度の中に1個の安定点Fを持つ通
常の引込み動作をして再生された搬送波が端子3
2から取出される。
On the other hand, the output wave of the voltage controlled oscillator 18 is also applied to the phase detector 23, where the phase is compared with the unmodulated wave portion CR in the reference burst. in this case,
Since the nonlinear operation called inverse modulation is not performed,
This PLL circuit performs a normal pull-in operation with one stable point F within the 360-degree phase difference between the two waves, as shown by the dotted line in Figure 4, and the reproduced carrier wave is transferred to the terminal 3.
2.

一方、ビツトタイミング再生用パターンBTR
やユニークワード信号UWの部分はPSK変調され
ている為に、位相検波器23はPSK波と電圧制
御発振器18の出力波とを比較する事になるの
で、この位相検波器23の出力電圧は殆ど0にな
り電圧制御発振器18は自走を開始する。
On the other hand, the bit timing reproduction pattern BTR
Since the unique word signal UW part is PSK modulated, the phase detector 23 compares the PSK wave with the output wave of the voltage controlled oscillator 18, so the output voltage of the phase detector 23 is almost 0, and the voltage controlled oscillator 18 starts free running.

そこで、このPLL回路に含まれているループ
ろ波器19に電圧保持機能を持たせる事により、
前記の無変調波の部分CRとの位相比較に依つて
得られた出力電圧をビツトタイミング再生用パタ
ーンBTRの間だけ保持させると、電圧制御発振
器18の出力波の位相変化はユニークワード信号
に対して殆ど無視できる値にする事が出来る。
Therefore, by providing the loop filter 19 included in this PLL circuit with a voltage holding function,
If the output voltage obtained by phase comparison with the non-modulated wave portion CR is held only during the bit timing recovery pattern BTR, the phase change of the output wave of the voltage controlled oscillator 18 will be similar to the unique word signal. can be reduced to an almost negligible value.

次に、ユニークワード信号が検出された時は端
子31にユニークワード検出信号が加えられるの
で、前記の復調されたデイジタル信号はアンド回
路25及び26を通つて位相変調器20及び21
に加えられ、ここで遅延回路10を通つて加えら
れたPSK波を逆変調して無変調波とし、この無
変調波と位相検波器23で電圧制御発振器18の
出力波と位相比較する。この時にPLL回路は第
3図の実線に示した様に360度中に4個の安定点
E,F,G,H(4相PSK波の場合)を持つ従来
の動作を行う。
Next, when a unique word signal is detected, the unique word detection signal is applied to the terminal 31, so that the demodulated digital signal passes through the AND circuits 25 and 26 to the phase modulators 20 and 21.
The PSK wave applied through the delay circuit 10 is inversely modulated into a non-modulated wave, and the phase of this non-modulated wave is compared with the output wave of the voltage controlled oscillator 18 by a phase detector 23. At this time, the PLL circuit performs a conventional operation having four stable points E, F, G, and H (in the case of a four-phase PSK wave) within 360 degrees, as shown by the solid line in FIG.

第5図は第3図のPLL回路の部分を単一同調
回路27と電圧比較器28に置換えたもので、
PLL回路の様に追尾はしないが機能としては等
価になつている。
FIG. 5 shows the PLL circuit in FIG. 3 replaced with a single tuning circuit 27 and a voltage comparator 28.
Although it does not track like a PLL circuit, it is functionally equivalent.

尚、第3図と同じ記号は同じ部分を示す。 Note that the same symbols as in FIG. 3 indicate the same parts.

(f) 発明の効果 以上説明した様に本発明によれば、PSK−
TDMA衛星通信用受信局の復調信号に基準局か
ら送出された基準バーストのユニークワード信号
が検出されない初期捕捉状態に於ては、復調部の
搬送波再生回路を安定点が1個ある状態にしてお
き、ユニークワード信号が周期的に受信できる状
態になつた時には通常の搬送波再生を行う様に制
御する事によつて、受信波の信号対雑音比が悪く
且つ受信周波数変動の大きな場合にも安定に初期
捕捉をする事が可能になる。
(f) Effect of the invention As explained above, according to the present invention, PSK-
In the initial acquisition state in which the unique word signal of the reference burst sent from the reference station is not detected in the demodulated signal of the TDMA satellite communication receiving station, the carrier wave recovery circuit of the demodulator is set in a state where there is one stable point. By controlling the normal carrier wave regeneration when the unique word signal can be periodically received, stable initialization can be achieved even when the signal-to-noise ratio of the received wave is poor and the reception frequency fluctuates greatly. It becomes possible to capture.

尚、搬送波同期用パターンCRに一致したゲー
トパルスをTDMA制御部から送出して、PLL回
路の位相検波特性を1安定点型とn安定点型に切
替える提案がされているが、初期捕捉状態に於て
は前記のTDMA制御部からゲートパルスが得ら
れないので信号対雑音比の悪い伝送路に適用する
のは困難である。
There has been a proposal to switch the phase detection characteristics of the PLL circuit between the 1 stable point type and the n stable point type by sending out a gate pulse that matches the carrier synchronization pattern CR from the TDMA control unit, but it is not possible to switch the phase detection characteristics of the PLL circuit between the 1 stable point type and the n stable point type. In this case, since the gate pulse cannot be obtained from the TDMA control section, it is difficult to apply it to a transmission line with a poor signal-to-noise ratio.

一方、本発明はTDMA制御部からのゲートパ
ルスが無くても信号対雑音比の悪い伝送路に適用
する事ができ且つ前記のゲートパルスの方法を併
用する事が可能である。
On the other hand, the present invention can be applied to a transmission line with a poor signal-to-noise ratio even without a gate pulse from the TDMA control section, and can also be used in combination with the gate pulse method described above.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はTDMA方式の時間割当を説明する為
の図を、第2図は本発明を実施する為のPSK−
TDMA復調部の概略のブロツク接続図の一例を、
第3図は第2図の搬送波再生回路のより具体的な
ブロツク接続図を、第4図は第3図の動作を説明
する為の図を、第5図は別の一実施例をそれぞれ
示す。 図中、1は位相検波器を、2は搬送波再生回路
を、3はビツトタイミング再生回路を、4は瞬時
極性判定回路を、5はユニークワード検出回路を
それぞれ示す。
Figure 1 is a diagram for explaining time allocation in the TDMA system, and Figure 2 is a diagram for explaining the time allocation of the TDMA system.
An example of a schematic block connection diagram of the TDMA demodulator is shown below.
3 shows a more specific block connection diagram of the carrier wave recovery circuit shown in FIG. 2, FIG. 4 shows a diagram for explaining the operation of FIG. 3, and FIG. 5 shows another embodiment. . In the figure, 1 is a phase detector, 2 is a carrier recovery circuit, 3 is a bit timing recovery circuit, 4 is an instantaneous polarity determination circuit, and 5 is a unique word detection circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 PSK−TDMA通信方式に於て、受信局の復
調部に含まれる搬送波再生回路の動作状態を基準
局から送出されたユニークワード信号が該受信局
で検出されない初期捕捉状態の時は1つの引き込
み安定点を持つ様に、該ユニークワード信号が周
期的に検出できる状態の時は変調相数に等しい数
の引き込み安定点を持つ様に制御する事を特徴と
する初期捕捉方式。
1 In the PSK-TDMA communication system, when the operating state of the carrier regeneration circuit included in the demodulation section of the receiving station is in the initial acquisition state where the unique word signal sent from the reference station is not detected by the receiving station, one pull-in stable state is detected. When the unique word signal is in a state where it can be detected periodically, the initial acquisition method is characterized in that the unique word signal is controlled so as to have a number of stable pull-in points equal to the number of modulation phases.
JP20147983A 1983-10-27 1983-10-27 Initial acquisition system Granted JPS6093836A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20147983A JPS6093836A (en) 1983-10-27 1983-10-27 Initial acquisition system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20147983A JPS6093836A (en) 1983-10-27 1983-10-27 Initial acquisition system

Publications (2)

Publication Number Publication Date
JPS6093836A JPS6093836A (en) 1985-05-25
JPS6314534B2 true JPS6314534B2 (en) 1988-03-31

Family

ID=16441748

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20147983A Granted JPS6093836A (en) 1983-10-27 1983-10-27 Initial acquisition system

Country Status (1)

Country Link
JP (1) JPS6093836A (en)

Also Published As

Publication number Publication date
JPS6093836A (en) 1985-05-25

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