JPS63144679A - Hue control circuit - Google Patents

Abstract

PURPOSE:To excellently control hue in a TV receiver freely from the influence of variance of characteristic of a phase shifter circuit by making the characteristics of the shifter circuits in two stages to form a synthetic burst signal inverse to each other. CONSTITUTION:A carrier color signal from a TV receiver is supplied to the first CR phase shifter circuit 13; a chroma signal which is the differential between a non- delayed vector signal and a delayed vector signal is outputted from a second color saturation adjustment circuit 14; positive and negative burst signals which are delayed vector signals are outputted from a burst hue amplifier circuit 15. These two signals are added with each other to come to be the first synthetic burst signal, and this burst signal is supplied to a second CR phase shifter circuit 34, in this circuit 34, a second synthetic burst signal is formed in similar manner. In such case, the circuits 13 and 34 have the characteristics inverse to each other, and the signals from them are made the second synthetic burst signal which is not influenced by the variance in characteristic of the parts constituting the circuits 13 and 34, and said signal is supplied to a killer detection circuit 21. By changing a delayed vector signal by manipulating the volume of the circuit 13/34, the hue can be excellently controlled freely from the influence of said variation in the phase shifter circuits.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an improvement in a hue control circuit used in a color signal processing circuit system of a television receiver or the like.

(Prior Art) As is well known, the hue control methods employed in television receivers and the like include a method of varying the phase of a burst signal, and a method of varying the phase of a burst signal.
There are two types of methods for varying the phase of the color subcarrier (CW). Of these, the h method for varying the phase of the color subcarrier is:
There is a method that varies the phase of the color subcarrier during the burst period, and an h method that varies the phase of the color subcarrier during the chroma period.

Here, FIG. 6 shows a conventional hue control circuit of a type that varies the phase of a burst signal. That is,
The carrier color signal supplied to the input terminal 11 is amplified by the first color anti-amplifier circuit 12 and then sent to the first CR for hue control.
The signal is supplied to the phase shift circuit 13.

The output of this first CR phase shift circuit 13 is supplied to a second chromaticity amplification circuit 14 and also to a burst hue 2 adjustment circuit 15 .

The burst hue adjustment circuit 15 extracts a burst signal whose phase has not been controlled, and applies automatic color control to the burst signal.
ACC) circuit 16. This automatic color control circuit 1G
performs amplitude detection on the burst signal to generate a gain control voltage (ACC voltage) inversely proportional to the level of the carrier chrominance signal, and outputs the ACC voltage to the gain control terminal of the first chromaticity amplification circuit 12.

As a result, the manual burst signal level of the burst hue adjustment circuit 15 is kept constant.

Further, the chromaticity signal outputted from the second chromaticity amplification circuit 14 is supplied to the demodulation circuit 7, (R-Y), (
It is demodulated into each color signal of B-Y) and (G-Y). In this case, in the demodulation circuit 17, the (R-Y) demodulation carrier (R-YCW) output from the carrier generation circuit 18 is
) and (B-Y) demodulation carrier (B-YCW), and further (R-Y) and (B-Y
) are matrixed to obtain a (G-Y) signal.

Here, the carrier phase of the carrier generation circuit 18 is:
A loop formed by an automatic phase control (APC) circuit 19, a voltage controlled oscillation circuit (VCO) 20, and the like is controlled so that tU is synchronized with the burst signal.

That is, the APC circuit 19 has burst hue: J3.
Phase detection is performed between the phase-controlled burst signal output from the adjustment circuit 15 and the oscillation signal output from the VCO 20, and the phase of the oscillation signal of the VCO 20 is synchronized with the burst signal based on the phase error. It is something that is working. Further, the carrier generation circuit 18 is connected to the VCO
20 outputs are used to generate various carriers by phase synthesis.

Further, the burst signal output from the burst hue adjustment circuit 15 is supplied to a killer detection circuit 21. This killer detection circuit 21 performs multiplicative detection of the carrier output from the carrier generation circuit 18 and the burst signal, and when the burst signal level becomes below a certain level, the gain of the second chromaticity amplification circuit 14 is adjusted. It performs the function of controlling and stopping the output of the chromaticity signal.

Note that the burst hue adjustment circuit 15. APC circuit 19
In the killer detection circuit 21 and the killer detection circuit 21, a gate pulse is required in order to obtain an operation timed to the burst signal.
It is output from. This pulse shaping circuit 22 generates the gate pulse G by, for example, delaying the water synchronization signal.

Here, FIG. 7 shows a specific circuit configuration of the 1-2 first CR phase shift circuit 13 and the burst hue adjustment circuit 15. That is, the chromaticity signal output from the signal source 23 becomes a non-delayed signal a1 and a delayed signal bt by the resistor R1 and capacitor CI that constitute the first CR phase shift circuit 13. In this case, a phase difference of, for example, 45° is set between the two signals (1) and (b1).

Of these, the non-delayed signal a1 is supplied to the base of the transistor Ql. This transistor Q1 constitutes a differential amplifier together with the transistor Q2, and the base of the transistor Q2 is connected to the input terminal 24 to which the gate pulse G is applied with the opposite polarity.

Here, both transistors Q1. The collectors of Q2 are connected together, and the connection point is connected to the DC voltage v through the resistor RLI.
It is connected to the power supply terminal 25 to which ec is applied. Further, the emitters of both transistors Ql and Q2 are connected together, and the connection point thereof is connected to the collector of a transistor Q5 forming a constant current source via a resistor REI.

Furthermore, the differential amplifier based on transistors Ql and Q2 is
Transistor Q3. It is connected in parallel with the differential amplifier constituted by Q4. That is, the base of transistor Q3 is connected to the base of transistor Q2.

Further, the emitters of transistor Q3.04 are connected together, and the connection point is connected to the above-mentioned transistor through resistor RE2. 5 collector.

Here, the base of the upper transistor Q4 (to which the delayed signal b+ is supplied), and the base of the transistor Q3.
The collectors of Q4 are connected together, and the connection point is a resistor R.
It is connected to the power supply terminal 25 via L2, as well as to the collectors of transistors Qll and Q13, which will be described later, and to the burst output terminal 2B.

Then, the transistors Q1 to Q4, the resistors REI, R
A circuit similar to the circuit using transistors Q6 to Q9 and resistors RE3. It is composed of RE4 and transistor QIO. However, the delay signal b1 is supplied to the base of the transistor QB, and the base of the transistor Q7. A gate pulse G is supplied to the base of the transistor Q8, and a DC bias Bl from a constant voltage source 27 is supplied to the base of the transistor Q9.

Now, the above transistors (Ql, Q2), (Q3°Q4)
, (Q6.Q7), (Q8.Q9), each output of the four differential amplifiers consists of a non-delayed signal ■1 and a delayed signal (g
If the number b1 is used as a vector as it is, it will become as shown in FIG. That is, the signal (ra1--1) is generated at the output section 28 of the differential amplifier composed of the transistors Ql and Q2 during the gate pulse G period.

In short, during the gate pulse G period, the transistor Ql,
Q4 is turned on, and transistors Q2. Q3 is in the off state. Therefore, the delayed signal b+ is transmitted between the base and emitter of the transistor Q4 and the resistor RE2. REI,
A non-delayed signal a appears in positive phase at the collector of the transistor Ql via the path of the emitter of the transistor Q1.
1 appears in the opposite phase at the collector of the transistor Ql, so that the signal (bL -at
) will now occur. And this signal (+)l
-■1) is supplied to the ACC circuit 1B via the output terminal 29.

On the other hand, transistor Q3. At the output section 30 of the differential amplifier Q4, a signal (1-bl) whose phase is opposite to that described above is generated during the gate pulse G period.

Further, since only the delayed signal 1 acts on the transistors Q6 to Q9, the transistor QB.

A signal (-I;
1) is generated and transistor Q8. A signal b1 is generated at the output 32 of the differential amplifier Q9.

Here, the output section 31 is a transistor Qll.

The output section 32 is connected to the common emitter connection point of transistors Q13 . It is connected to the emitter common connection point of Q14. Among these, transistor QIL,
Both collectors of Q13 are connected to the burst output terminal 26.
connected to transistor Q12. The collectors of Q14 are both connected to the power supply terminal 25.

The base of the transistor Qll is connected to the power supply terminal 3.
The DC bias B2 applied to the circuit 3 is applied via the resistor RBI. Also, transistor QI2. Q1
At the base of 3, there is a two-leg DC bias B2 and a resistor RB2.
is applied via. Furthermore, the transistor Qll
, Q14, an adjustment voltage from a hue adjustment volume VR is applied via a resistor RB3.

Therefore, the amplifier configured by the transistors Qll-QI4 can adjust the combination ratio of the signal bl and the signal (-bl) with respect to the signal (1-bl).

Here, since the signal is obtained between the signals obtained at the burst output terminal 26, it is a burst signal, and this burst signal is supplied to the APC circuit 19 and the killer detection circuit 21. Here, considering that the combination ratio of ±bl has changed, this means that the phase color of the combination vector has been changed. That is, since the reference phase in the APC circuit 19 is varied, this corresponds to controlling the hue.

FIG. 8 shows each carrier (R-YCW), (B-YCW), demodulated component (
(RY), (B-Y), each axis of the burst signal is shown. The figure shows (a) when the hue adjustment is at the center, (b) when the hue is at the maximum, and (C) when the hue is at the minimum.

However, in the conventional hue control circuit as described in
When implemented as an integrated circuit (IC), the first CRR phase circuit 13
A problem arises in that the hue variable range also varies due to variations in the element values. That is, FIG. 9(a)
indicates a case where there is no variation in CR, and in this case, signal ■1.

The phase difference of bt is 45°, and the variable range from the maximum to the minimum hue is 90° in phase.

However, the variation in CR is usually +2 when converted to IC.
0% occurs. FIG. 9(b) shows the case where the CR variation is +20%, and FIG. 9(C) shows the case where the CR variation is 120%. In other words, in the case of +20% variation, the variable range of hue is 69.8 in terms of vector phase.
', in the case of -20% variation, the variable range of hue is 114.8° in vector phase.

(Problems to be Solved by the Invention) As described above, in the conventional hue control circuit, when integrated into an IC, the hue variable range also varies due to variations in the element values of the CRR phase circuit. ing.

Therefore, this invention was made in consideration of the above circumstances, and an object of the present invention is to provide an extremely good hue control circuit that can prevent the hue variable range from being affected even if variations due to CR occur. do.

[Configuration of the Invention (Means for Solving Problems) That is, the hue control circuit according to the present invention phase-shifts the chromaticity signal by a first series circuit consisting of a resistor and a capacitor to generate a non-delayed signal a1. Generate a delayed signal signal. Then, the composite signal (at - bl) ± bl is phase-shifted by a second series circuit consisting of a capacitor and a resistor connected in a different order from the first series circuit to generate a non-leading signal a2 and a leading signal. It is designed to generate . In addition,
It is possible to change the recorded value ±bt or ±b2 by 61 depending on the hue adjustment voltage.

(Function) And 1.1: According to the configuration as described above, changes in the hue variable range due to variations in the element values of the resistors and capacitors that make up the first series circuit, and the resistance that makes up the second series circuit. and changes in the hue variable range due to variations in capacitor element values can cancel each other in opposite directions, and C
Even if variations due to R occur, it can be prevented from affecting the hue variable range.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. In FIG. 1, the same parts as in FIG. 6 are indicated by the same symbols, and only the different parts will be described here. That is, the output of the second chromaticity amplification circuit 14 and the output of the burst hue adjustment circuit 5 are added on the time axis,
The added output is supplied to a second CRR phase circuit 34 having a phase shift characteristic opposite to that of the first CRR phase circuit 13. Then, the output of the second CRR phase circuit 34 is supplied to the third chromaticity amplification circuit 35 and the burst hue adjustment circuit 36, and the outputs thereof are supplied to the demodulation circuit +7. The difference from the conventional method is that the signal is guided to the APC circuit 19 and the killer detection circuit 21.

In this case, the burst hue adjustment circuit +5.3
[i] The phase of the burst signal is varied by the hue adjustment volume VRI, and the third chromaticity amplification circuit 35
In this case, color control is performed by a color control volume VR2, and the phases of the burst signal and the chroma signal are made to be in phase at the center of the hue adjustment volume VRI.

Here, FIG. 2 shows the first CR phase shift circuit 13 and the second
Chromaticity amplification circuit 14. Burst hue adjustment circuit 15° 2nd
CRR phase circuit 34. This figure shows a specific circuit configuration of the third chromaticity amplification circuit 35 and the burst hue adjustment circuit 36, and the same parts as in FIG. 7 are shown with the same symbols.

That is, the constant ACC-controlled chromaticity signal output from the signal source 23 is combined with the non-delayed signal 1 by the resistor R1 and capacitor CI constituting the first CR phase shift circuit 13. is generated, and the transistor Ql
-Q14 and resistors RLI, RL2. REI～RE4
, R.B.I.

The signal is supplied to a burst hue adjustment circuit 15 consisting of RB2, R11, and R12.

In this case, a circuit consisting of transistors Ql to Q4 generates a burst signal (1-bl) serving as a phase reference and a burst signal (bl-bl) having an opposite phase and supplied to the ACC circuit 1B via the output terminal 29. Transistor Q6~Q
A burst signal (±bt) is generated by the circuit consisting of 9.

And the above burst signal (■1-bl).

A burst signal (±bl) is generated by a double-balanced differential amplifier for hue control made up of transistors QIL-Q14, and becomes the output of the burst hue adjustment circuit 15.

Transistors Q15 to Q2G and resistors RE5 and RE8
.

The signal is supplied to a second chromaticity amplification circuit 14 made up of RI3, and a chroma signal (■1-bl) is generated, which is subjected to the above-mentioned bar, thereby preventing deviation of the tint. .

In this way, when the chroma signal (at-bl) is combined, the non-advanced signal a2 and the non-advanced signal a2 For example, an advance signal b2 which is advanced by 67.3" is generated, and the transistor Q2+-
Q34 and resistor RL3°RE7~REIO,RB3,
The signal is supplied to a burst hue adjustment circuit 36 consisting of RB4, R14, and R15.

In this case, a burst signal (a2-b2) serving as a phase reference and a burst signal (a2-a2) having an opposite phase thereof are generated by a circuit including transistors Q21-Q24. Further, the advance signal et al. 2 is the transistor 02
The burst signal (±b
2).

and “bipedal burst signal (a2-b2).

A burst signal (±b2) is generated by a double-balanced differential amplifier for hue control made up of transistors Q31 to Q34, and becomes the output of the burst hue adjustment circuit 36.

Transistors Q35 to Q39 and resistors REII, R
The signal is supplied to a third chromaticity amplification circuit 35 consisting of E12°RlG, and a chroma signal (a2-b2) is generated. This is 0? The signal (a2-b2) is applied to the transistor Q40゜Q4゛1 and the resistor RB5. Variable circuit 38 consisting of RB6
After being controlled by 1-th burst signal f (a2-b2
)±b2+ and time axis synthesis, the hue (
Tlnt) is prevented from shifting.

In this way, the chroma signal (a2-±b2) is output from the burst output terminal 2B as a burst signal.

Here, if there is no variation in the CR element values of the first CR phase shift circuit 3, the difference shown in FIG. 3(a) is 87.6.
', and the maximum to minimum variable range of hue is 44 in phase.
．． It becomes 8°. FIG. 3(b) shows the case where the CR variation is +2096, and FIG. 3(c) shows the case where the CR variation is 120%. In other words, +20%
In the case of variation, the variable range of hue is 32 in vector phase.
', in the case of -20% variation, the variable range of hue is 65.6 degrees in vector phase.

Further, if there is no variation in the CR element value of the second CR phase shift circuit 34, the value is 67.3@ as shown in FIG. 4(a).
The maximum to minimum variable range of hue is 45.
It becomes 4°. FIG. 4(b) shows the case where the CR variation is +20%, and FIG. 4(c) shows the case where the CR variation is 120%.

In other words, when the variation is +20%, the variable range of hue is 62.2° in vector phase, and when the variation is -20%,
The range of 61 variations in hue is 30'' in vector phase.

Therefore, even if there are variations in the element values of the CRs forming the first CR phase shift circuit 13, they can be offset by variations in the element values of the CRs forming the second CR phase shift circuit 34. That is, as shown in FIG. 5, if there is no variation in the CR element values of the first and second OCR phase shift circuits 13.34, the hue variable range is 90.2', which is +20%.
If there is a variation of -20%, the hue variable range will be 94.2°, and if there is a -20% variation, the hue variable range will be 95.
6', so that the hue variable range can be prevented from being adversely affected.

It should be noted that the present invention is not limited to the above-mentioned embodiments, and can be implemented with various modifications without departing from the gist thereof.

[Effects of the Invention] Therefore, as described in detail above, the present invention provides an extremely good hue control circuit that can prevent variations in hue from affecting the hue variable range even if variations occur due to resistors and capacitors. be able to.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing an embodiment of the hue control circuit according to the present invention, FIG. 2 is a circuit configuration diagram specifically showing the main parts of the same embodiment, and FIGS. 3 to 5 are the same. Signal vector diagrams, FIGS. 5 and 7, for explaining the operation of the embodiment
The figures are a block configuration diagram showing a conventional hue control circuit and a circuit configuration diagram specifically showing a part thereof, and FIGS. 8 and 9 are signal vectors for explaining the operation of the conventional hue control circuit, respectively. It is a diagram. 11... Input terminal, 12... First chromaticity amplification circuit,
13... First CR phase shift circuit, 14... Second chromaticity amplification circuit, 15... Burst hue adjustment circuit, 16...
・Automatic color control circuit, 17... Demodulation circuit, 18... Carrier generation circuit, 19... Automatic phase control circuit, 20.
...Voltage controlled oscillation circuit, 21... Killer detection circuit, 2
2... Pulse shaping circuit, 23... Signal source, 24...
・Input terminal, 25... Power supply terminal, 2B... Burst output terminal, 27... Constant voltage source, 2B... Output section, 2
9... Output terminal, 30-32... Output section, 33...
- Power supply terminal, 34... Second CR phase shift circuit, 35...
- Third chromaticity amplification circuit, 36... Burst hue adjustment circuit, 37... Buffer circuit, 38... Variable circuit. Applicant’s agent Patent attorney Takehiko Suzue Center +20”/a
-209° variable range 44.8°
Variable range 32° Variable range 65
．． 6゜(a)(b)
(c) q==6ρF h318 kn Fig. 3 Center ÷20°to
-20°l・Variable range 45.4'
Variable range 62.2° Variable range 30' (a) (b)
(c) 2-6pF Fig. 4 R2 = 3.1kfl Hue variable range 90.2° variation +2 @ Hue variable range 94.2° variation -2ge λ Center Maximum variable
Minimum variable Fig. 5 Hue center center variable node g! 1110″ (a) Maximum hue Minimum hue (b) (c) Fig. 8 (b) (C) Fig. 9

Claims (1)

[Claims] A first phase shift circuit that shifts the phase of a chromaticity signal using a series circuit of a resistor and a capacitor to generate a non-delayed signal ■1 and a delayed signal ■1, and a non-delayed signal output from this first phase shift circuit. Combining signal ■1 and delayed signal ■1, (■1 - ■1) ±■1
a first combining circuit that generates a combined signal, and a combined signal (■1 - ■1) ±■1 output from this first combining circuit;
is phase-shifted by a series circuit of a capacitor and a resistor connected in a different order from that of the first phase-shifting circuit to generate a non-leading signal ■2
and a second phase shift circuit that generates a leading signal ■2, and a non-leading signal ■2 and a leading signal ■2 outputted from this second phase shifting circuit (■2-■2). a second synthesis circuit that generates a composite signal of ±■2, and a hue adjustment voltage of ±■1 or ± for the output of the first or second synthesis circuit;
(2) A hue control circuit characterized by comprising: a hue adjustment means capable of varying the hue of 2;