JPS6314189U - - Google Patents
Info
- Publication number
- JPS6314189U JPS6314189U JP10755386U JP10755386U JPS6314189U JP S6314189 U JPS6314189 U JP S6314189U JP 10755386 U JP10755386 U JP 10755386U JP 10755386 U JP10755386 U JP 10755386U JP S6314189 U JPS6314189 U JP S6314189U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- time
- frequency divider
- detection output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Electric Clocks (AREA)
- Electromechanical Clocks (AREA)
Description
第1図は本考案の一実施例に係るアラーム付時
計の回路図。第2図は、第1図におけるアラーム
付時計の外観図。
6……時計回路、20……ラツチ回路、22…
…鳴り止めスイツチ、38……カウンタ回路。
FIG. 1 is a circuit diagram of an alarm clock according to an embodiment of the present invention. FIG. 2 is an external view of the alarm clock in FIG. 1. 6... Clock circuit, 20... Latch circuit, 22...
...Sound stop switch, 38...Counter circuit.
Claims (1)
の基準信号を分周する分周回路と、前記分周回路
からの信号により時刻を表示する時計回路と、前
記時計回路にて表示された時刻が設定時刻になつ
たことを検出する目安回路と、前記目安回路の検
出出力を保持するラツチ回路と、前記ラツチ回路
にて保持された検出出力により報知音を発生する
発音回路と、前記ラツチ回路にて検出出力が保持
されたときから前記分周回路からの信号のカウン
トを開始し、一定時間後に前記ラツチ回路の保持
を解除する解除信号を出力するカウンタ回路と、
を有するアラーム付時計において、前記カウンタ
回路のカウント出力を表示信号に変換するデコー
ダ・ドライバと、前記デコーダ・ドライバからの
表示信号により表示を行う表示部と、を有するこ
とを特徴とするアラーム付時計。 an oscillator that generates a reference signal; a frequency divider circuit that divides the frequency of the reference signal from the oscillator; a clock circuit that displays time based on the signal from the frequency divider circuit; and the time displayed by the clock circuit is set. a reference circuit for detecting that the time has come; a latch circuit for holding the detection output of the reference circuit; a sound generation circuit for generating a notification sound based on the detection output held by the latch circuit; a counter circuit that starts counting signals from the frequency divider circuit when the detection output is held, and outputs a release signal that releases the holding of the latch circuit after a certain period of time;
An alarm watch comprising: a decoder/driver that converts the count output of the counter circuit into a display signal; and a display section that displays a display signal based on the display signal from the decoder/driver. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10755386U JPS6314189U (en) | 1986-07-14 | 1986-07-14 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10755386U JPS6314189U (en) | 1986-07-14 | 1986-07-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6314189U true JPS6314189U (en) | 1988-01-29 |
Family
ID=30983939
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10755386U Pending JPS6314189U (en) | 1986-07-14 | 1986-07-14 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6314189U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4840475A (en) * | 1971-09-21 | 1973-06-14 | ||
JPS59184878A (en) * | 1983-04-04 | 1984-10-20 | Rhythm Watch Co Ltd | 24 hour alarm timepiece |
-
1986
- 1986-07-14 JP JP10755386U patent/JPS6314189U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4840475A (en) * | 1971-09-21 | 1973-06-14 | ||
JPS59184878A (en) * | 1983-04-04 | 1984-10-20 | Rhythm Watch Co Ltd | 24 hour alarm timepiece |