JPS63138603U - - Google Patents
Info
- Publication number
- JPS63138603U JPS63138603U JP2938787U JP2938787U JPS63138603U JP S63138603 U JPS63138603 U JP S63138603U JP 2938787 U JP2938787 U JP 2938787U JP 2938787 U JP2938787 U JP 2938787U JP S63138603 U JPS63138603 U JP S63138603U
- Authority
- JP
- Japan
- Prior art keywords
- tape deck
- control transistor
- playback
- amplifier
- recording
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000926 separation method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Description
図は本考案テープレコーダーの録音制御回路の
概略回路構成図である。
３……第１テープデツキの再生アンプ、４……
第２テープデツキの録音アンプ、８……マイクジ
ヤツク、９……マイクアンプ、１０……第１制御
トランジスタ、１１……モータ、１３……モータ
スイツチ、１８……第２制御トランジスタ、１９
……再生応答スイツチ、２１……制御スイツチ。
The figure is a schematic circuit diagram of the recording control circuit of the tape recorder of the present invention. 3... Playback amplifier of the first tape deck, 4...
Recording amplifier of second tape deck, 8...Microphone jack, 9...Microphone amplifier, 10...First control transistor, 11...Motor, 13...Motor switch, 18...Second control transistor, 19
...Reproduction response switch, 21...Control switch.
Claims (1)
と、少なくとも録音機能を有する第２テープデツ
キとを具備したテープレコーダーにおいて、前記
第１テープデツキ側の再生アンプの出力及びマイ
クジヤツクに接続されたマイクアンプの出力とを
前記第２テープデツキ側の録音アンプに入力する
ように接続し、導通時に前記再生アンプの出力を
ミユーテイングする第１制御トランジスタと、導
通時に前記第２テープデツキの録音操作によるも
モータを停止状態に設定する第２制御トランジス
タと、前記モータが第２制御トランジスタによつ
て停止している時前記第１テープデツキの再生操
作によりモータを回転させる再生応答スイツチと
、前記マイクジヤツクに対するマイクプラグの接
続に応答して前記第１制御トランジスタを導通状
態に設定し且つマイクプラグの離間に応答して前
記第２制御トランジスタを導通状態に設定する制
御スイツチとを設けたことを特徴とするテープレ
コーダーの録音制御回路。 In a tape recorder equipped with a first tape deck having at least a playback function and a second tape deck having at least a recording function, an output of a playback amplifier on the first tape deck side and an output of a microphone amplifier connected to a microphone jack are connected to the first tape deck. a first control transistor connected to be input to the recording amplifier on the second tape deck side and muting the output of the playback amplifier when conductive; and a second control transistor that sets the motor to a stopped state even if the recording operation of the second tape deck is conducted when conductive. a control transistor; a playback response switch that rotates the motor in response to a playback operation of the first tape deck when the motor is stopped by a second control transistor; 1. A recording control circuit for a tape recorder, comprising: a control switch that sets a control transistor in a conductive state and sets the second control transistor in a conductive state in response to separation of a microphone plug.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2938787U JPH0535443Y2 (en) | 1987-02-27 | 1987-02-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2938787U JPH0535443Y2 (en) | 1987-02-27 | 1987-02-27 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63138603U true JPS63138603U (en) | 1988-09-13 |
| JPH0535443Y2 JPH0535443Y2 (en) | 1993-09-08 |
Family
ID=30833225
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2938787U Expired - Lifetime JPH0535443Y2 (en) | 1987-02-27 | 1987-02-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0535443Y2 (en) |
-
1987
- 1987-02-27 JP JP2938787U patent/JPH0535443Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0535443Y2 (en) | 1993-09-08 |
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