JPS63136434U - - Google Patents
Info
- Publication number
- JPS63136434U JPS63136434U JP1987027281U JP2728187U JPS63136434U JP S63136434 U JPS63136434 U JP S63136434U JP 1987027281 U JP1987027281 U JP 1987027281U JP 2728187 U JP2728187 U JP 2728187U JP S63136434 U JPS63136434 U JP S63136434U
- Authority
- JP
- Japan
- Prior art keywords
- synchronization
- output
- sequence code
- received
- correlation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims 1
- 238000001228 spectrum Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Description
第１図は、本考案の一実施例である同期制御回
路を含む受信機同期回路のブロツク図、第２図は
本考案においてサーチ状態にいたるまでの状況を
説明するための波形図、第３図は従来例の問題点
を説明するための図である。
１……Ｍ系列符号発生部、２……同期部、２ａ
，２ｂ，２ｃ……第１、第２、第３相関器、３…
…同期制御部、４……クロツク発生部、３ｂ……
コンパレータ（判定設定値レベルＳＨに対するコ
ンパレータ）、３ｃ，３ｄ……コンパレータ（第
２相関器出力と第１相関器および第３相関器それ
ぞれの出力に対するコンパレータ）、３ｅ……論
理演算部、３１，３２……フリツプフロツプ、３
３，３４……ゲート回路。
FIG. 1 is a block diagram of a receiver synchronization circuit including a synchronization control circuit which is an embodiment of the present invention, FIG. 2 is a waveform diagram for explaining the situation up to a search state in the present invention, and FIG. The figure is a diagram for explaining the problems of the conventional example. 1...M sequence code generation section, 2...Synchronization section, 2a
, 2b, 2c...first, second, third correlators, 3...
...Synchronization control section, 4...Clock generation section, 3b...
Comparator (comparator for judgment set value level SH), 3c, 3d... Comparator (comparator for the output of the second correlator and the output of each of the first correlator and the third correlator), 3e... logic operation section, 31, 32 ...flipflop, 3
3, 34...gate circuit.
Claims (1)
器の出力位相を順次ずらして、受信データの取出
しを行なう受信Ｍ系列符号を含む３個のＭ系列符
号を発生し、受信信号とそれぞれ相関をとり、受
信Ｍ系列符号の相関出力の絶対値レベルおよび受
信Ｍ系列符号の相関出力と他のＭ系列符号の相関
出力とのレベルの大小関係から、同期用Ｍ系列符
号発生器の発生位相の調整をなし、サーチ・同期
捕捉を行なう方式において、 前記３個の相関出力を入力しサーチ・同期捕捉
制御信号を発生する同期制御部が、受信Ｍ系列符
号の相関出力をあらかじめ定めた判定設定レベル
を２回超えたときに同期判定出力を出力する手段
を有し、同期判定出力が出力されないときにサー
チ信号を発生し、同期判定出力が出力されたとき
に、受信Ｍ系列符号の相関出力と、他のＭ系列符
号の相関出力とのレベルの大小関係から同期捕捉
信号を発生するものであることを特徴とするスペ
クトラム拡散電力線搬送方式の同期制御回路。[Claims for Utility Model Registration] As a receiver synchronization circuit, three M-sequence codes including a received M-sequence code for extracting received data are generated by sequentially shifting the output phase of a synchronization M-sequence code generator. , and the received signals, and from the absolute value level of the correlation output of the received M-sequence code and the level relationship between the correlation output of the received M-sequence code and the correlation output of other M-sequence codes, the M-sequence code for synchronization is determined. In a method in which the generation phase of the generator is adjusted and search and synchronization acquisition is performed, a synchronization control section that inputs the three correlation outputs and generates a search and synchronization acquisition control signal outputs the correlation output of the received M-sequence code. It has a means for outputting a synchronization determination output when a predetermined determination setting level is exceeded twice, generates a search signal when the synchronization determination output is not output, and generates a search signal when the synchronization determination output is output. 1. A synchronization control circuit for a spread spectrum power line carrier system, characterized in that a synchronization control circuit generates a synchronization acquisition signal based on a level relationship between a correlation output of a sequence code and a correlation output of another M-sequence code.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987027281U JPS63136434U (en) | 1987-02-27 | 1987-02-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987027281U JPS63136434U (en) | 1987-02-27 | 1987-02-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63136434U true JPS63136434U (en) | 1988-09-07 |
Family
ID=30829159
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987027281U Pending JPS63136434U (en) | 1987-02-27 | 1987-02-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63136434U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02246539A (en) * | 1989-03-20 | 1990-10-02 | Nec Home Electron Ltd | Methods and devices for csk communication, csk transmission, and csk reception |
| JPH03248651A (en) * | 1990-02-27 | 1991-11-06 | Nec Corp | Signal detector of signal synchronizing system |
-
1987
- 1987-02-27 JP JP1987027281U patent/JPS63136434U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02246539A (en) * | 1989-03-20 | 1990-10-02 | Nec Home Electron Ltd | Methods and devices for csk communication, csk transmission, and csk reception |
| JPH03248651A (en) * | 1990-02-27 | 1991-11-06 | Nec Corp | Signal detector of signal synchronizing system |
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