JPS6313619B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention aims to provide an SN ratio improvement circuit that can effectively improve the auditory SN ratio against various types of interference noise, particularly against same-channel interference caused by shallowly modulated interference signals. It is something to do.

Conventionally, the electric field strength of the received signal is detected, and depending on the electric field strength, stereo MPX (multiplex)
Adjust the degree of separation of the circuit or the stereo MPX
There is a known method of improving the SN ratio by attenuating high-frequency components obtained at the input or output side of a circuit. This method is effective when the electric field strength is reduced, but it is completely ineffective against multipath interference, adjacent channel interference, same channel interference, etc. that do not correspond to the electric field strength and occur depending on the reception conditions. It was hot.

Furthermore, there is also a conventionally known method of detecting high-frequency (for example, 75 KHz or higher) noise components in the output signal of an FM demodulation circuit, and adjusting the degree of stereo separation or attenuating the high-frequency components accordingly. Although this method is effective against multipath interference and adjacent channel interference, it is ineffective against same-channel interference caused by interference signals with shallow modulation and little frequency shift.

The present invention has been made in view of the above points, and will be described below based on embodiments with reference to the drawings.
FIG. 1 shows the spectrum of noise generated due to co-channel interference contained in the output signal of the FM demodulation circuit. The case in FIG. 1 shows the noise caused by same-channel interference when an interference signal having a frequency shift of about 40 KHz is mixed into an unmodulated desired signal. FIG. 2 shows an embodiment of the present invention, where 1 is an antenna, 2 is an FM front end, 3 is an IF (intermediate frequency) amplification circuit, 4 is an FM demodulation circuit, 5 is a stereo MPX circuit, and 6 is a stereo MPX circuit. A left signal amplification circuit, 7 a right signal amplification circuit, 8 a left speaker, and 9 a right speaker. Further, 10 is a phase comparator 11, a low-pass filter/DC amplifier 12, and a voltage controlled oscillator 1.
3. A PLL circuit that generates a subcarrier signal for the stereo MPX circuit 5, which is composed of a first frequency divider 14 and a second frequency divider 15; 16 is a phase comparator 11 of the FM demodulation circuit 4 and the PLL circuit 10 ; A bandpass filter 31 having a center frequency of 19 KHz is inserted between the two, and 31 is a pulse count detector, which is composed of a monostable multivibrator 29 to which the output signal of the second frequency divider 15 is applied, and an integrating circuit 30. 17 is a band amplifier that amplifies the output signal of the integrating circuit 30; 18 is a rectifier circuit that rectifies the output signal of the band amplifier 17; and 19 is a control signal that generates a DC control signal according to the output signal of the rectifier circuit 18. This is a generation circuit.

A signal received by the antenna 1 is converted into an IF signal by the front end 2, amplified by the IF amplifier circuit 3, and then demodulated by the FM demodulation circuit 4. Then, the FM demodulation output is output by the stereo MPX circuit 5.
38K obtained from the first frequency divider 14 of the PLL circuit 10
The left and right stereo signals are separated by the action of the Hz subcarrier signal, and the left stereo signal is amplified by the left signal amplification circuit 6, and the right stereo signal is amplified by the right signal amplification circuit 7, and then sent to the left and right speakers 8, respectively.
The output signal of the FM demodulation circuit 4 is applied to the first input terminal of the phase comparator 11 of the PLL circuit 10 via the bandpass filter 16. Further, a voltage controlled oscillator 1 is connected to the second input terminal of the phase comparator 11.
3 oscillation output (76KHz) to the first and second frequency divider 1
A frequency-divided signal of 19KHz obtained by dividing the frequency by 4 and 15 is applied. When the aforementioned input signals are applied to the first and second input terminals of the phase comparator 11, a signal corresponding to the phase difference is generated at the output of the phase comparator 11. The signal corresponding to this phase difference is amplified by the low-pass filter/DC amplifier 12 and then applied to the voltage controlled oscillator 13, and the output signal of the voltage controlled oscillator 13 becomes correctly 76KHz, and the first frequency divider 14 The output of the FM demodulation circuit 4 functions to be properly synchronized with the output signal of the FM demodulation circuit 4. At this time, if noise occurs in the output of the bandpass filter 16 along with the 19KHz stereo pilot signal, the 19KHz signal obtained at the output of the second frequency divider 15 will be
Since the input signal applied to the first input terminal of the phase comparator 11 via 6 is phase modulated by noise, it is alternately changed to a slightly different frequency centered around 19KHz when noise occurs. . When that signal is applied to the pulse count detector 31,
Second frequency divider 1 from monostable multivibrator 29
A square wave signal whose interval changes according to the difference from the normal frequency of 19KHz from 5 is oscillated (Fig. 5A).
The square wave signal is applied to an integrating circuit 30 and smoothed (FIG. 5b). The DC level obtained by smoothing the square wave signal varies up and down around the DC level obtained by smoothing the square wave signal at 19 KHz (Figure 5 C). That is, when the frequency of the signal obtained from the output of the second frequency divider 15 becomes higher than 19KHz, the interval between the square wave signals becomes shorter, and although the charging time remains the same, the discharging time becomes shorter and is smoothed by the integrating circuit 30. The obtained DC level increases, and conversely, when the frequency of the signal obtained from the output of the second frequency divider 15 becomes lower than 19KHz, the interval between square wave signals becomes longer, and as mentioned above, the charging time is the same, but the discharging time becomes longer. As the length increases, the DC level is lowered, and as a result, when same channel interference or adjacent channel interference occurs, a beat is generated at the output of the pulse count detector 31 due to the received signal and the interference signal. The amplitude of the beat signal is proportional to the interfering signal level when the received signal level is kept constant.

The beat signal is amplified by the band amplifier 17, but since the band amplifier 17 is designed to only pass signals in the frequency band from several tens of Hz to 1 to 2 KHz (Fig. 5 D), the 19 KHz pilot signal is Only the sufficiently attenuated beat signal is amplified and extracted. If the amplified beat signal is rectified by the rectifier circuit 8, a signal corresponding to the degree of interference will be obtained, and if this is amplified by the band amplifier 17 and then rectified by the rectifier circuit 18, a DC output corresponding to the noise will be generated. (5th
By applying the DC output to the control signal generation circuit 19, a control signal is generated at the output terminal 32 (FIG. E). This control signal is sent to the stereo MPX circuit 5.
By applying it to , it is possible to adjust the degree of stereo separation and the attenuation of high frequencies, and it is possible to improve the signal-to-noise ratio. Note that the output waveform diagrams of the respective parts when there is no noise are as shown in FIG. 6 A, B, C, D, and E, and the DC output is not generated.

The stereo separation adjustment circuit is, for example, as shown in FIG. The value of is changed by a drive circuit 23 that operates in response to a control signal from the control signal generation circuit 19. By using this stereo separation degree adjustment circuit, when the noise in the signal increases and the output of the rectifier circuit 18 becomes large, the stereo separation degree becomes worse and the signal becomes closer to monaural, improving the SN ratio. I can do it. At this time, since the degree of stereo separation corresponds to the output level of the rectifier circuit 18, the improvement of the SN ratio is performed in accordance with the amount of noise.

The high-frequency component attenuation circuit is, for example, as shown in FIG.
Insert low pass filters 26 and 27, and
The amount of attenuation of the high-frequency signals of the second low-pass filters 26 and 27 is changed by a drive circuit 28 that operates in response to a control signal from a control signal generation circuit 19. The amount of attenuation of the high frequency signal can be changed according to the output signal of the rectifier circuit 18, that is, according to the amount of noise in the signal, and the improvement of the SN ratio can be continuously achieved according to the amount of noise.

There are many types of noise mixed into a signal, such as noise corresponding to the electric field strength of the signal, noise caused by multi-bus, noise caused by adjacent channel interference, and noise caused by same channel interference. An SN ratio improvement circuit that improves the SN ratio is effective for all of these. In particular, the SN ratio improvement circuit according to the present invention can also deal with same-channel interference caused by a shallowly modulated interference signal (which generates noise as shown in Figure 1), which conventionally could not be dealt with at all. Since it has the great advantage of being able to demonstrate a great effect, it is suitable for areas where there are broadcasting stations of the same channel in geographical proximity.
It has great effects when used in FM stereo receivers.

[Brief explanation of the drawing]

Fig. 1 is a characteristic diagram showing noise due to same channel interference, Fig. 2 is a circuit block diagram showing an embodiment of the present invention, Figs. 3 and 4 are circuit diagrams showing a specific example thereof, and Fig. 5 A, B, C, D, H and FIG. 6 A, B, C, D, and H are waveform characteristic diagrams of each part. Explanation of main drawing numbers, 5...Stereo MPX circuit, 1
0... PLL circuit, 11... Phase comparator, 16... Bandpass filter, 17... Bandpass amplifier, 18... Rectifier circuit, 19... Control signal generation circuit, 31... Pulse count detector.

Claims (1)

[Claims] 1. An FM demodulation circuit that demodulates the FM signal, a stereo multiplex circuit that separates left and right stereo signals from the FM demodulated signal from the FM demodulation circuit,
It has a phase comparator, a voltage controlled oscillator, and a frequency divider, and the phase comparator compares the phases of the pilot signal from the FM demodulation circuit and the frequency-divided signal from the frequency divider, and controls the voltage controlled oscillator with its output. A PLL circuit that supplies an accurate pilot signal to the stereo multiplex circuit, a pulse count detector that detects a frequency difference between the frequency-divided signals of the PLL circuit, and control based on the frequency difference signal obtained by the pulse count detector. Consists of a control signal generation circuit that generates signals,
An SN ratio improvement circuit characterized in that the control signal gradually degrades the stereo separation of the output signal of the stereo multiplex circuit to bring it closer to monaural and improve the SN ratio.