JPS63134940A - Pattern inspection device - Google Patents

Abstract

PURPOSE:To prevent an erroneous detection caused by shortage of a resolution by providing a scanning mechanism for scanning mechanically a line sensor in the direction orthogonal to its electrical self-scanning direction, detecting a two-dimensional image by a one-dimensional sensor and detecting a pattern with high accuracy. CONSTITUTION:A CCD line sensor 77 is attached to a fixed base 76 and also fixed to a nut 74 of a ball screw 72, and moves on the image forming surface of a pattern due to a fact that the ball screw 72 is driven to control a position by a DC motor 71 and a rotary encoder 73. In that case, the fixed base 76 moves along a cross roller guide 75, and a vibration generated at the time of movement of the CCD line sensor 77 is reduced. A moving extent and a moving speed of the CCD line sensor 77 can be changed by a photoreceiving system control part 14a, and it can be set that the line sensor moves in 6sec through a distance of a 3,000 picture element portion expressed in terms of the number of photoelectric converting picture elements.

Description

[Detailed Description of the Invention] [Field of Application in Industry] The present invention relates to an automatic pattern inspection device for inspecting fine pattern defects on LSI chips, and particularly for patterns formed on substrates such as chips. The present invention relates to an automatic pattern defect inspection device suitable for inspecting reticles for semiconductor integrated circuit manufacturing for pattern defects and the presence of foreign substances.

[Prior Art] Patterns of semiconductor integrated circuits are becoming finer year by year, and the reduction projection exposure method has become popular as a method for forming patterns on a substrate. The circuit pattern original plate used for this reduction projection exposure is called a reticle, and a circuit pattern five or ten times the actual size is formed on its surface.

Generally, a plurality of chips with the same pattern are formed on the reticle, and the entire surface of the wafer is exposed repeatedly.

FIG. 2 is an external view of a reticle, showing an example in which chips 2a and 2b of the same pattern are formed on a glass substrate 1.

Further, FIG. 3 shows a state in which chips 2a and 2b are repeatedly exposed on a wafer 3 using the reticle 1.

As can be seen from the example in FIG. 3, if there is a defect in the pattern on the reticle 1, the defect will be transferred to the entire area of the wafer 3, resulting in a significant drop in yield.

In order to avoid such a situation, conventionally, a pattern on a wafer developed after reduction exposure is carefully inspected using a microscope. Alternatively, in recent years, devices have been developed that automatically inspect pattern defects on the reticle itself before it is attached to an exposure device, such as in Electronic Materials (September 1983 issue).
etc. are introduced.

[Problems to be solved by the invention]However, although the former method is the simplest method, it takes a long time to perform the inspection, and there are problems in that uniformity of defect recognition due to differences in inspectors and inspection timings is not guaranteed. . On the other hand, although the latter testing device has solved the problems of the former and can now obtain uniform test results in a relatively short time,
Defects and foreign objects that occur after the reticle is attached to the exposure device must be re-inspected using the former method, or the reticle must be inspected periodically, which may reduce inspection efficiency due to duplication of inspections. However, there are problems such as the troublesome task of attaching and detaching the reticle, and the risk of generating defects and foreign matter during detachment.

On the other hand, it has been proposed to compare chip patterns formed on wafers to detect abnormalities in any of these patterns, and to detect abnormalities in the reticle used to expose these chip patterns (for example, Solid
State Technology Japanese version 19
May 1984 issue, and S semiconductor
World June 1984 issue).

However, in the above proposed method, a conventional imaging system such as a television camera or an image sensor is used as the image detection unit for detecting the pattern to be detected, or a laser beam is used to pass the reflected light of the scanning element onto the wafer. However, these image detection methods do not have sufficient resolution, especially when detecting minute patterns such as those on LSI wafers, so this type of image detection unit has been adopted. The device has a disadvantage in that the reliability of defect detection is not necessarily sufficient.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems of the prior art and to provide a pattern inspection apparatus that can efficiently and reliably detect defects in an original plate such as a reticle while it is mounted on an exposure apparatus.

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a pattern detection system for a pattern inspection apparatus for inspecting fine pattern defects formed on a flat substrate such as an LSI wafer. The means includes a line sensor and a scanning mechanism that mechanically scans the line sensor in a direction perpendicular to the electrical self-scanning direction of the line sensor, and for a pattern signal output from the line sensor. The present invention is characterized in that it includes means for correcting the sensitivity unevenness of the line sensor and the illuminance unevenness of the light source for illuminating the detected image.

In addition, to give an example of application of the present invention, on a wafer on which a reticle pattern has been exposed and developed, a comparative inspection is performed for each partial area over the entire chip area while correcting pattern positional deviation between chips with different reticle fields. The present invention is characterized in that the entire reticle is inspected by a method that repeatedly detects which chip has a defect, and further, by storing the position of the detected defect and re-inspecting the same position in the adjacent reticle field, It is characterized by detecting repeat defects, that is, defects in the reticle.
The presence or absence of defects can be inspected.

[Operations and Effects] In the apparatus of the present invention having the above configuration, a two-dimensional image is detected by a one-dimensional sensor by mechanically scanning the line sensor perpendicular to its self-scanning direction. Therefore, 1
It is possible to realize high-definition pattern detection in which the constituent pixels of the screen are, for example, 2000×3000, that is, 6 million pixels. This makes it possible to prevent erroneous detection caused by insufficient resolution when detecting defects by comparing two patterns.

Therefore, for example, by mixing a sample wafer for inspection into the reduction exposure process and inspecting it, it is possible to reevaluate the reticle, making it possible to realize real-time reticle inspection on mass production lines, and to manufacture products such as integrated circuits. Significant effects can be obtained in improving reliability, reducing inspection costs, and ultimately reducing costs. That is, according to the present invention, defects in patterns on a substrate can be detected with high reliability, and by using this detection result, defects can be detected efficiently and with high reliability while the original is mounted on an exposure device. can do.

[Example] Hereinafter, an example of the present invention will be described based on the attached drawings. FIG. 1 is a schematic diagram of a pattern inspection apparatus according to an embodiment of the present invention. In the figure, 3 is a semiconductor wafer (see Figure 3) on which a pattern to be inspected has been exposed and developed;
Reference numeral 11 denotes a mounting section 12a for the wafer 3 that is movable in each of the x, y, z, and θ directions.

12b is an imaging optical system for forming an image of the pattern on the wafer 3, and 13a and 13b are optical systems 12a, respectively.

a light receiving system that converts the image obtained by 12b into an electrical signal;
14a and 14b are light reception control units that control the light reception systems 13a and 13b; 15a and 15b are camera control units that correct and A/D convert the image signals obtained from the light reception systems 13a and 13b; and 16a and 16b are camera control units. a memory unit that temporarily stores the image signals A/D converted by the camera control units 15a and 15b; a calculation unit 17 that compares and calculates the image signals obtained from the camera control units 15a and 15b to detect defects;
18 is a memory unit 16a.

an image alignment unit 19 that calculates the binarization level of each image using a part of the image signal stored in the image signal 16b and calculates the amount of deviation between the two images based on the binarized image signal; Memory units 16a, 16b
20 is a monitor unit that displays the image signal processed by the image display control section.

In the above configuration, as shown in FIG. 4, the test wafer 3 is transferred from the loader/unloader 39 via the pre-alignment unit 40 to a movable mounting table in the Z direction and the θ direction so that the orientation flat part is always in a constant direction. 37 by suction on the back side. This mounting table 37 is placed on the X-direction moving table 35, and roughly the X-direction moving table 35 is placed on the Y-direction moving table 3.
6, respectively known DC motor and tachometer 3
1a, 31b, ball screws 33a, 33b, cross roller guide 34a.

34b and rotary encoders 32a and 32b, the wafer to be tested 3 is servo-controlled with an accuracy of ±4 μm.
8, it can be moved in any direction with high precision.

After the wafer 3 to be tested is placed on the mounting table 37 with high accuracy, the pattern on the wafer 3 to be tested is formed by a pair of left and right imaging optical systems 12a and 12b as shown in FIG. It is photoelectrically converted by 13a and 13b. The optical systems 12a and 12b include objective lenses 42a and 42, respectively.
b and epi-illumination devices 43a and 43b, and has a structure that captures an image by vertically reflected light. Furthermore, one of the pair of pattern detection optical systems 4a and 4b formed by integrating the imaging optical system and the light receiving system, one of which is the pattern detection optical system 4a, can be moved as a whole in the X, Y, and Z directions. It is possible.

6 and 7 are schematic diagrams of this moving mechanism. 6th
In the figure, the pattern detection optical system 4a is fixed to the nut of a known ball screw 44, and can be moved in the X direction by driving a DC motor 45. A fixed first gear 461 and a second gear 462 fixed to another DC motor 47 are engaged with each other, and the DC motors 45 and 47 are controlled by a position control unit 51 that detects the displacement in units of 1 μm. Efforts have been made to drive by a so-called differential gear system.

Further, in FIG. 7, movement in the Y direction is manually performed by a so-called micrometer feed mechanism 48, and movement in the Z direction is performed by a DC motor 50 and a ball screw 49. The common fixing plate 41 of 12b is stacked with an X-direction moving section, followed by a Z-axis moving section, and then a Y-axis moving section. These moving mechanisms can arbitrarily and accurately determine the imaging position depending on the size of the chip to be inspected, and can also perform highly accurate automatic focusing.

FIG. 8 is an optical schematic diagram of the automatic focusing, which is arranged independently inside the left and right optical systems 12a and 12b. The applicant is Japanese Patent Publication No. 59-1891
No. 3 discloses a focusing device that can perform focusing of an optical microscope by adjusting the distance between an objective system and a subject by projecting a focused light beam and receiving output of the reflected light. The two systems of automatic focusing used in this embodiment each have the same principle as that proposed in the above-mentioned Japanese Patent Laid-Open No. 18913/1982, but have the feature that the focusing operation is performed in two stages. That is, in the two systems of focusing operations, the first operation is to drive the wafer mounting table 37 in the Z direction so that the distance between the objective lens 42b and the surface of the test wafer 3 is in focus; After that, as a second operation, the optical system 12a is driven in the Z direction by the DC motor 50 so that the distance between the objective lens 42a and the surface of the test wafer 3 is in focus. Thereby, two systems of pattern images can be detected with high accuracy.

In FIG. 8, a focused light beam projected from a semiconductor laser 56 is reflected on the surface of the test wafer 3 via a cold mirror 53, a half mirror 52, and an objective lens 42a.

The specularly reflected light passes through the same optical path in the opposite direction, passes through the light-receiving lens 59 and the band-pass filter 58 via the reflection mirror 60, and then reaches the light-receiving element 57. The distance between the objective lens 42a and the surface of the test wafer 3 is kept constant by processing the electrical signal output photoelectrically converted by the light receiving element 57 in the focusing control unit 61. The pattern on the test wafer 3 held in focus in this way is created by reflecting the light projected by the illumination device 43a and the half mirror 52 and magnifying it by a factor of 20, for example, by the objective lens 42a. The light is transmitted, reflected by the cold mirror 53, further magnified by, for example, 2.5 times by the image forming projection lens 54, and then projected onto the light receiving system 13a via the reflection prism 55.

FIG. 9 is a schematic diagram of the light receiving system. In the figure, optical system 1
The pattern on the test wafer 3 (not shown) projected by 2a is imaged on the light-receiving surface of a CCD line sensor 77, which is a light-receiving element. This CCD line sensor 77 has, for example, 2048 photoelectric conversion pixels, and self-scans in a direction perpendicular to the paper surface. As a result, the pattern is obtained as a one-dimensional signal, but in order to obtain the pattern as a two-dimensional signal, in this embodiment, the CCD line sensor 77 is moved in a direction perpendicular to its self-scanning direction. There is. That is, the CCD line sensor 77 is attached to a fixed substrate 76 and further fixed to a nut 74 of a ball screw 72, and is connected to a DC motor 71 and a rotary encoder 73.
The ball screw 72 is positionally controlled and driven, thereby moving on the image plane of the pattern.

At that time, the fixed substrate 76 moves along the cross roller guide 75, and the CCD line sensor 77
Efforts have been made to reduce the vibrations that occur during movement. Further, the amount of movement and the moving speed of the CCD line sensor 77 can be changed by the light receiving system control unit 14a. For example, it is set so that the distance corresponding to 3000 pixels in terms of the number of photoelectric conversion pixels is covered in 6 seconds. be able to. If the effective area of the CCD line sensor 77 in the self-scanning direction is, for example, 2000 pixels, the two-dimensional signal obtained in this way is expressed as shown in FIG. You can get a high definition signal. For example, CC
The pixel spacing of the photoelectric conversion pixels of the D line sensor 77 is set to 13μ.
If m, the size on the imaging plane is 26mm x 39m
m, and the actual size on the test wafer 3 is, for example, when the magnification of the objective lens 42a is 20 times and the magnification of the imaging projection lens 54 is 2 times.
．． If it is multiplied by 5, it becomes 520 μm x 780 μm, and the pixel interval is 0.26 μm.

Therefore, since it is not possible to image the entire chip area with just one imaging, the mounting table 37 is moved by the size on the test wafer 3 between the X-direction moving table 35 and the Y-direction moving table 36.
A contrivance has been made to inspect the entire chip area by repeatedly performing 8 sequential imaging operations and constructing a map as shown in FIG.

The pattern signal photoelectrically converted by the CCD line sensor 7 in FIG. 9 passes through the light receiving system control section 14a to the camera control unit 15a (FIG. 1), undergoes correction processing and A/D conversion, and then is output. .

FIG. 12 is a system diagram of the system, where 81 is a circuit for correcting the level of the image signal at its darkest time (black shading correction circuit), and 83 is a circuit for correcting the level of the image signal at its brightest time (white shading correction circuit). 85 is an A/DyR conversion circuit for image signals.

The method of correction processing is as follows: First, the output when the light incident on the CCD line sensor 77 is blocked is set so that it does not go through the black shading correction circuit 81 by the switching circuit 82, and then the output is made not to go through the black shading correction circuit 81 by the switching circuit 84. The data is digitally converted by the A/D conversion circuit 85 without passing through the data storage circuit 83 and then stored in the data storage circuit 87. The data stored in the memory circuit 87 is for one line, that is, 20
This is dark sensitivity data in units of 00 pixels. By extracting these data in synchronization with the scan of the CCD line sensor 77 during image detection and differentially amplifying the data with the output signal of the CCD line sensor 77, sensitivity correction can be performed on a pixel-by-pixel basis. The correction circuit 81 has functions of differential amplification and signal synchronization.

Next, the output when the maximum amount of light is incident on the CCD line sensor 77 is passed through the correction circuit 81 by the switching circuit 82, and the signal corrected by the circuit 81 based on the output of the memory circuit 87 is sent to the correction circuit 83 by the switching circuit 84. A without passing through
/DV conversion circuit 85 performs digital conversion and then stores it in data storage circuit 86. The data stored in the memory circuit 86 is for 192 lines, that is, the data stored in the CCD line sensor 7
The 3000 lines scanned by No. 7 are divided into 16 line units, and the average value is used as the representative value to provide illuminance unevenness data for each pixel. These data are extracted in synchronization with the scanning of the CCD line sensor 77 during image detection, and differential amplification is performed between the line data corresponding to the divided area of every 16 lines, that is, the illuminance unevenness data, and the output signal of the CCD line sensor 77. This makes it possible to correct the unevenness of illumination. According to this method, 2000 x 192 pieces of illuminance data in the image area are used, so it is possible to correct illuminance unevenness with very high accuracy.

By digitally converting the data corrected by the correction circuits 81 and 83 based on these accumulated data, an image signal that is not affected by variations in the sensitivity of the photoelectric conversion pixels of the CCD line sensor 77 and uneven illuminance of the illumination lights 43a and 43b is generated. can be obtained.

The digital image signal obtained in this way is controlled based on the binarization level obtained by the image alignment section 18 and the amount of positional deviation between images when being calculated by the comparison calculation section 17 in FIG. Ru.

FIG. 13 is a system diagram of the alignment calculation section.

In the figure, 101 is a microprocessor, 102 is a microprogram ROM, 103 and 104 are RAMs for image data, 105 is a register that stores a binarization level, and 106 is a register that stores a positional shift amount. Moreover, FIG. 14 is a system diagram of the comparison calculation section, and 107a
and 107b, a circuit that binarizes the image signal; 108a;
and 108b is a buffer memory for correcting positional deviations, 109a and 109b are circuits for enlarging image signals, 110 is a circuit for comparing and calculating image signals, and 111 is a circuit for encoding defect data detected by calculations. .

The purpose of calculating the amount of positional deviation is as follows.

That is, after the test wafer 3 is positioned in a certain direction by the pre-alignment section 40, it is placed on the mounting table 37, and the comparison calculation section 1 is placed on the mounting table 37 by the movable optical systems 4a and 4b.
The positions of the two patterns to be compared in step 7 are determined, but since these alignments, movements, etc. all have mechanical errors, the purpose is to eliminate these errors.

FIG. 15 is a diagram showing its principle. Figure 15 (A) and (
B) are image signals stored in the memory units 16a and l[f (FIG. 1), respectively, and a portion having a pattern of these images is stored in the image data RAM 10 in FIG.
3, 104 (FIG. 13), the microprocessor 101 determines the center of gravity G l + 02 of each pattern as shown in FIG.
The amount of positional deviation can be calculated at high speed by aligning the center of gravity G2 with the center of gravity G1 close to the four sides of the area as shown in D), and then determining the position where the patterns completely match by so-called correlation calculation. Since this amount of positional deviation remains unchanged even if the wafer 3 to be inspected is moved, precise positioning of the mounting table 37 is not required, which is useful for simplifying the apparatus configuration.

Next, the principle of the comparison operation is to enlarge the original image signals (F) and (G) by, for example, 3×3 for each pixel using enlargement circuits 109a and 109b, respectively, as shown in FIG. After obtaining (H) and (1), the comparison operation circuit 110 subtracts (F) minus (1) and (G) minus (H) in parallel, and extracts only the part where the result is positive. Accordingly, Fig. 16 (J) and (K
) is obtained. As a result, it is possible to detect the difference between the original images (F) and (G) after removing false defects caused by contour disturbances, and furthermore, the difference (the part where the result of subtraction is positive) can be detected in (J). It is also possible to recognize whether the defect is present in the original image (F) or (G) depending on which of the original images (F) and (K) the defect is detected.

As described above, according to this embodiment, it is possible to perform a comparative inspection of the pattern on the 1f1 wafer without using a model pattern and without generating false defects, and it is possible to detect minute defects with high reliability.

In other words, according to this embodiment, high-speed and highly reliable pattern defect inspection can be realized, so that, for example, by mixing a sample wafer for inspection into the reduction exposure process and inspecting it, the reticle can be reused. Since it can be evaluated, real-time reticle inspection can be realized on a mass production line, which has a significant effect on improving the reliability of products such as integrated circuits, reducing inspection costs, and ultimately reducing costs.

[Brief explanation of the drawing]

FIG. 1 is a system diagram of a pattern inspection apparatus according to an embodiment of the present invention, FIG. 2 is an external view of an example of a reticle for reduction exposure, and FIG. 3 is an appearance of an example of a reticle subjected to reduction exposure. Figure 4 is a configuration diagram of the wafer @ mounting table used in this example. Figure 5 is a configuration diagram of the pattern detection section of the apparatus in Figure 1. Figures 6 and 7 are respectively movable. FIG. 8 is an optical configuration diagram of the pattern detection unit; FIG. 9 is a configuration diagram of the light receiving unit of the device shown in FIG. 1; Figure 1θ is a pixel arrangement diagram of the image obtained by the light receiving section in Figure 9. Figure 11 is a diagram explaining the principle of the inspection procedure in the apparatus in Figure 1. Figure 12 is the camera of the apparatus in Figure 1. Fig. 13 is a system diagram showing the image correction function in the control unit.
FIG. 14 is a system diagram showing the positional deviation calculation function in the image alignment section of the device shown in FIG. 1. FIG. 15 is a system diagram showing the comparison calculation function in the comparison calculation section of the device shown in FIG. 1. FIG. 16 is a principle diagram of defect detection in FIG. 14. 1 Reticle 2a, 2b: Pattern 3: Wafer 4a, 4b: Pattern detection optical system 11: Wafer mounting section 12a, 12b: Imaging optical system 13a, 13b: Light receiving system 14a, 14b: Light receiving control section 15a, 15b; Camera control unit 16
a, 16b: Memory unit 17: Comparison calculation section 18: Image alignment section 19: Image display control section 20; Monitor unit 37; Mounting table 45, 47.50: Motor 51: Position control section 48: Micrometer feeding mechanism 57; (For focus detection) Light receiving element 71: (For CCD line sensor feeding) Motor 77:
(For pattern detection) CCD line sensor 81: Black shading correction circuit 83: White shading correction circuit 109a, 1Q9b: Enlargement circuit 110: Comparison calculation circuit Fig. 2 Fig. 3 Fig. 5 Fig. 6 Fig. 8 Fig. 9 Figure 10 (F) (H) (J) F-1>0 (G) (K) G-H>0 Figure 16

Claims (1)

[Claims] 1. A two-dimensional image detection device having a line sensor and a scanning mechanism that mechanically scans the line sensor in a direction perpendicular to the electrical self-scanning direction of the line sensor; 2. A pattern inspection device comprising means for correcting sensitivity unevenness of the line sensor and illuminance unevenness of a light source for illuminating a detected image with respect to an image signal output from a dimensional image detection device. 2. A dark-sensitivity memory that stores as a map the output for each detection position of the line sensor when the correction means blocks the incident light to the line sensor, and the incident light to the line sensor has a maximum light amount. an illuminance map memory that stores the output of the line sensor for each mechanical scanning position when illuminated as shown in FIG. 2. The pattern inspection device according to claim 1, further comprising a differential amplifier circuit that adjusts the output.