JPS6313380B2 - - Google Patents
Info
- Publication number
- JPS6313380B2 JPS6313380B2 JP57202776A JP20277682A JPS6313380B2 JP S6313380 B2 JPS6313380 B2 JP S6313380B2 JP 57202776 A JP57202776 A JP 57202776A JP 20277682 A JP20277682 A JP 20277682A JP S6313380 B2 JPS6313380 B2 JP S6313380B2
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- voltage
- circuit
- multipath interference
- stereo demodulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000926 separation method Methods 0.000 claims description 11
- 238000001514 detection method Methods 0.000 claims description 10
- 230000005684 electric field Effects 0.000 claims description 10
- 230000003321 amplification Effects 0.000 claims description 6
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 6
- 239000003990 capacitor Substances 0.000 description 6
- 230000007423 decrease Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000002542 deteriorative effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
- H04H20/86—Arrangements characterised by the broadcast information itself
- H04H20/88—Stereophonic broadcast systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H40/00—Arrangements specially adapted for receiving broadcast information
- H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
- H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
- H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
- H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
- H04H40/72—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for noise suppression
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Stereo-Broadcasting Methods (AREA)
Description
【発明の詳細な説明】
産業上の利用分野
本発明は特に車載用FMステレオタイプのラジ
オ受信機に関するものである。DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates in particular to an FM stereo type radio receiver for use in vehicles.
従来例の構成とその問題点
近年、FM放送も多局時代を迎え車載用ラジオ
受信機は音楽性の高いソースとしてFMステレオ
ラジオ受信機のウエイトが多くなつている。しか
しFM電波は中波と比べて波長が短かくしかも車
が常に移動している状況下では良好な電波状態で
受信することがむずかしいとされている。一例と
してマルチパス妨害による雑音、歪が音質を損ね
る大きな要因を占めている。このマルチパス妨害
を除去軽減する方策としては多くの試みがなされ
ており、そのいくつかを記載すれば次のとおりで
ある。Conventional configurations and their problems In recent years, FM broadcasting has entered the era of multiple stations, and FM stereo radio receivers are increasingly being used as sources of highly musical sound in car radio receivers. However, FM radio waves have shorter wavelengths than medium waves, and it is said to be difficult to receive them in good radio conditions when cars are constantly moving. For example, noise and distortion caused by multipath interference are major factors in deteriorating sound quality. Many attempts have been made to eliminate and reduce this multipath interference, some of which are listed below.
電界変動に応じてステレオ復調回路の分離度
を制御する方法。 A method for controlling the degree of separation of a stereo demodulation circuit according to electric field fluctuations.
電界変動に応じてステレオ復調出力の高域周
波数帯を制御する方法。 A method of controlling the high frequency band of stereo demodulation output according to electric field fluctuations.
受信アンテナを複数個使用し、この複数の受
信アンテナを電波状態に応じて判別選択する方
法。 A method that uses multiple receiving antennas and selects them according to the radio wave conditions.
この他多くの方策が考えられるが前記〜の
特長を簡単に説明すると、，は電界変動分で
充分な改善が望めないし、の方法でも複数個の
アンテナに同時にマルチパス妨害を受ければこれ
を除去できず、しかも装置そのもののコストも高
くなるものであつた。 There are many other measures that can be considered, but to briefly explain the features of . Moreover, the cost of the device itself would be high.
従来、この種のマルチパス妨害の軽減には前記
，の方法で対応しているのがほとんどであ
り、以下その従来例について第１図を用いて説明
する。 Conventionally, this kind of multipath interference has been mostly reduced by the method described above, and the conventional example will be described below with reference to FIG.
１は受信アンテナ、２は高周波増幅回路、３は
混合回路、４は局部発振回路、５は中間周波増幅
回路、６はステレオ復調回路、７は低周波増幅回
路、８はスピーカである。中間周波増幅回路５か
らは端子ａが出され、ダイオード９を介して端子
ｂを経由してステレオ復調回路６に接続されてい
る。また端子ｂは抵抗１０、コンデンサ１１を介
して接地されている。 1 is a receiving antenna, 2 is a high frequency amplification circuit, 3 is a mixing circuit, 4 is a local oscillation circuit, 5 is an intermediate frequency amplification circuit, 6 is a stereo demodulation circuit, 7 is a low frequency amplification circuit, and 8 is a speaker. A terminal a is output from the intermediate frequency amplification circuit 5 and is connected to a stereo demodulation circuit 6 via a diode 9 and a terminal b. Further, the terminal b is grounded via a resistor 10 and a capacitor 11.
以上の構成に基づき、端子ａには通常電界強度
に応じた中間周波信号が第２図に示す特性に従つ
て出力され、そしてその中間周波信号の残留成分
がダイオード９、抵抗１０、コンデンサ１１で除
去されて端子ｂに印加される。端子ｂは直流電圧
によつてステレオ復調回路６の分離度を制御する
端子であり、その特性は第３図のとおりである。
マルチパス妨害を受けたときは、電界強度が低下
したときと等価であるから、端子ａの電位は第２
図の特性に従つて低下する。この低下変動分はダ
イオード９、抵抗１０、コンデンサ１１で検波さ
れ、端子ｂの電位を低下してステレオ復調回路６
の分離度がくずれ、マルチパス妨害による雑音を
軽減する。ここで問題となるのはマルチパス妨害
を受けたとき電波状況によつては第４図に示すよ
うな波形で端子ａの電位が変動する場合である。
この時は検波出力はマルチパス妨害を受けたにも
かかわらず第５図に示す直流電圧VDと交流電圧
υaが端子ｂに印加されるためステレオ復調回路６
の分離度を制御できず雑音を軽減することができ
ないものである。 Based on the above configuration, an intermediate frequency signal corresponding to the electric field strength is normally output to terminal a according to the characteristics shown in FIG. It is removed and applied to terminal b. Terminal b is a terminal for controlling the degree of separation of the stereo demodulation circuit 6 using a DC voltage, and its characteristics are as shown in FIG.
When multipath interference occurs, it is equivalent to when the electric field strength decreases, so the potential at terminal a becomes
It decreases according to the characteristics of the figure. This drop fluctuation is detected by the diode 9, resistor 10, and capacitor 11, lowering the potential at terminal b and transmitting it to the stereo demodulation circuit 6.
This reduces the noise caused by multipath interference. The problem here is that when multipath interference occurs, the potential at terminal a fluctuates with a waveform as shown in FIG. 4, depending on the radio wave condition.
At this time, although the detection output is subjected to multipath interference, the DC voltage V D and AC voltage υ a shown in Fig. 5 are applied to terminal b, so the stereo demodulation circuit 6
It is not possible to control the degree of separation and reduce noise.
発明の目的
本発明は前記従来の問題点を解消するもので、
簡素な構成でマルチパス妨害雑音を確実に軽減す
るようにしたラジオ受信機を提供するものであ
る。Purpose of the Invention The present invention solves the above-mentioned conventional problems.
To provide a radio receiver that reliably reduces multipath interference noise with a simple configuration.
発明の構成
本発明は中間周波信号を検波する検波回路とそ
の検波回路の出力を整流する整流回路とを備え、
前記検波回路の検波出力と整流回路の整流出力を
合成した信号によりステレオ復調回路の分離度を
制御することにより、マルチパス妨害雑音を大幅
に軽減させるものである。Configuration of the Invention The present invention includes a detection circuit that detects an intermediate frequency signal and a rectification circuit that rectifies the output of the detection circuit.
By controlling the degree of separation of the stereo demodulation circuit using a signal obtained by combining the detection output of the detection circuit and the rectification output of the rectification circuit, multipath interference noise can be significantly reduced.
実施例の説明
以下本発明の一実施例を第６図とともに説明す
る。この第６図において、第１図の従来例の構成
と同一箇所には同一番号を附して説明を省略す
る。端子ｂをコンデンサ１２を介してアノード側
が接地されているダイオード１３のカソード側に
接続し、その接続点はダイオード１４を介してト
ランジスタ１７，１８のベースに接続されてい
る。１５は抵抗、１６はコンデンサであり、これ
らはトランジスタ１７，１８のベースと接地間に
接続されている。トランジスタ１７のエミツタは
トランジスタ１８のコレクタに、トランジスタ１
７のコレクタはトランジスタ１８のエミツタにそ
れぞれ接続され、トランジスタ１７のエミツタ側
は接地され、またコレクタ側は端子ｂに接続され
ている。DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. In FIG. 6, parts that are the same as those in the conventional example shown in FIG. 1 are given the same numbers and their explanations will be omitted. Terminal b is connected via a capacitor 12 to the cathode side of a diode 13 whose anode side is grounded, and its connection point is connected via a diode 14 to the bases of transistors 17 and 18. 15 is a resistor, and 16 is a capacitor, which are connected between the bases of transistors 17 and 18 and ground. The emitter of transistor 17 is connected to the collector of transistor 18, and the emitter of transistor 17 is connected to the collector of transistor 18.
The collectors of transistors 7 and 7 are respectively connected to the emitters of transistors 18, the emitter side of transistor 17 is grounded, and the collector side is connected to terminal b.
以上のような構成からなり、動作を説明する。
端子ａには電界強度に応じた電圧が出力され、検
波されて端子ｂに印加されることは従来例と同じ
である。そして、マルチパス妨害を受けたとき第
４図に示すような波形が端子ａから出力されたと
きについて説明する。この時は端子ｂには第５図
に示すようなダイオード９で検波された直流電圧
VDと交流電圧υaが印加される。この交流電圧υa
をコンデンサ１２で取り出しダイオード１３，１
４、コンデンサ１５、抵抗１６で整流し、直流電
圧に変換する。ここで受けたマルチパス妨害が大
きく交流電圧υaが大きくなればＣ点の電位は第７
図に示す特性に従つて上昇し、トランジスタ１
７，１８の出力インピーダンスが低下し、端子ｂ
の電位は第８図に示すように低下する。従つてス
テレオ復調回路６の分離度が低下しマルチパス妨
害雑音は軽減される。 It has the above configuration, and its operation will be explained.
As in the conventional example, a voltage corresponding to the electric field strength is outputted to terminal a, detected, and applied to terminal b. Next, a case will be described in which a waveform as shown in FIG. 4 is output from terminal a when multipath interference is received. At this time, the DC voltage detected by diode 9 as shown in Figure 5 is connected to terminal b.
V D and an alternating voltage υ a are applied. This AC voltage υ a
is taken out by capacitor 12 and diode 13,1
4. Rectify with capacitor 15 and resistor 16 and convert to DC voltage. If the multipath interference received here is large and the AC voltage υ a increases, the potential at point C will be the 7th
transistor 1 rises according to the characteristics shown in the figure.
The output impedance of terminals 7 and 18 decreases, and terminal b
The potential of decreases as shown in FIG. Therefore, the degree of separation of the stereo demodulation circuit 6 is reduced and multipath interference noise is reduced.
一方、マルチパス妨害を受けないときは交流電
圧υaが小さく、従つてトランジスタ１７，１８の
出力インピーダンスも大きく、端子ｂの電位は低
下しないためステレオ復調回路６の分離度は高い
状態で保持される。すなわち、本発明ではマルチ
パス妨害を受けたとき交流成分υaが大きいときは
トランジスタ１７，１８の整流出力でステレオ復
調回路６の分離度を制御し、一方単なる電界強度
の低下であれば従来例と同様に検波出力で分離度
を制御するものである。 On the other hand, when there is no multipath interference, the AC voltage υ a is small, the output impedance of the transistors 17 and 18 is also large, and the potential at terminal b does not drop, so the degree of separation of the stereo demodulation circuit 6 is maintained at a high level. Ru. That is, in the present invention, when multipath interference occurs and the alternating current component υ a is large, the degree of separation of the stereo demodulation circuit 6 is controlled by the rectified outputs of the transistors 17 and 18, whereas if the electric field strength simply decreases, the degree of separation of the stereo demodulation circuit 6 is controlled by the conventional example. Similarly, the degree of separation is controlled by the detection output.
ここで、端子ｂに印加される電圧（コントロー
ル電圧）と交流電圧υaとの関係を第９図によつて
説明する。イはマルチパス妨害による交流電圧υa
が発生しないときの特性であり、このときはステ
レオ復調回路６へのコントロール電圧は電界強度
に応じて変化する。一方ロはマルチパス妨害によ
る交流電圧υaが大きく発生したときの特性であ
り、このときは電界強度が大きくてもコントロー
ル電圧は低く抑えられ電界強度に依存しなくな
り、交流電圧υaに応じて変化する。ハ，ニはイと
ロの中間値である。 Here, the relationship between the voltage (control voltage) applied to terminal b and the alternating current voltage υ a will be explained with reference to FIG. A is the AC voltage υ a due to multipath interference
This is the characteristic when no occurrence occurs, and in this case, the control voltage to the stereo demodulation circuit 6 changes depending on the electric field strength. On the other hand, B is the characteristic when a large AC voltage υ a is generated due to multipath interference. In this case, even if the electric field strength is large, the control voltage is kept low and no longer depends on the electric field strength, and it changes depending on the AC voltage υ a . Change. C and D are intermediate values between A and B.
発明の効果
以上の実施例から明らかなように、本発明は中
間周波信号を検波する検波回路とこの検波出力を
整流する整流回路を設け、この整流出力と前記検
波出力を合成してステレオ復調回路の分離度を制
御するようにしたものであり、これによればマル
チパス妨害雑音を大幅に軽減することができ、し
かも簡素な構成で安価に実現できるもので、その
実用性は大なるものである。Effects of the Invention As is clear from the embodiments described above, the present invention provides a detection circuit for detecting an intermediate frequency signal and a rectification circuit for rectifying the detection output, and synthesizes the rectified output and the detection output to create a stereo demodulation circuit. This method is designed to control the degree of separation of the signals, and can significantly reduce multipath interference noise.It can also be realized at low cost with a simple configuration, and its practicality is great. be.
第１図は従来例を示す回路図、第２図〜第５図
は同動作説明用特性図、第６図は本発明の一実施
例を示す回路図、第７図〜第９図は同動作説明用
特性図である。
１……受信アンテナ、５……中間周波増幅回
路、６……ステレオ復調回路、９……ダイオー
ド、１３，１４……ダイオード、１７，１８……
トランジスタ。
Fig. 1 is a circuit diagram showing a conventional example, Figs. 2 to 5 are characteristic diagrams for explaining the same operation, Fig. 6 is a circuit diagram showing an embodiment of the present invention, and Figs. 7 to 9 are the same. It is a characteristic diagram for explaining operation. 1... Receiving antenna, 5... Intermediate frequency amplification circuit, 6... Stereo demodulation circuit, 9... Diode, 13, 14... Diode, 17, 18...
transistor.
Claims (1)
１の端子を備えた中間周波増幅回路と、直流電圧
で分離度を制御できる第２の端子を備えたステレ
オ復調回路を有し、前記第１の端子に中間周波信
号を検波する検波回路を接続し、前記検波回路に
検波出力を整流する整流回路を接続し、前記検波
回路の検波出力と整流回路の整流出力を合成して
第２の端子に供給するように構成したことを特徴
とするラジオ受信機。1. An intermediate frequency amplification circuit equipped with a first terminal that outputs an intermediate frequency signal according to the electric field strength, and a stereo demodulation circuit equipped with a second terminal that can control the degree of separation with a DC voltage, A detection circuit that detects an intermediate frequency signal is connected to a terminal of A radio receiver configured to supply a signal to a radio receiver.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20277682A JPS5991751A (en) | 1982-11-17 | 1982-11-17 | Radio receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20277682A JPS5991751A (en) | 1982-11-17 | 1982-11-17 | Radio receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5991751A JPS5991751A (en) | 1984-05-26 |
| JPS6313380B2 true JPS6313380B2 (en) | 1988-03-25 |
Family
ID=16462990
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20277682A Granted JPS5991751A (en) | 1982-11-17 | 1982-11-17 | Radio receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5991751A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2768682B2 (en) * | 1988-03-11 | 1998-06-25 | パイオニア株式会社 | FM stereo receiver |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5733834A (en) * | 1980-08-07 | 1982-02-24 | Clarion Co Ltd | Frequency modulation noise reducing circuit |
-
1982
- 1982-11-17 JP JP20277682A patent/JPS5991751A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5733834A (en) * | 1980-08-07 | 1982-02-24 | Clarion Co Ltd | Frequency modulation noise reducing circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5991751A (en) | 1984-05-26 |
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