JPS5991751A - Radio receiver - Google Patents

Radio receiver

Info

Publication number
JPS5991751A
JPS5991751A JP20277682A JP20277682A JPS5991751A JP S5991751 A JPS5991751 A JP S5991751A JP 20277682 A JP20277682 A JP 20277682A JP 20277682 A JP20277682 A JP 20277682A JP S5991751 A JPS5991751 A JP S5991751A
Authority
JP
Japan
Prior art keywords
voltage
terminal
circuit
output
intermediate frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20277682A
Other languages
Japanese (ja)
Other versions
JPS6313380B2 (en
Inventor
Shigeru Goto
茂 後藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP20277682A priority Critical patent/JPS5991751A/en
Publication of JPS5991751A publication Critical patent/JPS5991751A/en
Publication of JPS6313380B2 publication Critical patent/JPS6313380B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/86Arrangements characterised by the broadcast information itself
    • H04H20/88Stereophonic broadcast systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/72Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for noise suppression

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To reduce surely multi-path disturbing noise by rectifying an output of a detecting circuit which detects an intermediate frequency signal, and controlling the separation degree of a stereo demodulating circuit by a synthesized signal of the detected output and the rectified output. CONSTITUTION:A voltage in response to an electric field strength is outputted to a terminal (a) of an intermediate frequency amplifier circuit 5, detected at a diode 9 and outputted to a terminal (b). When multi-path disturbance is received, a DC voltage VD and an AC voltage va are applied to the terminal (b), the voltage va is extracted by a capacitor C12, rectified at diodes 13, 14, C15 and a resistor 16 and converted into a DC voltage. If the multi-path disturbance is large and the voltage va is large, the potential at a point (c) is increased, the output impedance of transistors 17, 18 is decreased, and the potential at the terminal (b) is reduced. Then, the separation of the stereo demodulating circuit 6 is decreased and the multi-path disturbing noise is decreased.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は特に車載用FMステレオタイプのラジオ受信機
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates in particular to an FM stereo type radio receiver for use in a vehicle.

従来例の構成とその問題点 近年、FM放送も多局時代を迎え車載用ラジオ受信機は
音楽性の高いソースとしてFMステレオラジオ受イ言機
のウェイトが多くなっている。し力・しFM電波は中波
と比べて波長が短かくしかも車が常に移動している状況
下では良好な電波状態で受信することがむずかしいとさ
れている。−例としてマルチパス妨害による雑音、歪が
音質を損ねる大きな要因を占めている。このマルチノく
ス妨害を除去軽減する方策としては多くの試みがなされ
ており、そのいくつかを記載すれは次のとおりである。
Conventional configurations and their problems In recent years, FM broadcasting has entered the era of multiple stations, and FM stereo radio receivers have been increasingly used as sources of highly musical quality in car radio receivers. FM radio waves have shorter wavelengths than medium waves, and it is said to be difficult to receive them in good radio conditions when cars are constantly moving. -For example, noise and distortion caused by multipath interference are major factors that impair sound quality. Many attempts have been made to eliminate and reduce this multi-noise interference, some of which are listed below.

■ 電界変動に応じてステレオ復調回路の分離度を制御
する方法。
■ A method to control the degree of separation of a stereo demodulation circuit according to electric field fluctuations.

■ 電界変動に応じてステレオ復調出力の高域周波数帯
を制御する方法。
■ A method of controlling the high frequency band of the stereo demodulation output according to electric field fluctuations.

■ 受信アンテナを複数個使用し、この複数の受信アン
テナを電波状態に応じて判別選択する方法。
■ A method that uses multiple receiving antennas and selects them according to the radio wave conditions.

この他多くの方策が考えられるが前記■〜■の特長を簡
単に説明すると、■、■は電界変動分で充分な改善が望
めないし、■の方法でも複数個のアンテナに同時にマル
チノくス妨害を受ければこれを除去できず、しかも装置
そのもののコストも高くなるものであった。
There are many other measures that can be considered, but to briefly explain the features of items 1 to 2 above, 2 and 2 cannot be expected to provide sufficient improvement due to electric field fluctuations, and method 2 also has multi-nox interference on multiple antennas at the same time. If this happens, it cannot be removed, and the cost of the device itself increases.

従来、この種のマルチパス妨害の軽減には前記■、■の
方法で対応しているのがほとんどであり、以下その従来
例について第1図を用いて説明する。
Conventionally, this type of multipath interference has been reduced in most cases by the methods (1) and (3) mentioned above, and the conventional examples thereof will be explained below with reference to FIG.

1は受信アンテナ、2は高周波増幅回路、3は混合回路
、4は局部発振回路、5は中間周波増幅回路、6はステ
レオ復調回路、7は低周波増幅回路、8はスピーカであ
る。中間周波増幅回路5からは端子aが出され、ダイオ
ード9を介して端子すを経由してステレオ復調回路6に
接続されている。
1 is a receiving antenna, 2 is a high frequency amplification circuit, 3 is a mixing circuit, 4 is a local oscillation circuit, 5 is an intermediate frequency amplification circuit, 6 is a stereo demodulation circuit, 7 is a low frequency amplification circuit, and 8 is a speaker. A terminal a is output from the intermediate frequency amplification circuit 5 and is connected to the stereo demodulation circuit 6 via a diode 9 and a terminal A.

また端子すは抵抗10、コンデンサ11を介して接地さ
れている。
Further, the terminal is grounded via a resistor 10 and a capacitor 11.

以上の構成に基づき、端子aには通常電界強度に応じた
中間周波信号が第2図に示す特性に従って出力され、そ
してその中間周波信号の残留成分がダイオード9、抵抗
1o、コンデンサ11で除去されて端子すに印加される
。端子すは直流電圧によってステレオ復調回路6の分離
度を制御する端子であり、その特性は第3図のとおりで
ある。
Based on the above configuration, an intermediate frequency signal corresponding to the electric field strength is normally output to terminal a according to the characteristics shown in FIG. is applied to the terminal. The terminal S is a terminal for controlling the degree of separation of the stereo demodulation circuit 6 using a DC voltage, and its characteristics are as shown in FIG.

マルチパス妨害を受けたときは、電界強度が低下したと
きと等価であるから、端子aの電位は第2図の特性に従
って低下する。この低下変動分はダイオード9、抵抗1
0、コンデンサ11で検波され、端子すの電位を低下し
てステレオ復調回路6の分離度がくずれ、マルチパス妨
害による雑音を軽減する。ここで問題となるのはマルチ
パス妨害を受けたとき電波状況によっては第4図に示す
ような波形で端子aの電位が変動する場合である。
When multipath interference occurs, it is equivalent to when the electric field strength decreases, so the potential at terminal a decreases according to the characteristics shown in FIG. 2. This drop variation is made up of diode 9 and resistor 1.
0, the signal is detected by the capacitor 11, and the potential of the terminal is lowered, the degree of separation of the stereo demodulation circuit 6 is destroyed, and noise due to multipath interference is reduced. The problem here is that when multipath interference occurs, the potential at terminal a fluctuates with a waveform as shown in FIG. 4 depending on the radio wave condition.

この時は検波出力はマルチパス妨害を受けたにもかかわ
らず第5図に示す直流電圧VDと交流電圧vaが端子す
に印加されるためステレオ復調回路6の分離度を制御で
きず雑音を軽減することができないものである。
At this time, although the detection output is subject to multipath interference, the DC voltage VD and AC voltage va shown in Fig. 5 are applied to the terminals, so the degree of separation of the stereo demodulation circuit 6 cannot be controlled and the noise is reduced. It is something that cannot be done.

発明の目的 本発明は前記従来の問題点を解消するもので、簡素な構
成で−・・チバー妨害雑音を確シ嫡滅するようにしたラ
ジオ受信機を提供するものである。
OBJECTS OF THE INVENTION The present invention solves the above-mentioned problems of the prior art, and provides a radio receiver that has a simple configuration and is capable of reliably eliminating the interference noise.

発明の構成 本発明は中間周波信号を検波する検波回路とその検波回
路の出力を整流する整流回路とを備え、前記検波回路の
検波出力と整流回路の整流出力を合成した信号によりス
テレオ復調回路の分離度を制御することにより、マルチ
ノくス妨害雑音を大幅に軽減させるものである。
Structure of the Invention The present invention includes a detection circuit for detecting an intermediate frequency signal and a rectification circuit for rectifying the output of the detection circuit, and a signal obtained by combining the detection output of the detection circuit and the rectification output of the rectification circuit is used to generate a stereo demodulation circuit. By controlling the degree of separation, multi-noise interference noise can be significantly reduced.

実施例の説明 以下本発明の一実施例を第6図とともに説明する。この
第6図において、第1図の従来例の構成と同一箇所には
同一番号を附して説明を省略する。
DESCRIPTION OF THE EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. In FIG. 6, parts that are the same as those in the conventional example shown in FIG. 1 are given the same numbers and their explanations will be omitted.

端子すをコンデンサ12を介してアノード” (fil
l iK接地されているダイオード13のカソード側に
接続し、その接続点はダイオード14を介してトランジ
スタ17.18のベースに接続されている。15は抵抗
、16はコンデンサであり、これらはトランジスタ17
.18のベースと接地間に接続されている。トランジス
タ17のエミッタはトランジスタ18のコレクタに、ト
ランジスタ17のコレクタはトランジスタ18のエミツ
タにそれぞれ接続され、トランジスタ17のエミッタ側
は接地され、またコレクタ側は端子すに接続されている
Connect the terminal to the anode via capacitor 12 (fil
l iK is connected to the cathode side of the diode 13 which is grounded, and its connection point is connected via the diode 14 to the base of the transistor 17.18. 15 is a resistor, 16 is a capacitor, and these are transistors 17
.. 18 base and ground. The emitter of the transistor 17 is connected to the collector of the transistor 18, and the collector of the transistor 17 is connected to the emitter of the transistor 18. The emitter side of the transistor 17 is grounded, and the collector side is connected to a terminal.

以上のような構成から々す、動作を説明する。The operation based on the above configuration will be explained.

端子aには電界強度に応じた電圧力玉出力され、検波さ
れて端子すに印加されることは従来flJと同じである
。そして、マルチノぐス妨害を受けたとき第4図に示す
ような波形が端子出力1ら出力されたときについて説明
する。この時は端子すには第5図に示すようなダイオー
ド9で検波された直流電圧■ と交流電圧vaが印加さ
れる。この交流電圧va  をコンデンサー2で取り出
し夕゛イオー)”13゜14、コンデンサー5、抵抗1
6で整流し、直流電圧に変換する。ここで受けたマルチ
ノ(ス妨害力;大きく交流電圧vaが大きくなればC5
屯の電位は第7図に示す特性に従って上昇し、トラン・
ジスタ17.18の出力インビ一タ゛ンスi1氏下し、
立高子すの電位は第8図に示すように低下する。従って
ステレオ復調回路6の分離度75;イ氏下しマルチノ々
ス妨害雑音は軽減される。
As in the conventional flJ, a voltage according to the electric field strength is outputted to the terminal a, and the wave is detected and applied to the terminal A. Next, a case will be explained in which a waveform as shown in FIG. 4 is output from terminal output 1 when multi-signal interference is received. At this time, a direct current voltage (2) detected by a diode 9 and an alternating current voltage (va) as shown in FIG. 5 are applied to the terminals. This AC voltage va is taken out with capacitor 2.
6 to rectify and convert to DC voltage. The Martinos interference force received here; if the AC voltage va becomes large, C5
The potential of the tunnel rises according to the characteristics shown in Figure 7, and the potential of the tunnel increases.
The output impedance of register 17.18 is lowered by i1,
The potential of the standing high riser drops as shown in FIG. Therefore, the separation degree of the stereo demodulation circuit 6 is 75, and the multi-noise interference noise is reduced.

一方、マルチノくス妨害を受けないときは交流電圧va
が小さく、従ってトランジスター了、18の出力インピ
ーダンスも大きく、端子すの電位は低下しないためステ
レオ復調回路6の分離度は高い状態で保持される。すな
わち、本発明ではマルチパス妨害を受けたとき交流成分
V が太きいときはトランジスタ17.18の整流出力
でステレオ復調回路6の分離度を制御し、一方単なる電
界強度の低下であれば従来例と同様に検波出力で分離度
を制御するものである。
On the other hand, when there is no multi-nox interference, the AC voltage va
is small, therefore the output impedance of the transistor 18 is also large, and the potential at the terminal does not drop, so the degree of isolation of the stereo demodulation circuit 6 is maintained at a high level. That is, in the present invention, when multipath interference occurs and the AC component V is large, the degree of separation of the stereo demodulation circuit 6 is controlled by the rectified output of the transistors 17 and 18, whereas when the electric field strength simply decreases, the degree of separation of the stereo demodulation circuit 6 is controlled by the conventional example. Similarly, the degree of separation is controlled by the detection output.

ここで、端子すに印加される電圧(コントロール電圧)
と交流電圧V との関係を第9図によって説明する。イ
はマルチパス妨害による交流電圧vaが発生し々いとき
の特性であり、このときはステレオ復調回路6へのコン
トロール電圧は電界強度に応じて変化する。−吉日はマ
ルチパス妨害による交流電圧va が大きく発生したと
きの特性であり、このときは電界強度が大きくてもコン
トロール電圧は低く抑えられ電界強度に依存しなくなり
、交流電圧va に応じて変化する。ハ、二はイと口の
中間値である。
Here, the voltage applied to the terminal (control voltage)
The relationship between V and AC voltage V will be explained with reference to FIG. A shows the characteristic when AC voltage va is most likely to be generated due to multipath interference, and in this case, the control voltage to the stereo demodulation circuit 6 changes depending on the electric field strength. - An auspicious day is a characteristic when a large AC voltage va occurs due to multipath interference. In this case, even if the electric field strength is large, the control voltage is kept low and no longer depends on the electric field strength, and changes according to the AC voltage va. . Ha, 2 is the middle value between A and Mou.

発明の効果 以上の実施例から明らかなように、本発明は中第1図 間層波信号を検波する検波回路とこの検波出力を整流す
る整流回路を設け、この整流出力と前記検波出力を合成
してステレオ復調回路の分離度を制御するようにしたも
のであり、これによればマルチパス妨害雑音を大幅に軽
減することができ、しかも簡素な構成で安価に実現でき
るもので、その実用性は犬なるものである。
Effects of the Invention As is clear from the embodiments described above, the present invention provides a detection circuit for detecting an interlayer wave signal in Fig. 1 and a rectification circuit for rectifying the detection output, and synthesizes the rectified output and the detection output. This system controls the degree of separation of the stereo demodulation circuit by using the following methods.This method can significantly reduce multipath interference noise, and can be realized at low cost with a simple configuration, making it highly practical. is a dog.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を示す回路図、第2図〜第5図は同動作
説明用特性図、第6図は本発明の一実施例を示す回路図
、第7図〜第9図は同動作説明用特性図である。 1・・・−・・受信アンテナ、5・・・・・・中間周波
増幅回路・6・・ ・ステレオ復調回路、9・・・・・
・ダイオード、13゜14・・・・・・ダイオード、1
7.18・・・・・・トランジスタ。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第6
図 第3図 仁 第4図    第5図 第7図   第8図
Fig. 1 is a circuit diagram showing a conventional example, Figs. 2 to 5 are characteristic diagrams for explaining the same operation, Fig. 6 is a circuit diagram showing an embodiment of the present invention, and Figs. 7 to 9 are the same. It is a characteristic diagram for explaining operation. 1...--Receiving antenna, 5...Intermediate frequency amplification circuit, 6... -Stereo demodulation circuit, 9...
・Diode, 13゜14・・・Diode, 1
7.18...transistor. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 6
Figure 3 Figure 4 Figure 5 Figure 7 Figure 8

Claims (1)

【特許請求の範囲】[Claims] 電界強度に応じた中間周波信号を出力する第1の端子を
備えだ中間周波増幅回路と、直流電圧で分離度を制御で
きる第2の端子を備えたステレオ復調回路を有し、前記
第1の端子に中間周波信号を検波する検波回路を接続し
、前記検波回路に検波出力を整流する整流回路を接続し
、前記検波回路の検波出力と整流回路の整流出力を合成
して第2の端子に供給するように構成したことを特徴と
するラジオ受信機。
It has an intermediate frequency amplification circuit that is equipped with a first terminal that outputs an intermediate frequency signal according to the electric field strength, and a stereo demodulation circuit that is equipped with a second terminal that can control the degree of separation with a DC voltage, A detection circuit that detects an intermediate frequency signal is connected to the terminal, a rectifier circuit that rectifies the detection output is connected to the detection circuit, and the detection output of the detection circuit and the rectified output of the rectification circuit are combined and sent to the second terminal. A radio receiver configured to supply
JP20277682A 1982-11-17 1982-11-17 Radio receiver Granted JPS5991751A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20277682A JPS5991751A (en) 1982-11-17 1982-11-17 Radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20277682A JPS5991751A (en) 1982-11-17 1982-11-17 Radio receiver

Publications (2)

Publication Number Publication Date
JPS5991751A true JPS5991751A (en) 1984-05-26
JPS6313380B2 JPS6313380B2 (en) 1988-03-25

Family

ID=16462990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20277682A Granted JPS5991751A (en) 1982-11-17 1982-11-17 Radio receiver

Country Status (1)

Country Link
JP (1) JPS5991751A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01231439A (en) * 1988-03-11 1989-09-14 Pioneer Electron Corp Fm stereo receiver

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733834A (en) * 1980-08-07 1982-02-24 Clarion Co Ltd Frequency modulation noise reducing circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733834A (en) * 1980-08-07 1982-02-24 Clarion Co Ltd Frequency modulation noise reducing circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01231439A (en) * 1988-03-11 1989-09-14 Pioneer Electron Corp Fm stereo receiver
JP2768682B2 (en) * 1988-03-11 1998-06-25 パイオニア株式会社 FM stereo receiver

Also Published As

Publication number Publication date
JPS6313380B2 (en) 1988-03-25

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