JPS63132214A - Method and device for correcting jitter of polygon mirror - Google Patents

Abstract

PURPOSE:To eliminate the dot shift of a scanning line substantially by transferring N dot recording clock signals wherein the dot shift of a scanning line caused by the error in the rotation of a polygon mirror by t/N each by as many times as the quantity of the dot shift during scanning on one scanning line. CONSTITUTION:When a dot diameter and a dot interval are equal to each other, every four dots in a dot array have a dot shift of d/10, so a dot shift of (d/10) 3 is obtained at the 12th dot at the scanning line end. For the purpose, the N dot recording clock signals phi1-phiN are prepared which are generated by dividing the period (t) of a reference dot recording clock signal phi1 equally by N and delaying them by t/N each. Then the dot recording clock signals are transferred in order in the phase delay direction to generate a transfer dot recording clock signal phiX and a scan is made in synchronism with it. Then, an adjustment is so made in every cycle of the transfer that the scanning length becomes longer by d/10 each, and the dot shift of (d/10) 3 is eliminated completely at the end of the scanning line.

Description

Detailed Description of the Invention (Industrial Field of Application) The present invention is an image recording device such as a plane scanning facsimile or a plate-making scanner, in which the shading (including black and white) of each dot is recorded in synchronization with a dot recording clock signal. ) When recording an image by scanning a recording light beam modulated according to the rotational angle of the polygon mirror onto a photosensitive material such as photographic paper or film using a rotating polygon mirror (hereinafter referred to as a polygon mirror), a rotational error of the polygon mirror may occur. The present invention relates to a polygon mirror jitter correction method and apparatus for eliminating dot shifts in scanning lines that occur.

(Prior Art and its Problems) Polygon mirrors have conventionally been widely used as scanning deflectors for laser beams in plane-scanning image recording apparatuses that use rape beams as recording light beams. In this case, rotation errors are inevitable for polygon mirrors, so
Variations occur in the scanning length of each reflecting mirror surface of the polygon mirror, and dot shifts occur in the scanning line as shown in FIG. In the figure, the start positions of each scanning line are almost the same, but at the end position of the second scanning line, a dot shift of a distance equivalent to 1/2 dot occurs with respect to the correct scanning length. Such dot misalignment deteriorates the image quality of the recorded image, and in particular, plate-making scanners for duplicating mesh plates record regulatory meshes (halftone dot patterns).
Even a deviation as small as a dot significantly deteriorates the image quality.

Conventionally, dot deviations in scanning lines due to rotation errors of polygon mirrors have been corrected by the following method.

The first method is to use a grating (linear encoder). In this method, the grating laser beam is incorporated into the same optical system as the recording laser beam, and these laser beams are simultaneously deflected by one Bolinbon mirror to perform exposure recording scanning with the recording laser beam. , the grating is scanned by the grating laser beam to obtain a pulse signal representing the position of the recording laser beam, and a synchronization control circuit such as a PLL circuit is used to generate a dot recording clock signal synchronized with the pulse signal, thereby performing each scan. This eliminates line dot misalignment. This method eliminates dot misalignment, but since the laser beam for grading is incorporated into the optical system, the optical system is ! The disadvantage is that the adjustment becomes complicated and the adjustment becomes complicated, and the Pt-signal circuit becomes expensive when used for high resolution and high frequency.

The second method is to combine a crystal excavator and a start sensor. This method uses a high-precision polygon mirror as a deflector, generates a basic clock signal using a crystal oscillator, generates multiple clock signals by delaying this signal by an appropriate amount of time, and connects the start sensor to a recording laser. A clock signal that is synchronized with the time when the beam crosses is selected, and this is used as the dot recording clock signal for the relevant scanning line, and the start positions of each scanning line are aligned.

The main scanning synchronization system based on this method has a simple configuration, and therefore is relatively easy to adjust and is inexpensive. However, with this method, the accuracy of the polygon mirror is inferior to that of the crystal excavator and start sensor, and for this reason, immediately after the start, each scan line has almost the same timing without any dot deviation, but near the end position, the polygon mirror is slightly Due to the difference in rotational speed, dot misalignment inevitably occurs.
The disadvantage is that the ends of each scanning line tend to be uneven. Even if an attempt is made to obtain a polygon mirror with higher precision in order to prevent this, it is constrained by both cost and technical limitations.

The third method is to modulate the frequency of the dot recording clock signal according to the rotation error. This method generates a dot recording clock signal by obtaining a voltage according to the rotational speed of a polygon mirror and converting it into voltage-frequency (V-F) in an analog way. A basic clock signal is generated in advance, and a dot recording clock signal is generated by frequency-dividing this basic clock signal at a frequency division ratio corresponding to the rotational speed of the polygon mirror. However, the former method requires a voltage value of high $1 degree, and the latter method has the problem that it is difficult to select the division ratio when the desired frequency changes minutely, and in any case, it is difficult to adjust the frequency. be.

(Objective of the Invention) Therefore, the object of the present invention is to solve the problems of the above-mentioned prior art, and to solve the problem without providing a grating or a synchronous control circuit.
The present invention also provides a method and apparatus for correcting jitter for a polygon mirror, which can substantially eliminate dot deviations in scanning lines caused by rotational errors of the polygon mirror with a simple configuration (without using a high-precision polygon mirror). That's true.

(Means for Achieving the Object) In order to achieve the above object, according to the present invention, an image is recorded by scanning a recording light beam modulated in synchronization with a dot recording clock signal onto a photosensitive material using a polygon mirror. When performing dot recording, the period t of the reference dot recording clock signal is divided into N equal parts and N dot recording is delayed by t/N.A rack number is prepared in advance, and the recording is performed prior to scanning the Go scanning line. A start sensor that detects the passage of the recording beam and an end sensor that detects the passage of the recording beam after the completion of scanning one scanning line are provided, and the detection time for the beam to cross these two sensors for each surface of the polygon mirror is determined. The interval is counted with a time resolution of t/N, the difference between the counted value and the reference count value is determined as the number of clock transfers, the sign of the difference is determined as the transfer phase direction, and the start sensor is detected for each surface of the polygon mirror. One of the N dot recording clock signals is selected in synchronization with the output, and dot recording clock signals having adjacent phases are sequentially selected from the selected dot recording 1'' dot signal in the transfer phase direction. Uniform recording is performed using the transfer dot recording clock signal obtained by transferring the number of transfers.

That is, in this invention, the second conventional technique described above is adopted to align the start positions of each main scan, and the dot shift of the scanning line caused by the rotation error of the polygon mirror is delayed by t/N. This problem is solved by changing the number of dot recording clocks 4 corresponding to the dot shift reference during scanning of one scanning line.

(Example) First, the basic idea of this invention will be explained with reference to FIG. Figure 2 (A) is a standard 1 without dot misalignment.
This shows a dot row of a scanning line and a dot recording clock signal for forming this dot row. For illustration purposes, it is assumed here that one scanning line of standard scanning length is formed by 12 dots. There is. On the other hand, in Fig. 2 (B), due to the rotation error of the polygon mirror, the average rotation speed on a certain reflecting mirror surface deviates to about 2.5% (1/40) slower than the standard, and the scanning line starts. For example, although the positions match accurately by employing the second prior art described above,
This shows a case where a dot shift of (d/10)×3 occurs at the end of the scanning line. In other words, the time required for 12 cycles of the dot recording clock signal is the same in both cases of FIG. 2 (A) and <8), but in the case of FIG. The scan length is shorter than the standard scan length. Note that d is the standard dot diameter. For convenience of illustration, the dots are shown to be equal to the dot spacing, but the dot diameter is normally larger than the dot spacing for exposure recording. The following description will be made assuming that the dot diameter and the dot interval are equal. In the case of FIG. 2(B), a dot shift of d/10 occurs for every four dots in the dot row, and at the 12th dot at the end of the scanning line, the dot shift is (d/10)×3.

In FIG. 2(C), the transfer correction according to the present invention is applied during the scanning of FIG. 2(B) to eliminate dot misalignment. In order to perform this transfer correction, in the present invention, as shown in FIG. 3, the period t of the reference dot recording clock signal φ1 is divided into N equal parts, and N dot recording clock signals φ1 to φ are delayed by t/N. , are prepared in advance. FIG. 3 is a diagram showing an example when N=10. As will be explained below, the temporal resolution and length resolution that can be adjusted by changing and correcting these dot recording clock signals .phi.1 to .phi.N is t/N and length resolution is d/N (in the case of standard scanning speed).

FIG. 4 is an explanatory diagram of the transfer of the dot recording clock signal. In this figure, a certain dot recording clock signal φ out of N is transferred to a phase-delayed dot recording clock signal φ6,1 adjacent to φ at the timing indicated by the arrow in the figure, and the transferred dot recording clock signal φ is transferred. φ× is obtained. In the cycle in which the transfer dot recording clock signal φ8 is transferred, the pulse time width becomes longer by t/N, and as a result, the diameter of the dot formed in this cycle becomes larger than the standard by d/N. Therefore, compared to the scan length using only the dot recording clock signal φ,
→The scanning length by the transfer dot recording clock signal φ when the transfer of φ3,1 is performed is as follows.
It becomes longer by d/N. On the contrary, φi → φ1. If the transfer is performed to the side with a more advanced phase, the scanning length becomes d.
/N becomes shorter. Furthermore, by performing transfer multiple times during scanning of one scanning line, it becomes possible to adjust the scanning length by a multiple of d/N.

Returning to FIG. 2, for example, the scan in which the dot misalignment occurred in FIG. 1! It is assumed that the recording is performed in synchronization with φ3 of the ten dot recording clock signals φ1 to φ1o provided. At this time, FIG. 2 (C
) transfer correction starts from the dot recording clock signal φ3 and changes φ3 → φ4 → φ5 → three times until the end of scanning.
The dot recording clock signal is transferred sequentially in the direction with a phase lag from φ6, a transferred dot recording clock signal φ8 is created, and scanning is performed in synchronization with this. In other words, for each cycle in which transfer is performed as indicated by the arrow in the figure, d/1
Adjustments were made to increase the scan length by 0, and at the end of the scan line (d/10)x3, which occurred when <8
Dot misalignment is completely eliminated. Furthermore, since the adjustment for dot misalignment is evenly distributed over one scanning line, there is no unnaturalness in the formed dot row.

FIG. 1 is a block diagram showing an embodiment of the present invention for performing the above-mentioned overpass correction. In the figure, a film feed roller 1 is rotationally driven by a limitsu scanning motor 2, and in response to this, a film 3 serving as a recording photosensitive material is fed in a sub-scanning direction indicated by an arrow in the figure.

The image processing circuit 4 processes the image signal obtained from the input 5A mushroom, etc., and determines the shading (black and white) of each dot in synchronization with the transfer dot recording clock signal generated internally based on the above-mentioned basic idea. A dot signal representing (including) is output to the semiconductor laser 5. The semiconductor laser 5 outputs a laser beam according to the received dot signal. The laser beam outputted from the semiconductor laser 5 with expansion is turned into a parallel beam by the remitter lens 6, corrected by the cylindrical lens 7, and irradiated onto the reflecting mirror surface of the hexahedral polygon mirror 8.

The polygon mirror 8 has a hexahedral rotating mirror that reflects and deflects the laser beam, and scans one dot row with one reflecting mirror surface. The laser beam reflected and deflected by the polygon mirror 8 is main scanned onto the film 3 via the fθ lens 9 and the cylindrical lens 10.

The f-theta lens 9 has a condensing point of the same size no matter where on the scanning line the laser beam comes to, and when the polygon mirror rotates by a certain angle, the condensed spot moves by a certain distance. In other words, this is to enable scanning on the scanning line at a constant speed. Further, like the cylindrical lens 7, the cylindrical lens 10 corrects the surface tilt of the laser beam in the sub-scanning direction, and these are mainly used to compensate for surface tilt errors during processing of the polygon mirror 8.

Immediately after the main scanning end position, a start sensor 12 consisting of a reflecting mirror 11 and a photodetector such as a photodiode is provided in order to detect passage of the laser beam prior to scanning one scanning line.

Immediately after the main scanning end position, a reflection mirror 13 is installed to detect the passage of the laser beam at the end of one scanning line.
An end sensor 14 similar to the start sensor 12 is also provided. Detection signals from these sensors 12 and 14 are provided to the image processing circuit 4.

When performing scanning, for example, as described in the second method of the conventional example, even if the start positions of each scanning line are aligned using the start sensor 12, due to the rotation error of the polygon mirror 8, the end position of each scanning line may not be the same. Dot misalignment occurs as described above with respect to FIG. 2(B). The dot shift MΔY at the end of the scanning line is expressed by the following equation.

ΔY=LXJ (1) Here, J is the scanning length and J is the rotation error (speed fluctuation rate).

For example, if main scanning is performed on the short side of A4 size paper, L=
200 am, and if J = 0.02% as the rotation error of a commercially available polygon mirror, then the dot shift at the end of the scanning line is ΔY - 200X O,0002 = 0.04 am
...(2), and if the recording resolution is 127
0 line/1 nch (diameter of 1 dot d - 20 μm), the ratio of this dot deviation amount to 1 dot is ΔY/d - 0.04/0.02 d2...(
3). If there is a deviation of two dots, the straight edges of the recorded image will become quite uneven, making it unusable for line drawings or halftone plates consisting of regular halftone dot patterns, and even for other images, it is important to avoid a significant deterioration in image quality. I can't.

Therefore, in the embodiment shown in FIG. 1, in the image processing circuit 4,
N dot recording clock signals φ1 to φ8 shown in FIG.
One of them is selected in synchronization with the detection output of the start sensor 12 (that is, the start position of each scan is aligned), and as described in detail below, this selected dot recording clock is Based on the above-mentioned basic concept, a transfer dot recording clock signal φ8 is created, which starts with the signal and transfers the number of times corresponding to the maximum dot deviation that should occur, and scanning is performed in synchronization with this signal. As a result, the starting position of each scanning line is -.
In addition, it is possible to substantially eliminate dot misalignment at the end of the scanning line at J3.

FIG. 5 is a block diagram showing an example of a circuit portion of the image processing circuit 4 for producing the above-mentioned transfer dot recording clock signal φ8. A reference dot recording clock signal is generated by a clock generator 15 such as a crystal generator, and passed through a delay circuit 16 to divide the period t of the reference dot recording clock signal into equal parts and delay it by t/N.
dot recording clock signals φ to φ are generated. These dot recording clock signals φ to φ are used to create a transfer dot recording clock signal φ8, and in this embodiment, they are also used to detect dot shift clusters on each reflective mirror surface due to rotation errors of the polygon mirror 8. is also used. As mentioned above, the time resolution of dot shift amount detection is t/N,
The length resolution is d/N (d is the dot diameter). Hereinafter, with reference to the timing diagram of FIG. 6, the detection operation of dot misalignment will be described in detail.

As shown in FIG. 6, when there is a detection output from the start sensor 2, this detection output is given to the clock input of the latch circuit 17, and the current dot recording clock signal φ1 to
The state of φ (1°1.0.0.0.0.0 in Fig. 6,
1.1.1> is latched by the latch circuit 17. The encoder 18 encodes the latch contents of the latch circuit 17, and is synchronized with the detection output of the start sensor 2 (that is, it rises immediately after the detection output of the start sensor 2 and becomes "1").
A signal representing the order number (3 of φ3 in FIG. 6) of the dot recording clock signal is output. encoder 18
The encoder 18 can be encoded, for example, by identifying the beginning of successive OITs or the "0" immediately after successive "1''s. The output of the encoder 18 is given to the first selector 19, The first selector 19 selects the corresponding dot recording clock signal (φ3 in the case of FIG. 6) and outputs it to the third counter 20.

Furthermore, the detection output of the start sensor 12 is output from the OR gate 21.
It is also applied to the clock input of the D flip-flop 22 via the D flip-flop 22, thereby causing the Q output of the D flip-flop 22 to rise to 1''. is activated and counts the selected dot recording clock signal (φ3 in FIG. 6) in response to its rising edge.

After that, when there is a detection output from the end sensor 14, this detection output is passed through the OR gate 21 to the D flip 70 knob 2.
2, and is applied to the clock input of D flip-flop 22.
The Q output of falls to 0''.

Therefore, the third counter 20 is disabled and ends counting. FIG. 6 shows an example where the count is up to 10002. This count value indicates the number of dots that can be recorded between the start sensor position and the end sensor position, but as is clear from FIG. Since it does not correspond to one cycle of the check signal, it is not valid and must be excluded as described below.

The subtracter 23 receives this count value and subtracts from this count value a reference count value that has been previously set in the latch circuit 24 through the CPU or the like. For example, suppose that the distance from the start sensor position to the end sensor position is associated with the short side 200#II of an A4 size sheet, and this is main scanned with a resolution of 1270 lines/1 nch (dot diameter - 20 μm).

In this case, the standard number of dots is 200÷0.02-10000C dots)...
(4) However, as mentioned above, the last count of the count value of the third counter 20 is not valid, so in order to exclude this by subtraction, the standard number of dots of 1000
10001, which is 0 plus 1, is set in the latch circuit 24 as a reference count value. Therefore, the subtraction result of the subtracter 23 is 10002-10001- + 1.
...(5). From this, it can be seen that the amount of dot deviation per dot is -1 dot. The symbol 4 indicates that the rotational speed of the reflecting mirror surface of the polygon mirror 8 deviates to be slower than the standard, and the scanning length of one scanning line becomes shorter than the standard (the end of one scanning line is immediately before the 10001st count). up to).

On the other hand, in order to detect a dot misalignment layer of less than one dot with a time resolution of t/N (length resolution of d/N at standard rotational speed), the following process is performed. In response to the detection output of the end sensor 14, the current state of the dot recording clock signals φ1 to φ is latched in the latch circuit 25, and encoded by the encoder 26.
The sequence number (i.e. 9) of the dot recording clock signal (φ9 in FIG. 6) synchronized with the detection output of the end sensor 14
Derive. This operation is performed by the latch circuit 17. This is similar to the case described above in which the encoder 18 derives the sequence number of the dot recording clock signal synchronized with the detection output of the start sensor 12. The subtracter 27 receives the output of the encoder 18.26 and converts the output of the encoder 26 to the encoder 18.
Subtract the output of . In the example of FIG. 6, 9-3-+6 (6) is obtained. This shows that the amount of dot deviation of less than 1 dot is (d/10)X6.

In addition, when the subtraction result of the subtracter 27 is negative, N (10 in FIG. 6) is added to the subtraction result of the angle in the next stage conversion table 28, and it is treated as a positive value. For example, in FIG. 6, if the detection output of the end sensor 14 is generated at the timing shown by the dashed line, the dot recording clock signal synchronized with this will be φ1, and the subtraction result of the subtracter 27 will be 1-3=- However, in the conversion table 28, this is set as 10-2-8, and the dot deviation amount of less than 1 dot is (
d/10)X8.

The amount of dot deviation determined as described above, that is, the subtraction result of the subtracters 23 and 27, is given to the conversion table 28, and the transfer timing and transfer phase of the dot recording clock signal necessary to correct the dot deviation are given to the conversion table 28. Converted to data representing direction. This table data is set in advance through the CPU or the like. For example, N-”10
．． An example of how to obtain table data when the number of IfI quasi-dots in one scanning line is 10,000 is as follows.

(1) The subtraction result of the subtracter 23 is +1, and the subtracter 27
When the subtraction result is +6.

Since the total dot misalignment at this time is (d/10)xl6 due to the 10.times.1-draw 16, it is sufficient to transfer the dot recording and 0 dot signals 16 times.

In order to evenly perform 16 transfers during one scan (ie, 10,000 dots), transfer must be performed every 10,000/17 dots.

Further, the subtraction result of the subtracter 23 is positive, indicating that the scanning length of one scanning line is shorter than the standard as described above, so the phase direction of the transfer is the direction of phase delay.

(2) The subtraction result of the subtracter 23 is -2, and the subtracter 27
When the result of subtraction is -3.

As mentioned above, -3 is treated as 7. 10X(-2)+
From 7----13, the total dot deviation amount at this time is (d/
10) Since xl is 3, it is sufficient to transfer every 10000/14 dots for the reason stated in (1) above. Furthermore, since the subtraction result of the subtracter 23 is negative, indicating that the scanning length of one scanning line is longer than the standard, the phase direction of the transfer is the direction of phase advance.

Part of the table data created based on the above idea is as follows. Note that INT means the integer part, and LJ and D are each phase delayed.

Indicates the leading transfer phase direction.

Subtractor 23 Subtractor 27 Data 2 8. -2 18T (10000/13),
D-29, -11NT (10000/12), D
-101NT (10000/11), D-11, -9 [
NT (10000/10), D-18,-2rN
T (10000/3), D-1'9. −
1 1NT (10000/2), Do
0 1N! (10000/1)+1.
-0 1, -9 18T (10000/2)
, LJo 2, -8 [NT(1
0000/3), tJo 9,
-1 1NT (10000/10), Ul
Q INT (10000/11
), IJl 1, -9 1NmoooO
/12), Ul 2, -8 11
4T (10000/13), IJl
9, -1 1NT (10000/20), U
2 0 IN Ding f100
00/21), U2 1, -9 1
NT (10000/22), if there is no tJ error, a value that will not cause a carry from the first counter 30, for example 18 guns (10000/1) ÷ 1・100
Load 01. Then, since the output of the second counter 31 remains O, no transfer occurs.

The data on the transfer timing and transfer phase direction obtained in this way is stored in the shift register 29 in order to apply it to the same reflecting mirror surface after one rotation of the polygon mirror 8.
is input. Shift register 29 is start sensor 1
For every 2 detection outputs, that is, 1/1 of the polygon mirror 8
The data is shifted every 6 rotations, and 1 of the polygon mirror is
After the rotation, the data is given to the first counter 30. In general, when rotating a polygon mirror, it is known that the rotation error for each surface has fairly accurate reproducibility and is regular, and there is no problem even if the error data from one rotation before is used for correction. , is a realistic control.

To make the subsequent operation easier to understand, refer to Figure 2 and set the transfer timing as INT(12/4)-3,
The following description assumes that U (delay) is obtained as the transfer phase direction. When there is a detection output from the start sensor 12 on the same reflective mirror surface of the polygon mirror 8 after one rotation for which this data has been awaited, the data of transfer timing -3 is preset from the shift register 29 to the first counter 30. At the same time, data in the transfer phase direction -( ) (delay) is preset from the shift register 29 to the second counter 31 . On the other hand, at the same time, latch circuit 1
7 and the encoder 18, the sequence number of the dot recording clock signal synchronized with the detection output of the start sensor 12 as described above is detected. Here, the explanation will proceed assuming that the dot recording clock signal synchronized with the detection output of the start sensor 12 is φ3 and that the sequence number=3 is obtained from the encoder 18.

The second counter 31 has been reset during the blanking period from the detection output of the end sensor 14 of the previous scan to the detection output of the start sensor 12 of the current scan, so the count output of the second counter 31 is initially 0. .

The D flip-flop 22 and the third counter 20 are similarly reset during the blanking period. On the other hand, the first counter 30 receives the detection output from the start sensor 2, and
Load value 3 is loaded. Therefore, immediately after the detection output of the start sensor 12, the encoder 18 is sent to the adder 32.
3 and 0 are given from the second counter 31, respectively,
The added value 3 is given to the second selector 33. Second
In response to this, the selector 33 selects φ3 from among the dot recording clock signals φ1 to φ8 and outputs it as the transferred dot recording clock signal φ8. This transfer dot recording clock signal φ8 is the first. 2nd counter 30°3
1, but the enable terminal of the second counter 31 is connected to the carry output of the first counter 30, and until there is the carry output, the second counter 3
1 is disabled, first, only the first counter 30 is unable to count.

The first counter 30 receives the transfer dot recording clock signal φ
For every 8 rising edges, the preset value 3 to 1
Count down by increments. When the count value reaches 1, the carry output of the first counter 30 rises, and the second counter 31 is activated. Then, in response to the next rising edge of the transfer dot recording clock signal φ8, the second counter 31 counts up by 1 from 0, and the count value becomes 1. Note that the up-count instruction is given by the preset data of the transfer phase direction -U (delay) described above. If the transfer phase direction is -D (advance), a down count is performed and the count value is -1
becomes. Furthermore, at the same time that the count value of the second counter 31 becomes 1, the carry output of the first counter 30 falls, so the second counter 31 is disabled again, and at the falling edge, the first counter 30 is set to the preset value. The value 3 is loaded.

When the count value of the second counter 31 becomes 1, the adder 3
The power of both people in 2 is 3 and 1, so the added output is 4
becomes. In response, the second selector 33 selects the dot recording clock signal φ4 and outputs it as the transferred dot recording clock signal φ. In this way, the adjacent dot recording clock signals 1 in the phase lag direction are transferred.

The same operation is repeated, and a transfer dot recording clock signal φ8 is created in which the transfer dot recording clock signal φ8 is transferred at equal intervals in the order of φ3→φ4→φ5→φ6 every three cycles (that is, three dots) of the transfer dot recording clock signal φ. As described above, by performing scanning in synchronization with this transfer dot recording clock signal .phi.8, the dot misalignment shown in FIG. 2(B) can be eliminated. Although the 13th dot is the dot recording clock signal φ7, there is no color tube because scanning of one scanning line is completed at the 12th dot.

FIG. 7 is a block diagram showing another embodiment of the circuit portion for generating the transfer dot recording clock signal φ8 in the image processing circuit 4. In FIG. In this embodiment, the clock generator 15 generates a clock signal φ having a frequency (period t/N) times N times that of the dot recording clock signals φ to φ8. 8. is oscillated, and the frequency is divided and delayed by the frequency division/delay circuit 34 to generate N dot recording clock signals φ to φ.

FIG. 8 is a diagram showing an example of the frequency division/delay circuit 34, in which the clock signal φ from the clock generator 15 is
is frequency-divided by RG by a frequency division counter 35 to 1/N. This 1/N divided clock signal is D
The clock signal φ is applied to the D1 input of the flip-flop 36. It is output as a dot recording clock signal φ1 in response to the rising edge of RG.

This dot recording clock signal φ1 is also applied to the D2 input of the D flip-flop 36, and is output as the dot recording clock signal φ2 in response to the next rising edge of the clock signal φORG. In this way, the clock signal φ. N dot recording clock signal signals φ1 to φ delayed by the period t/N of RG can be obtained. 9th
The figure shows this situation.

In the embodiment shown in FIG. 7, the third counter 20 receives the clock signal φORG as a clock input, and as described above in the embodiment shown in FIG. When activated, it clocks the clock signal φ. This count value is latched by the latch circuit 37 in synchronization with the detection output of the end sensor 14. Clock signal φ. Since the period of RG is t/N, the count value of the third counter 20 has a time resolution of t/N (the length resolution at the standard rotational speed of the polygon mirror 8 is a count value of d/N>. Therefore, For example, when the standard number of dots in one scanning line is 1oooo, if there is no dot shift, the count value of the third counter 20 will be 10000XN.In other words, with 100OOXN as the reference count value, this reference count value and the third counter The difference from the count value of 20 represents the dot shift level due to the length resolution of d/N.

The conversion table 28 is the third one latched by the latch circuit 37.
It receives the count value of the counter 20 and outputs data on the transfer timing and transfer phase direction necessary to cancel the dot shift m represented by this count value. The idea of creating a table gator is the same as that in the embodiment shown in FIG. 5, but an example when the number of dots in one scanning line is 10,000, N-10, is as follows.

3rd counter data 99989 1NT (10000/12), D9
9'990 1NT (10000/It), D9
9991 1NT (10000/10), D99
998 1NT (10000/3), D9999
9 1NT (10000/2), Dl 0000
0 1NT (10000/1)+1. -100001
1NT (10000/2), U100002
1NT (10000/3), U100009
1NT (10000/10), Ulooolo
1NT (10000/11), Ulooooll
1NT (10000/12), U10001
9 INT (10000/20), U1000
20 1NT (10000/21), U1000
21 1NT (10000/22), if there is no U error, the first counter 30 is set to a value that does not cause a carry, for example INT (1
Load 0000/1)+1-10001.

This data is given to the shift register 29, and thereafter the fifth
The transfer dot recording clock signal φ is created in the same manner as in the embodiment shown. Then, scanning is performed without dot shift using the transferred dot recording clock signal obtained in this manner.

By the way, in the embodiment of FIG. 5, for example, the subtracter 23.2
When the subtraction result of 7 is 16, 16 transfers on the way are 1
I did this every 0000/11 dots, but this was done for 1 dot at first.
Transfer after 0000/32 dots, then 10
The transfer may be performed every 000/16 dots. At this time, in the conversion table 28, based on the subtraction result,
The first data (10000/32) and the second data (1
0000/16) into the shift register 29. At first, the first data 1 (1
Load 000/32, start recording, and when a carry appears from the first counter 30, the second data 10000/32 is loaded.
16 is loaded into the first counter 30. Note that when the results of subtraction by the subtracters 23 and 27 are within ±1, both the first data and the second data are the same as described above. Note that the above also applies to the embodiment shown in FIG. 7 in the same way.

Examples of the above case are shown in FIGS. 10(A) and 10(B).

Based on the results of the subtracters 23 and 27, the conversion table 28 sends the U/D signal and two types of load values to the shift register 29 as explained in FIG. Immediately after the start, the timing circuit 50 outputs Q2 at the timing shown in FIG. 10 (8).

11 L II, and during this time the first counter 30 is φ
At timing 8, the first data (INT(10000/
32))). If φ8 continues, the timing circuit 50
The output Q2 becomes H'', and the output to the first counter 30 is []-
The code value is the second data (INT (10000/16))
will be sent. Then, the first counter 30 continues counting, and when the first counter 30 issues a carry, the second data is loaded into the first counter 30. From then on,
Since the output Q2 of the timing circuit 50 holds the <)-code, the second data is loaded every time a carry occurs.

In all of the above-described embodiments, the explanation is given that the next phase is replaced, but in cases where the image quality does not deteriorate, it is also possible to replace with one extra phase. Naturally, the number of transfers will be reduced accordingly.

(Effects of the Invention) As explained above, according to the present invention, the rotation error of the polygon mirror can be easily realized with a simple configuration without providing a grating or a synchronization control circuit, and without using a high-precision polygon mirror. It is possible to eliminate dot misalignment of scanning lines caused by this.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an explanatory diagram showing the basic idea of the invention, FIG. 3 is a diagram showing the relationship between one dot and a delayed dot recording clock signal, and FIG. 4
FIG. 5 is a block diagram showing an embodiment of the circuit section for generating the transferred dot recording clock signal, FIG. 6 is an explanatory diagram of dot shift m detection, and FIG. The figure is a block diagram showing another embodiment of the circuit section for generating the transfer dot recording clock signal, FIG. 8 is a block diagram showing an example of a frequency division/delay circuit, and FIG. 9 is a signal waveform diagram showing its operation. , FIG. 10 is a diagram showing another embodiment, and FIG. 11 is a diagram showing the result of dot misalignment according to the conventional method.

Claims (5)

[Claims] (1) When recording an image by scanning a recording light beam modulated in synchronization with a dot recording clock signal onto a photosensitive material using a polygon mirror, the period t of the reference dot recording clock signal is divided into N equal parts. N dot recording clock signals delayed by /N are prepared in advance, and a start sensor detects the passage of the recording light beam before scanning one scanning line, and a recording light beam after the scanning of one scanning line is completed. An end sensor is provided to detect the passage of the light beam, and the detection time interval between the two sensors for each face of the polygon mirror is t.
/N time resolution, calculate the difference between the count value and the reference count value as the number of clock transfers, the sign of the difference as the transfer phase direction, and synchronize with the detection output of the start sensor for each face of the polygon mirror. one of the N dot recording clock signals, and sequentially transfers dot recording clock signals having adjacent phases from the selected dot recording clock signal in the transfer phase direction for the number of transfers. A polygon mirror jitter correction method characterized in that image recording is performed using the obtained transfer dot recording clock signal. (2) A patent that stores the determined number of clock transfers and the transfer phase direction in a memory, and obtains a transfer dot recording clock signal based on the stored number of clock transfers and transfer phase direction when scanning the same surface after one rotation. A polygon mirror jitter correction method according to claim 1. (3) Count the first dot recording clock signal out of N selected in synchronization with the detection output of the start sensor until the detection output of the end sensor is received, and count difference between the counted value and the reference count value. At the same time, the order number difference between the second dot recording clock signal and the first dot recording clock signal out of N selected in synchronization with the detection output of the end sensor is determined, and the difference between the count difference and the order is determined. 3. A jitter correction method for a polygon mirror according to claim 1 or 2, wherein the number of clock transfers and the transfer phase direction are determined based on the number difference. (4) A clock signal with a frequency N times that of the reference dot recording clock signal is divided by 1/N while shifting the clock signal by one period.
In addition to generating dot recording clock signals of
3. The polygon mirror jitter correction method according to claim 1, wherein the number of clock transfers and the transfer phase direction are determined based on the difference between the count value and the reference count value and its sign. (5) In a device that records an image by scanning a photosensitive material with a recording light beam that is periodically modulated by a dot recording clock signal using a polygon mirror, the period t of the reference dot recording clock signal is divided into N equal parts. means for generating N dot recording clock signals delayed by /N; a start sensor for detecting passage of a recording beam prior to scanning one scanning line; and a recording beam after completing scanning of one scanning line. The end sensor detects the passing of the polygon mirror, and the detection time interval between these two sensors for each face of the polygon mirror is t/N.
means for counting with a time resolution of select one of the N dot recording clock signals;
means for creating a transferred dot recording clock signal by sequentially transferring adjacent dot recording clock signals by the number of transfers from the selected dot recording clock signal in the transfer phase direction, and using the created dot recording clock signal A polygon mirror jitter correction device characterized by recording an image.