JPS63131537U - - Google Patents
Info
- Publication number
- JPS63131537U JPS63131537U JP659988U JP659988U JPS63131537U JP S63131537 U JPS63131537 U JP S63131537U JP 659988 U JP659988 U JP 659988U JP 659988 U JP659988 U JP 659988U JP S63131537 U JPS63131537 U JP S63131537U
- Authority
- JP
- Japan
- Prior art keywords
- comparator
- circuit
- multiplier
- detection resistor
- protected circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Protection Of Static Devices (AREA)
- Emergency Protection Circuit Devices (AREA)
Description
第1図は、本考案の一実施例を示す図、第2図
は、他の実施例の要部を示す図、第3図及び第4
図は、それぞれ本考案の他の実施例を示す図で、
TR1:被保護トランジスタ、L:負荷、MS:
電磁遮断器、B1及びB2:電源、R:電流検出
抵抗、MT:乗算器、C:比較器、Br:基準電
源、TR2:スイツチングトランジスタ、INT
:積分器、T:電子タイマである。
FIG. 1 is a diagram showing one embodiment of the present invention, FIG. 2 is a diagram showing main parts of another embodiment, and FIGS.
The figures are diagrams showing other embodiments of the present invention, respectively.
TR1: Protected transistor, L: Load, MS:
Electromagnetic breaker, B1 and B2: power supply, R: current detection resistor, MT: multiplier, C: comparator, Br: reference power supply, TR2: switching transistor, INT
: Integrator, T: Electronic timer.
Claims (1)
圧降下を生ずる検出抵抗と、前記被保護回路に加
えられる電圧及び前記検出抵抗に生ずる電圧降下
の加えられる乗算器と、この乗算器出力及び基準
電圧の導入される比較器と、この比較器の出力送
出に応じて前記被保護回路の電源又は信号回路を
開放する電磁遮断器とを備えて成ることを特徴と
する過電力に応動する回路遮断装置。 A detection resistor that generates a voltage drop corresponding to the magnitude of the current flowing through the protected circuit, a multiplier that adds the voltage applied to the protected circuit and the voltage drop that occurs across the detection resistor, and the output of this multiplier and a reference voltage. A circuit breaker that responds to overpower, characterized by comprising a comparator into which the comparator is introduced, and an electromagnetic breaker that opens the power supply or signal circuit of the protected circuit in response to the output of the comparator. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP659988U JPS63131537U (en) | 1988-01-21 | 1988-01-21 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP659988U JPS63131537U (en) | 1988-01-21 | 1988-01-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63131537U true JPS63131537U (en) | 1988-08-29 |
Family
ID=30789270
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP659988U Pending JPS63131537U (en) | 1988-01-21 | 1988-01-21 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63131537U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS446264Y1 (en) * | 1966-01-12 | 1969-03-07 | ||
JPS5330149B2 (en) * | 1972-11-25 | 1978-08-25 |
-
1988
- 1988-01-21 JP JP659988U patent/JPS63131537U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS446264Y1 (en) * | 1966-01-12 | 1969-03-07 | ||
JPS5330149B2 (en) * | 1972-11-25 | 1978-08-25 |
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