JPS63129678A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPS63129678A
JPS63129678A JP61276953A JP27695386A JPS63129678A JP S63129678 A JPS63129678 A JP S63129678A JP 61276953 A JP61276953 A JP 61276953A JP 27695386 A JP27695386 A JP 27695386A JP S63129678 A JPS63129678 A JP S63129678A
Authority
JP
Japan
Prior art keywords
layer
region
quantum well
well structure
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61276953A
Other languages
Japanese (ja)
Other versions
JPH0551195B2 (en
Inventor
Kenichi Imamura
健一 今村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61276953A priority Critical patent/JPS63129678A/en
Priority to DE3789891T priority patent/DE3789891D1/en
Priority to EP87402369A priority patent/EP0268512B1/en
Priority to US07/111,018 priority patent/US5031005A/en
Publication of JPS63129678A publication Critical patent/JPS63129678A/en
Publication of JPH0551195B2 publication Critical patent/JPH0551195B2/ja
Granted legal-status Critical Current

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  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To improve light emitting efficiency, by providing a region whose refractive index is smaller than that in a well layer in a quantum well structure, at the outside of the quantum well structure, and forming a light confining layer. CONSTITUTION:On a substrate 1, a collector layer 2, a base layer 3, a quantum well structure 4, an emitter layer 5 and a semiconductor layer of an emitter contact layer 6 are provided. An emitter electrode 7, base electrodes 8 and a collector electrode 9 are formed. In the quantum well structure 4 provided between the reverse conductivity type emitter region and the base region, electrons and holes can undergo resonant tunneling at the same time. A region whose refractive index (c) is smaller than that in a well layer 4W in the quantum well structure is formed in the vicinity of an interface between the emitter region and the base region at least one quantum well structure 4. Light is guided in said region. Thus the efficiency of the light emitting function can be improved.

Description

【発明の詳細な説明】 〔概要〕 この発明は、エミッタ領域とベース領域との間に電子及
び正孔が同時に共鳴トンネリング可能な量子井戸構造を
備えて、発光機能を有する半導体装置において、 屈折率が量子井戸構造のウェル層より小さい領域を量子
井戸構造の外側に設けることにより、光閉じ込め構造を
構成して光を導波し、効率を向上するものである。
[Detailed Description of the Invention] [Summary] The present invention provides a semiconductor device having a light emitting function, which is provided with a quantum well structure between an emitter region and a base region in which electrons and holes can be simultaneously tunneled resonantly. By providing a region outside the quantum well structure in which the area is smaller than the well layer of the quantum well structure, an optical confinement structure is formed to guide light and improve efficiency.

〔産業上の利用分野〕[Industrial application field]

本発明は、本特許出願人が昭和61年10月22日に出
願した共鳴トンネル効果を利用する半導体装置の改善に
関する。
The present invention relates to an improvement in a semiconductor device utilizing resonant tunneling effect, which was filed by the applicant of the present patent on October 22, 1986.

本半導体装置は、電子デバイスと光デバイスとを同一の
素子、或いは同一の半導体層構成で実現するもので、光
・電子集積回路装置(OEIC)等への応用が期待され
ている。
This semiconductor device realizes an electronic device and an optical device using the same element or the same semiconductor layer structure, and is expected to be applied to optoelectronic integrated circuit devices (OEIC) and the like.

〔従来の技術〕[Conventional technology]

共鳴トンネル効果を利用する共鳴トンネリングバイボー
ラトランジスタ(RBT)等の半導体装置は、従来の通
常の半導体装置では得られなかった新しい機能や高速性
を備えているが、前記発明による半導体装置は例えば第
3図(a)の模式側断面図に例示する如き構造を備えて
発光機能を有する。
Semiconductor devices such as resonant tunneling bipolar transistors (RBTs) that utilize the resonant tunneling effect have new functions and high speeds that cannot be obtained with conventional ordinary semiconductor devices. It has a structure as illustrated in the schematic side sectional view of FIG. 3(a) and has a light emitting function.

同図に示す従来例は、不純物濃度が例えば6×10”c
m−’程度の1型砒化ガリウム(GaAs)基板41上
に、例えば下記の如く構成された半導体層42〜46を
備えており、47はエミッタ電極、48はベース電極、
49はコレクタ電極である。
In the conventional example shown in the figure, the impurity concentration is, for example, 6×10”c.
On a type 1 gallium arsenide (GaAs) substrate 41 of about m-' size, there are semiconductor layers 42 to 46 configured as shown below, 47 is an emitter electrode, 48 is a base electrode,
49 is a collector electrode.

半導体層   組成   不純物   厚さcm−’面 46エミフタコンタクトN    GaAs     
 n”−6x10+s      20045工ミツタ
層   GaAs    n −5X 10”    
10045aスペーサ層  GaAs   ノンドープ
   544  量子井戸構造 44Bバリア層  A1八S  ノンドープ   24
仙ウ工ル層  GaAs   ノンドープ   544
8バリア層  AlAs   ノンドープ   243
aスペ一サ層  GaAs   ノンドープ   20
43ベ一ス層   GaAs   p+−5X 10”
   20042コレクタ層  GaAs    n 
−I X 10Iff500ただしノンドープのスペー
サ層43as 45aは、p+型GaAsベース層43
にドープした不純物例えばベリリウム(Be)、n型G
aAsエミツタ層45の不純物例えばシリコン(St)
が、それぞれAlAsバリア層44Bに拡散して電子及
び正孔に不純物散乱効果を及ぼすことを防止するために
挿入しており、完成した半導体装置ではそれぞれp+型
GaAsベース層43、n型GaAsエミツタ層45と
一体化して機能する。
Semiconductor layer Composition Impurity Thickness cm-' plane 46 emitter contact N GaAs
n”-6x10+s 20045 layer GaAs n-5X 10”
10045a Spacer layer GaAs Non-doped 544 Quantum well structure 44B Barrier layer A18S Non-doped 24
Senkuru layer GaAs non-doped 544
8 barrier layer AlAs non-doped 243
a spacer layer GaAs non-doped 20
43 base layer GaAs p+-5X 10”
20042 collector layer GaAs n
-I
Doped impurities such as beryllium (Be), n-type G
The impurity of the aAs emitter layer 45, for example, silicon (St)
are inserted to prevent impurity scattering effects on electrons and holes by diffusing into the AlAs barrier layer 44B, respectively, and in the completed semiconductor device, the p + type GaAs base layer 43 and the n type GaAs emitter layer are inserted, respectively. It functions in unison with 45.

本従来例のベース入力電圧V!+が共鳴状態になる電圧
Vr□に一致したときにエネルギバンド図は第3図(b
lの様になり、電子e及び正孔りは共に共鳴トンネリン
グし、ウェルJi44Wにおける電子濃度及び正孔濃度
翔高くなり、そこで電子と正孔とが再結合して光hνが
発生する。この光はこの種の半導体装置の特性から極め
て高速の変調が可能であり、光通信等の高速化に好適で
ある。
Base input voltage V! of this conventional example! The energy band diagram is shown in Figure 3 (b
1, electrons e and holes undergo resonance tunneling together, and the electron and hole concentrations in the well Ji44W become high, where the electrons and holes recombine to generate light hv. This light can be modulated at extremely high speeds due to the characteristics of this type of semiconductor device, and is suitable for high-speed optical communications.

また印加する電圧の如何に依って、光を放出させること
なく通常のRBTとして動作させることも可能であるか
ら、上述の半導体装置は0BICの構成に甚だ好都合で
ある。
Furthermore, depending on the applied voltage, it is possible to operate the device as a normal RBT without emitting light, so the above-described semiconductor device is extremely convenient for the configuration of an 0BIC.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前記従来例の屈折率分布を図示すれば第3図(C)の様
である。本従来例の発光領域であるウェル層44−を挟
む^IAsバリア層44Bは、GaAsウェル層44−
より屈折率が小さい点では光閉じ込め層に適合するが、
その厚さが例えば2nm程度と薄いために光閉じ込め層
の機能を果たし得ない。このAlAsバリアjW44B
を光閉じ込め層の効果が得られる1100n程度以上に
することは共鳴トンネリング確率の点から不可能である
The refractive index distribution of the conventional example is shown in FIG. 3(C). The IAs barrier layer 44B sandwiching the well layer 44- which is the light emitting region of this conventional example is the GaAs well layer 44-.
It is suitable for an optical confinement layer in that it has a smaller refractive index, but
Since its thickness is as small as, for example, 2 nm, it cannot function as an optical confinement layer. This AlAs barrier jW44B
It is impossible from the point of view of resonant tunneling probability to make the value more than about 1100n, at which the effect of the optical confinement layer can be obtained.

共鳴トンネリング確率を保ちつつ本半導体装置に光閉じ
込め層を形成して発生した光を半導体基体の端面に導く
導波路を構成し、端面発光型の半導体発光素子として発
光効率を改善することが要望されている。
It is desired to form a light confinement layer in this semiconductor device while maintaining the resonant tunneling probability, and to configure a waveguide that guides the generated light to the end face of the semiconductor substrate, and to improve the luminous efficiency as an edge-emitting type semiconductor light-emitting device. ing.

〔問題点を解決するための手段〕[Means for solving problems]

前記問題点は、相互に反対導電型のエミッタ領′域とベ
ース領域との間に、電子及び正孔が同じベース電圧で同
時に共鳴トンネリングすることができる量子井戸構造を
備え、 該エミッタ領域及びベース領域の少なくとも一つの該量
子井戸構造との界面近傍に、屈折率が該量子井戸構造の
ウェル層より小さい領域が構成されてなる本発明による
半導体装置により解決される。
The problem is that a quantum well structure is provided between an emitter region and a base region of mutually opposite conductivity types, in which electrons and holes can resonantly tunnel at the same time at the same base voltage. This problem is solved by a semiconductor device according to the present invention, in which a region having a refractive index smaller than that of the well layer of the quantum well structure is formed near the interface with at least one of the regions and the quantum well structure.

〔作 用〕[For production]

本発明による半導体装置は、反対導電型のエミッタ領域
とベース領域間に電子及び正孔が同じベース電圧で同時
に共鳴トンネリングすることができる量子井戸構造を備
えて、上述の如く発光動作を行わせることができるが、
エミッタ領域及びベース領域の少な(とも一つについて
、その少なくとも量子井戸構造との界面近傍の屈折率を
発光領域である量子井戸構造のウェル層より小さくして
、光閉じ込め構造を構成する。
The semiconductor device according to the present invention includes a quantum well structure in which electrons and holes can be resonantly tunneled simultaneously at the same base voltage between an emitter region and a base region of opposite conductivity types, and performs the light emitting operation as described above. can be done, but
An optical confinement structure is constructed by making the refractive index of at least one of the emitter region and the base region in the vicinity of the interface with the quantum well structure smaller than that of the well layer of the quantum well structure which is the light emitting region.

なおこのエミッタ領域及びベース領域は、量子井戸構造
を電子と正孔が同じベース電圧で同時に共鳴トンネリン
グするために、少なくとも量子井戸構造との界面近傍に
おいて禁制帯幅が量子井戸構造の電子と正孔の共鳴準位
間の差以下である等の条件を、前記屈折率の条件ととも
に満足する必要がある。
The emitter region and the base region have a forbidden band width that is at least near the interface with the quantum well structure, so that electrons and holes in the quantum well structure can resonantly tunnel at the same time at the same base voltage. It is necessary to satisfy conditions such as the difference between the resonance levels of the refractive index being equal to or less than the above-mentioned refractive index condition.

〔実施例〕〔Example〕

以下本発明を実施例により具体的に説明する。 The present invention will be specifically explained below using examples.

第1図は本発明の第1の実施例を示し、図(a)は模式
側断面図、図(blはエネルギバンド図、図(C)は屈
折率分布図である。
FIG. 1 shows a first embodiment of the present invention, in which FIG. 1A is a schematic side sectional view, FIG. 1 is an energy band diagram, and FIG. 1C is a refractive index distribution diagram.

本実施例は、不純物濃度が例えば6 XIO”cm−’
程度の1型GaAs基板1上に、例えば下記の如き半導
体層2〜6を備えており、7はエミッタ電極、8はベー
ス電極、9はコレクタ電極である。
In this example, the impurity concentration is, for example, 6 XIO"cm-'
For example, semiconductor layers 2 to 6 as shown below are provided on a type 1 GaAs substrate 1 of about 100 mL, with 7 being an emitter electrode, 8 a base electrode, and 9 a collector electrode.

ただし、本実施例のベース層3は、GaAs基板との間
に格子不整合を生ずるIn6.5A1i、 sAs混晶
の禁制帯幅と屈折率とをInAs/AlAs歪超格子構
造により実現している。
However, in the base layer 3 of this example, the forbidden band width and refractive index of In6.5Ali and sAs mixed crystals, which cause lattice mismatch with the GaAs substrate, are realized by an InAs/AlAs strained superlattice structure. .

またエミツタ層5は、バリア層4Bとの界面から約70
nmO間でGaAsからA10. 、、Gao、 ?へ
Sまで組成比をグレーディングして、量子井戸構造との
界面近傍の禁制帯幅に勾配を与え、かつ界面の極く近傍
までウェル層より低屈折率の光閉じ込め層を形成してい
る。
Furthermore, the emitter layer 5 is approximately 70 mm from the interface with the barrier layer 4B.
GaAs to A10.nmO. ,,Gao, ? The composition ratio is graded up to S to give a gradient to the forbidden band width near the interface with the quantum well structure, and an optical confinement layer having a lower refractive index than the well layer is formed very close to the interface.

半導体層   組成    不純物  厚さく111−
30m 6 エミフケコンタクト層    GaAs     
   nj−6X 10”    200aAs (4B近傍の約5nmはノンドープで成長)4 量子井
戸構造 4Bバリア層  八IAs     ノンドープ  2
4−ウェル層  GaAs    ノンドープ  54
Bバリア層  AlAs    ノンドープ  23ヘ
一ス層 歪超格子構造 50周期 AlAs    p”−5X 10’ ”   2In
As    p+−5X 10”   2(4B近傍の
5周期はノンドープで成長)2コレクタNGaAs  
   n−lXl01?500これらの各半導体層の禁
制帯幅と屈折率とは概ね下記及び第1図(′b)、(C
1O様である。
Semiconductor layer Composition Impurity Thickness 111-
30m 6 Emifuke contact layer GaAs
nj-6X 10” 200aAs (about 5 nm near 4B is grown without doping) 4 Quantum well structure 4B barrier layer 8 IAs Non-doping 2
4-well layer GaAs non-doped 54
B barrier layer AlAs non-doped 23 hess layer strained superlattice structure 50 periods AlAs p"-5X 10'" 2In
As p+-5X 10” 2 (5 periods near 4B are grown without doping) 2 collector NGaAs
n-lXl01?500 The forbidden band width and refractive index of each of these semiconductor layers are approximately as shown below and in Figure 1 ('b) and (C
This is Mr. 1O.

半導体組成    禁制帯幅(eV)   屈折率Ga
As          1.44    3.655
Alo、 3Gao、 7^s      1.79 
   3.300AIAs          2.1
6    3.1781no、 5A1o、 sAs混
晶   1.35    3.340また第2図は本発
明の第2の実施例を示し、図ta)は模式側断面図、図
(b)はエネルギバンド図、図(C)は屈折率分布図で
ある。
Semiconductor composition Forbidden band width (eV) Refractive index Ga
As 1.44 3.655
Alo, 3Gao, 7^s 1.79
3.300AIAs 2.1
6 3.1781no, 5A1o, sAs mixed crystal 1.35 3.340 Figure 2 shows a second embodiment of the present invention, Figure ta) is a schematic side sectional view, Figure (b) is an energy band diagram, Figure (C) is a refractive index distribution diagram.

本実施例は、不純物濃度が例えば6 XIO”cm−3
程度のヤ型燐化インジウム(InP)基板21上に、例
えば下記の如き半導体層22〜26を備えており、27
はエミッタ電極、28はベース電極、29はコレクタ電
極である。
In this example, the impurity concentration is, for example, 6 XIO"cm-3
For example, the following semiconductor layers 22 to 26 are provided on a Y-shaped indium phosphide (InP) substrate 21 of approximately
is an emitter electrode, 28 is a base electrode, and 29 is a collector electrode.

半導体層    組成    不純物 厚さCIlCl
ll−3 riエミdコンタクト層   1nGaAsP    
   n−6xlQll′  20025工ミツタ層1
no、sz^1o、1aAs  n−5X101ff1
00(24B近傍の約5nmはノンドープで成長)24
  量子井戸構造 24Bバリア層   AlAs    ノンドープ  
224WウエルJi    G a A s    ノ
ンドープ  524Bバリア層   AlAs    
ノンドープ  223ベ一ス層 1no、 5zAlo
、 41AS  p+−5X 10’ ”  200(
24B近傍の約20nn+はノンドープで成長)22コ
レクタII Ir、、、5zA1o、 411AS  
n −I X 10”  500これらの各半導体層の
禁制帯幅と屈折率は第2図(bl、(C1の通りである
。なお本実施例でIno、、AI。、48Asを用いた
各層を、例えば各層の厚さが2nm程度のInAs/A
lAs超格子構造としても同様の結果が得られる。
Semiconductor layer Composition Impurity Thickness CIlCl
ll-3 ri emid contact layer 1nGaAsP
n-6xlQll' 20025 Mitsuta layer 1
no, szz^1o, 1aAs n-5X101ff1
00 (approximately 5 nm near 24B is grown without doping) 24
Quantum well structure 24B barrier layer AlAs non-doped
224W well Ji Ga As non-doped 524B barrier layer AlAs
Non-doped 223 base layer 1no, 5zAlo
, 41AS p+-5X 10'" 200 (
Approximately 20nn+ near 24B is grown without doping) 22 Collector II Ir, , 5zA1o, 411AS
n - I , for example, InAs/A with each layer having a thickness of about 2 nm.
Similar results can be obtained with the lAs superlattice structure.

これらの各実施例では各屈折率分布図に見られる如く、
発光領域であるウェル層4−324−の近傍にこれより
屈折率が小さい光閉じ込め領域が形成されており、光は
この光閉じ込め領域により半導体基体の端面方向に導波
されて、出力光の効率が光閉じ込め領域を備えない前記
従来例より大幅に向上する。
In each of these examples, as seen in each refractive index distribution diagram,
An optical confinement region with a smaller refractive index is formed near the well layer 4-324-, which is the light emitting region, and the light is guided toward the end surface of the semiconductor substrate by this optical confinement region, increasing the efficiency of output light. is significantly improved over the conventional example which does not include an optical confinement region.

なお各実施例のエミッタ領域及びベース領域は各エネル
ギバンド図に見られる如く、量子井戸構造を電子と正孔
が同じベース電圧で同時に共鳴トンネリングする条件を
満たしている。
As seen in each energy band diagram, the emitter region and the base region of each embodiment satisfy the condition that electrons and holes can simultaneously resonantly tunnel through the quantum well structure at the same base voltage.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く本発明の半導体装置は、本来の特徴で
ある、同一素子、或いは同一の半導体基体構成で発光デ
バイスと電子デバイスRBTが得られること、発光デバ
イスとして極めて高速の変調が可能であることに加えて
、ウェル層で発生した光を導波して高い効率で光出力を
得ることが可能となり、0EICなどの進展に大きい効
果が得られる。
As explained above, the semiconductor device of the present invention has the original characteristics that a light emitting device and an electronic device RBT can be obtained with the same element or the same semiconductor substrate configuration, and that extremely high speed modulation is possible as a light emitting device. In addition, it becomes possible to waveguide the light generated in the well layer and obtain optical output with high efficiency, which has a great effect on the development of 0EIC and the like.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は第1の実施例を示す図、 第2図は第2の実施例を示す図、 第3図は従来例を示す図であり、各図の図(alは模式
側断面図、 図(b)はエネルギバンド図、 図(e)は屈折率分布図である。 図において、 1.2工は半導体基板、  2.22はコレクタ層、3
.23はベース層、  4.24は量子井戸構造、4B
、24Bはバリア層、  4W、 24匈はウェル層、
5.25はエミツタ層、 6.26はエミッタコンタクト層、 7.27はエミッタ電極、8.28はベース電極、9.
29はコレクタ電極を示す。 革1の定論fヂ°1 革1図 $2図
Fig. 1 is a diagram showing the first embodiment, Fig. 2 is a diagram showing the second embodiment, and Fig. 3 is a diagram showing a conventional example. Figure (b) is an energy band diagram, and Figure (e) is a refractive index distribution diagram. In the figure, 1.2 is the semiconductor substrate, 2.22 is the collector layer, and 3 is the refractive index distribution diagram.
.. 23 is the base layer, 4.24 is the quantum well structure, 4B
, 24B is a barrier layer, 4W, 24 is a well layer,
5.25 is an emitter layer, 6.26 is an emitter contact layer, 7.27 is an emitter electrode, 8.28 is a base electrode, 9.
29 indicates a collector electrode. Leather 1 theory fヂ°1 Leather 1 figure $2 figure

Claims (1)

【特許請求の範囲】  相互に反対導電型のエミッタ領域とベース領域との間
に、電子及び正孔が同じベース電圧で同時に共鳴トンネ
リングすることができる量子井戸構造を備え、 該エミッタ領域及びベース領域の少なくとも一つの該量
子井戸構造との界面近傍に、屈折率が該量子井戸構造の
ウェル層より小さい領域が構成されてなることを特徴と
する半導体装置。
[Claims] A quantum well structure is provided between an emitter region and a base region of mutually opposite conductivity types, in which electrons and holes can be resonantly tunneled simultaneously at the same base voltage, the emitter region and the base region. A semiconductor device characterized in that a region having a refractive index smaller than that of a well layer of the quantum well structure is formed near an interface with at least one of the quantum well structures.
JP61276953A 1986-10-22 1986-11-20 Semiconductor device Granted JPS63129678A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP61276953A JPS63129678A (en) 1986-11-20 1986-11-20 Semiconductor device
DE3789891T DE3789891D1 (en) 1986-10-22 1987-10-21 Semiconductor circuit with resonant tunneling effect.
EP87402369A EP0268512B1 (en) 1986-10-22 1987-10-21 Semiconductor device utilizing the resonant-tunneling effect
US07/111,018 US5031005A (en) 1986-10-22 1987-10-21 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61276953A JPS63129678A (en) 1986-11-20 1986-11-20 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS63129678A true JPS63129678A (en) 1988-06-02
JPH0551195B2 JPH0551195B2 (en) 1993-07-30

Family

ID=17576712

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61276953A Granted JPS63129678A (en) 1986-10-22 1986-11-20 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS63129678A (en)

Also Published As

Publication number Publication date
JPH0551195B2 (en) 1993-07-30

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