JPS63128694A - Printed wiring board - Google Patents
Printed wiring boardInfo
- Publication number
- JPS63128694A JPS63128694A JP27615086A JP27615086A JPS63128694A JP S63128694 A JPS63128694 A JP S63128694A JP 27615086 A JP27615086 A JP 27615086A JP 27615086 A JP27615086 A JP 27615086A JP S63128694 A JPS63128694 A JP S63128694A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- component
- mounting
- terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 244000144985 peep Species 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔概要〕
端子間ピッチの小さい多ピン化された大規模集積回路等
の部品をプリント配線基板へ実装する該部品の端子取付
穴を、前記プリント配線基板を貫通しないように形成し
て、電子部品の高密度実装を可能にする。[Detailed Description of the Invention] [Summary] A component such as a large-scale integrated circuit with a large number of pins and a small pitch between terminals is mounted on a printed wiring board so that the terminal mounting hole of the component does not penetrate through the printed wiring board. This enables high-density mounting of electronic components.
本発明は、端子間ピンチの小さい多ビン化された部品を
プリント配線基板間する。The present invention connects multi-bin components with small pinch between terminals between printed wiring boards.
近年、各種電子装置を構成するプリント配線基板へ実装
する電子部品は、信号の高速化に対応するため小型、高
集積化され、かつ端子間ピンチの小さい多ピン化された
部品が出現し、これらの部品を高密度実装するプリント
配線基板の開発が強く要望されている。In recent years, electronic components mounted on printed wiring boards that make up various electronic devices have become smaller, more highly integrated, and have more pins with less pinch between terminals to accommodate faster signal speeds. There is a strong demand for the development of printed wiring boards that allow high-density mounting of components.
第3図および第4図は、従来のプリント配線基板を説明
する図で、第3図はスルーホールへ部品を実装する要部
断面斜視図、v4図は導体パターンへ表面実装する要部
斜視図である。Figures 3 and 4 are diagrams explaining a conventional printed wiring board. Figure 3 is a cross-sectional perspective view of the main part for mounting components to the through hole, and Figure v4 is a perspective view of the main part for surface mounting to the conductor pattern. It is.
第3図は、複数のリード端子43を有する部品41をプ
リント配線基板40へ実装する方法は、該プリント配線
基板40に前記リード端子43に対応する複数のスルー
ホール4゛2を形成し、該スルーホール42に前記部品
41のリード端子43を挿入して、半田44(半田ディ
ツプ等による)で接着固定する。FIG. 3 shows a method for mounting a component 41 having a plurality of lead terminals 43 on a printed wiring board 40, in which a plurality of through holes 4'2 corresponding to the lead terminals 43 are formed in the printed wiring board 40. The lead terminal 43 of the component 41 is inserted into the through hole 42 and fixed with solder 44 (by solder dip or the like).
第4図は、複数の表面実装用端子48を有する表面実装
用部品47をプリント配線基板40へ実装する方法は、
該プリント配線基板40に前記表面実装用端子48に対
応するバイヤホール46を有する導体パターン45を形
成し、該導体パターン45に前記表面実装用部品47の
表面実装用端子48を載置して半田44(半田リフロー
等による)で接着固定する。FIG. 4 shows a method for mounting a surface mount component 47 having a plurality of surface mount terminals 48 on a printed wiring board 40.
A conductor pattern 45 having via holes 46 corresponding to the surface mount terminals 48 is formed on the printed wiring board 40, and the surface mount terminals 48 of the surface mount component 47 are placed on the conductor pattern 45 and soldered. 44 (by solder reflow, etc.).
上記従来のプリント配線基板にあっては、リード端子を
有する部品の実装はリード端子径以上のスルーホールを
要し、表面実装用部品を実装する導体パターンは信頼性
上表面実装用端子より小さく出来ないため、何れの場合
も高密度実装を阻害するという問題点があった。In the above-mentioned conventional printed wiring board, mounting components with lead terminals requires a through hole larger than the lead terminal diameter, and the conductor pattern for mounting surface mount components can be made smaller than the surface mount terminals for reliability reasons. In either case, there was a problem in that high-density packaging was hindered.
本発明は、上記の問題点を解決して高密度実装を可能に
したプリント配線基板を提供するものである。The present invention provides a printed wiring board that solves the above problems and enables high-density packaging.
すなわち、プリント配線基板を、このプリント配線基板
に実装する部品の部品端子の取付穴を、前記プリント配
線基板を貫通しないようにしたことによって解決される
。That is, the problem is solved by making the printed wiring board so that the mounting holes for the component terminals of the components mounted on the printed wiring board do not penetrate through the printed wiring board.
〔作用〕
上記プリント配線基板は、貫通しない取付孔を用いて実
装するので、プリント配線基板の内層すべてに貫通孔(
スルーホール)を設けることなく部品の接続が行なえる
ので、高密度にスルーホールを設けることができ、部品
の高密度実装が可能となる。[Function] The above printed wiring board is mounted using non-penetrating mounting holes, so all inner layers of the printed wiring board are provided with through holes (
Since components can be connected without providing through-holes, through-holes can be provided at a high density, and components can be mounted at a high density.
第1図および第2図は、本発明の一実施例を説明する図
で、第F図は要部断面を示す原理図、第2図は要部断面
斜視図である。FIGS. 1 and 2 are diagrams for explaining an embodiment of the present invention, in which FIG. F is a principle diagram showing a cross section of a main part, and FIG. 2 is a perspective cross-sectional view of a main part.
第1図は、多層(図面では2層)のプリント配線基板4
の導体パターン5から内層導体パターン5′に達し、プ
リント配線基板4を貫通しない取付穴3を形成し、該取
付穴3に部品1の部品端子2を挿入して半田6 (半田
リフロー等による)で接着固定する。Figure 1 shows a multilayer (two layers in the drawing) printed wiring board 4.
A mounting hole 3 is formed that extends from the conductor pattern 5 to the inner layer conductor pattern 5' and does not penetrate the printed wiring board 4. The component terminal 2 of the component 1 is inserted into the mounting hole 3 and soldered 6 (by solder reflow, etc.). Secure with adhesive.
第2図は、端子間ピッチが1.27a+mの複数の部品
端子2を有する大規模集積回路等の部品lを、多層のプ
リント配線基板4に実装する方法は、該プリント配線基
板4に前記部品lの部品端子2に対応する第1図で説明
した貫通しない取付穴3を形成し、該取付穴3に部品1
の部品端子2を挿入して半田6 (半田リフロー等によ
る)で接着固定するので、配線効率が向上する。FIG. 2 shows a method for mounting a component l such as a large-scale integrated circuit having a plurality of component terminals 2 with a terminal pitch of 1.27a+m on a multilayer printed wiring board 4. The non-penetrating mounting hole 3 explained in FIG. 1 corresponding to the component terminal 2 of 1 is formed, and the component 1
Since the component terminals 2 are inserted and fixed with solder 6 (by solder reflow, etc.), wiring efficiency is improved.
なお、本実施例では実装部品を端子間ピッチが1 、2
7a+mの大規模集積回路について説明したが、大規模
集積回路に限らず比較的端子間ピッチの小さい他の実装
部品にも通用が可能である。In addition, in this example, the pitch between the terminals of the mounted components is 1 or 2.
Although a 7a+m large-scale integrated circuit has been described, the present invention is applicable not only to large-scale integrated circuits but also to other mounted components having a relatively small pitch between terminals.
以上の説明から明らかなように、本発明によれば部品の
高密度実装が可能となり、装置の小形化。As is clear from the above description, according to the present invention, parts can be mounted in high density, and the device can be downsized.
信号の高速化に寄与し、特性の向上に極めて有効である
。It contributes to increasing signal speed and is extremely effective in improving characteristics.
第1図および第2図は、本発明の一実施例を説明する図
で、第1図は要部断面を示す原理図、第2図は要部断面
斜視図、
第3図および第4図は、従来のプリント配線基板を説明
する図で、第3図はスルーホールへ部品を実装する要部
断面斜視図、第4図は導体パターンへ表面実装する要部
斜視図である。
図において、l、41は部品、2は部品端子、3は取付
穴、4.40はプリント配線基板、5.45は導体パタ
ーン、5′は内層導体パターン、6.44は半田、42
はスルーホール、43はリード端子、46はバイヤホー
ル、47は表面実装用部品、48は表面14Ptfrr
¥t*:jlN理の
第1図
ズルー氷−ルへ部品(づ1哀t3 #tP11fllシ
瓜ゴ第3図
+l’Ftyy−>覗l’l−i t* tuffMm
第4図1 and 2 are diagrams explaining one embodiment of the present invention, in which FIG. 1 is a principle diagram showing a cross section of the main part, FIG. 2 is a perspective cross-sectional view of the main part, and FIGS. 3 and 4. FIG. 3 is a cross-sectional perspective view of a main part in which components are mounted on a through hole, and FIG. 4 is a perspective view of a main part in surface mounting of a conductor pattern. In the figure, l, 41 are parts, 2 is a component terminal, 3 is a mounting hole, 4.40 is a printed wiring board, 5.45 is a conductor pattern, 5' is an inner layer conductor pattern, 6.44 is solder, 42
is a through hole, 43 is a lead terminal, 46 is a via hole, 47 is a surface mounting component, 48 is a surface 14Ptfrr
¥t*: jlN theory's 1st figure Zulu ice - parts (zu1 sad t3 #tP11fll 3rd figure +l'Ftyy-> peep l'l-i t* tuffMm
Figure 4
Claims (1)
を貫通しないようにしたことを特徴とするプリント配線
基板。Mounting hole (3) for component terminal (2) of component to be mounted (1)
A printed wiring board characterized in that it does not penetrate through the board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27615086A JPS63128694A (en) | 1986-11-18 | 1986-11-18 | Printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27615086A JPS63128694A (en) | 1986-11-18 | 1986-11-18 | Printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63128694A true JPS63128694A (en) | 1988-06-01 |
Family
ID=17565454
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP27615086A Pending JPS63128694A (en) | 1986-11-18 | 1986-11-18 | Printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63128694A (en) |
-
1986
- 1986-11-18 JP JP27615086A patent/JPS63128694A/en active Pending
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