JPS63119395A - Signal processing circuit - Google Patents

Abstract

PURPOSE:To attain the control of the moving adaptive type circuit without error and to save the capacity of a memory by inputting a representative value of a movement of plural picture elements as a new movement to a moving quantity processing circuit. CONSTITUTION:The video signal digitized by a clock frequency f0 is led to a frame memory 4 and the input signal of the frame memory 4 and the output signal are given to a movement detection circuit 5, where they are converted into movement quantity and the obtained movement quantity is a signal of 1/f0 period. A pre-value hold circuit 15 of a representive value calculation circuit 14 divides the movement quantity into a signal at each m-clock and decrease the frequency of the movement quantity into f0/m by representing the movement quantity of a period by a 1st moving quantity of the period thereby saving the capacity of a field memory 7 and a line memory 8 to correct the movement quantity. A movement quantity processing circuit 6 generates a signal to control the movement adaptive type from the movement quantity obtained in this way and the movement quantity delayed by the field memory 7 and the line memory 8.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to signal processing of television signals, and particularly to a signal processing circuit suitable for creating a signal for controlling a motion adaptive circuit.

[Conventional technology]

When applying signal processing to television signals to improve image quality, for example, for interlaced signals, methods such as converting this into a sequential scanning signal and displaying it to prevent screen flickering are adopted. ing. The above method, ie, converting an interlaced signal into a progressively scanned signal, requires a scan line interpolation circuit.

The scanning line interpolation circuit performs inter-field interpolation when the image is a still image to obtain a flicker-free image with good resolution, and when the image is a moving image, it performs intra-field interpolation. There is a method of obtaining an image without interference such as double images.

In other words, the interfield interpolation circuit is suitable for still images.

The open field circuit is suitable for videos. If you mistakenly use an intra-field interpolation circuit for still images, flickering may occur or the resolution may deteriorate. On the other hand, if you use an inter-field interpolation circuit for moving images, double images may occur. Causes deterioration.

Therefore, motion adaptive processing has been considered, which uses the interframe difference signal to determine whether the image is moving or stationary, and uses an intra-field interpolation circuit for moving images and an inter-field interpolation circuit for still images. There is.

For example, in Japanese Unexamined Patent Publication No. 58-205377, the motion of an image is detected based on an interframe difference signal, and the characteristics of an interpolation filter as an interpolation circuit are changed based on the amount of motion. However, since the motion of the image is determined based on the inter-frame difference signal, accurate motion detection cannot be performed for fast motion. Therefore, the detected amount of motion is subjected to LPF (low pass filter) processing to prevent errors in motion detection. For example, when an object moves as shown in Figure 2 (,), the amount of movement between A and A' detected by the interframe difference signal is the (M
+1) field and the (M -1)th field, as shown in Figure 2 (b), but in this case, there is a range where the amount of motion is zero, resulting in false detection, so for correction The processing is performed to obtain the corrected motion amount as shown in FIG. 4(c), thereby preventing erroneous interpolation.

[Problem that the invention seeks to solve]

With the method of correcting the amount of movement as in the example above, similar patterns of movement may occur depending on the image, and because video processing is performed on still images, resolution may decrease or flicker may occur. There was sex.

For example, if the two frames W1゜W, as shown in Fig. 3(,), move slowly, the amount of movement detected will be the same as that in Fig. 2(b), and therefore the amount of movement after correction will also be the second. Since the result is similar to that shown in Figure (Q), moving image processing will be performed on the signal S between the frames even though it is a still image.

Furthermore, the speed of movement at which detection errors can be prevented is preset by circuit constants. Therefore, no effect is produced for movements exceeding this speed.

Therefore, by delaying the currently obtained motion amount using field memory, the current motion amount and the motion amount one field before are used to control video processing and still image processing to prevent motion detection mistakes. was considered and published in Japanese Patent Publication No. 60-25
It has already been filed as No. 0912. An example of this is shown in FIG. 4(,).

4(a), 1 is an input terminal for a digitized video signal, 2 is an output terminal for a control signal for controlling a motion adaptive circuit, and 3 is an output terminal for a signal from the motion adaptive circuit. , 4 is a frame memory for delaying the digitized video signal by one frame, 5 is a motion detection circuit for detecting image motion from the input signal and output signal of frame memory 4, and 6 is a motion detection circuit for correcting the amount of motion. Quantity processing circuit.

7 and 8 are a field memory with a capacity of about 1 field and a line memory with a capacity of about 1 line used in the motion amount processing circuit 6; 9 is a system clock generator.

10 is a signal processing circuit for processing a video signal as a still image; 11 is a signal processing circuit for processing a moving image; 12 is a still image processing circuit 1
0. This is a mixer that mixes the output signal from the moving image processing circuit 11 according to the control signal from the motion amount processing circuit 6.

An example of the motion detection circuit 5 is shown in FIG. 4(b).

In FIG. 4(b), 20 is an output terminal for the amount of motion obtained by the motion detection circuit 5, and 21 is a subtracter for calculating the difference between the input signal and output signal of the frame memo IJ 3.

22 is a low-pass filter, 23 is an absolute value circuit, and the other parts are the same as in FIG. 4(a). The motion detection circuit, ie, the circuit shown in FIG. 4(b), is of a type that detects motion based on frame differences. The motion detection circuit is not limited to the above-mentioned example; for example, as shown in FIG. 4(c), there is a method using yet another frame memory 24 and based on the difference between two frames.

From the motion amount determined by the above method and the motion amount delayed by the field memory 7 and line memory 8, the motion amount processing circuit 6 creates a signal for controlling the motion adaptive circuit. A specific example of the motion amount processing circuit 6 is shown in FIG.
) and (b). In FIGS. 5(a) and 5(b), 25 is an input terminal for the amount of motion from the motion detection circuit 5;
26 is an attenuator that doubles the input signal, 27 is a maximum value circuit, and the other parts are the same as in FIG. If the motion amount processing circuit 6 having the above configuration is used, it is possible to refer to the motion amount of the scanning line about one field before and the motion amount of the current scanning line at the same time as the motion amount, so that correct control of the motion adaptive circuit is possible. Become. However, since a memory with a capacity of about 1 field is required, the circuit scale increases.

An object of the present invention is to provide a signal processing circuit that correctly controls a motion adaptive circuit and has a small memory capacity.

[Means for solving problems]

The above object includes a representative value calculation circuit that calculates a representative value of the amount of motion by inputting the amount of motion of multiple picture elements detected by a motion detection circuit, and uses this representative value as a new amount of motion to a motion amount processing circuit. This is achieved by inputting this representative value for one field in the motion amount processing circuit.

[Operation] For example, if the system operates at a frequency four times that of the color subcarrier fsc, the amount of motion obtained by inputting the interframe difference signal to the motion detection circuit 5 is equal to 1/4 fsc period. It becomes a signal. However, the motion of the image is determined by using the representative value of the amount of motion at a certain point, excluding the outline of the image.
There is no problem even if a motion adaptive circuit operating at a frequency such as sc is controlled. However, if the sample points of the amount of motion are simply reduced, an incorrect amount of motion may be generated due to the influence of noise and the like.

Therefore, by reducing the sampling points of the motion amount after filtering the motion amount in the representative value calculation circuit, it is possible to prevent the occurrence of an erroneous motion amount. Furthermore, by changing the sampling points of the amount of motion for each line, it is possible to eliminate bias in the sampling points of the amount of motion and reduce the influence of reducing the number of sampling points.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. 1(a). In FIG. 1(a), 14 is a representative value calculation circuit, 15
is a previous value hold circuit for holding the value of a certain sampling point for m clocks; the other parts are the same as in FIG.

A video signal digitized at a clock frequency of f (usually sampled at a clock frequency of 4fsc or 3fsc, where fsc is the color subcarrier frequency) is input from an input terminal 1 and guided to a frame memory 4. The input signal and output signal of the frame memory 4 are input to a motion detection circuit 5 and converted into a motion amount. All operations up to this point are based on the clock frequency of fo, and the determined amount of movement becomes a one-cycle signal as shown in FIG. 1(b).

Here, the previous value hold circuit 15 divides the amount of movement into signals every m clocks, and the amount of movement in that section is represented by the first amount of movement in the section, thereby changing the frequency of the amount of movement □
The capacity of the field memory 7 and line memory 8 for correcting the amount of motion can be reduced. Figure 1 (0) is m
The control signal in the case of =2 is shown.

FIG. 6 shows another embodiment of the present invention. In FIG. 6, numeral 16 is a circuit for calculating the maximum value of n consecutive sample points of the amount of motion in one period obtained from the motion detection circuit 5, and the other components are the same as in FIG.

According to this embodiment, the capacities of the field memory 7 and the line memory 8 can be reduced because the signals are thinned out to - by the hold circuit 15. Furthermore, since the thinned data is the maximum value of n points around it, it is possible to prevent an incorrect value from being caused by noise or the like. A detailed explanation of this embodiment will be given using FIG. 7.

FIG. 7 shows n=3. An example in the case of m=2 is shown. FIG. 7(a) shows the output of the motion detection circuit 5, which is a signal with a period of -. Since n=3 in the maximum value circuit 16, the maximum value of a certain sample point and three pixel points on the left and right thereof is outputted, and therefore the value shown in FIG. 7(b) is obtained in one cycle. In the hold circuit 15, since m=2, the maximum value circuit 1
6 is obtained, and the signal is a representative value of three surrounding points, reducing the capacity of the field memory 7 and line memory 8, and obtaining error-free control signals for the motion adaptive circuit.

FIG. 8 shows still another embodiment of the present invention. In FIG. 8, numeral 17 is a filter circuit that calculates n consecutive samples of the output of the motion detection circuit 5, and the rest is the same as the embodiment shown in FIG. 6. The maximum value circuit 15 is replaced with a filter circuit 17.

The filter circuit 17 may be an average value circuit, for example,
The amount of motion represents n consecutive sample points. By sampling this every m in the hold circuit 15, the capacity of the field memory 7 and line memory 8 can be reduced to -
This has the effect that a control signal suitable for a motion adaptive circuit can be stored as a representative value.

FIG. 9 shows still another embodiment of the present invention.

In FIG. 9, 18 is an input terminal for a horizontal synchronizing signal.

19 is a switch for switching the phase of the clock frequency for controlling the hold circuit 15 and the like for each line;

The switch circuit and others are the same as the embodiment shown in FIG.

In this embodiment, the phase of the signal for controlling the hold circuit 15 (m=2 in FIG. 9) for thinning out the output from the filter circuit 17 every m is inverted for each line. For example, considering the case where m = 2, two types of clocks with different phases of 180° are prepared as shown in FIG. 10(a), and the output signal of the filter circuit 17 shown in FIG. 10(b) is connected to the line. By holding at different rising edges of the clock each time, the amount of movement at a position offset for each line can be stored in the memory as shown in FIG. 10(C). According to this method, the amount of motion that has been thinned out (
Since the positions shown in FIG. 10(C) are not aligned in the vertical direction of the screen, there is an effect that the influence of thinning out the amount of movement can be reduced.

〔Effect of the invention〕

According to the present invention, the motion adaptive circuit can be controlled without error, and the memory capacity used for the motion amount processing circuit can be reduced, which is economical.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram of an embodiment of the present invention and its operation, Figs. 2 and 3 are explanatory diagrams showing the amount of motion detected by the inter-frame difference signal, respectively, and Fig. 4 is a motion detection circuit and the amount of motion. An explanatory diagram of the processing circuit, Fig. 5 is an explanatory diagram of the motion amount processing circuit, and Fig. 6 is an explanatory diagram of the motion amount processing circuit.
The figure is a block diagram showing another embodiment of the present invention, and FIG. 7 is an explanatory diagram of its operation. FIG. 8 is a block diagram showing another embodiment of the present invention. FIG. 9 is a block diagram showing still another embodiment of the present invention, and FIG. 10 is an explanatory diagram of its operation. 1... Video signal input terminal, 4... Frame memory, 5... Motion detection circuit, 6... Motion amount processing circuit,
7...Field memory, 8...Line memory, 9
... Clock generation circuit, 10... Still image processing circuit, 11... Video processing circuit, 12... Mixer, 14.
...Representative value calculation circuit, 15...Previous value hold circuit, 1
6... Maximum value circuit, 17... Filter circuit, 19.
...Switch circuit. 21... Subtractor, 22... Low pass filter, 2
3... Absolute value circuit, 26... Attenuator. Figure j (α) ■■■■■■... ■■■■■■... ○II) CI) CD... Figure 2 (α) Haruma (b) (C) Figure 3 ( α) (b) (C) Fig. 4 (α) Fig. 4 (b) (C) Fig. 5) Tori control I (b) Control signal Fig. 6 Diagram 8 q Fig. 10 Diagram (α) 8L line ■ ■ ■ ■ ■ ■ ■ (
e)

Claims (1)

[Claims] 1. A frame memory into which a digitized television signal is input pixel by pixel and output after being delayed by one frame period, and a television signal before being input to the frame memory and from the frame memory. a motion detection circuit that receives an output television signal delayed by one frame period and detects the amount of motion of an image from both; and a motion detection circuit that receives the amount of motion output from the motion detection circuit;
a signal processing circuit comprising: a motion amount processing circuit that generates and outputs a motion control signal for motion adaptive circuit control by processing the motion amount using a motion memory that can perform a signal delay of approximately one field; In this step, before inputting the motion amount output from the motion detection circuit to the motion amount processing circuit, a representative value is calculated to represent a plurality of signals representing the motion amount from the motion detection circuit. A signal processing circuit comprising a calculation circuit and inputting the representative value to the motion amount processing circuit, thereby making it possible to reduce the memory capacity of the motion memory. 2. The signal processing circuit according to claim 1, wherein the representative value calculation circuit comprises a previous value holding circuit for holding the amount of motion detected by the motion detection circuit for a certain period of time. signal processing circuit. 3. In the signal processing circuit according to claim 1, the representative value calculation circuit includes a circuit for calculating a maximum value among n consecutive amounts of motion detected by the motion detection circuit, and retaining the maximum value. A signal processing circuit comprising a previous value hold circuit. 4. In the signal processing circuit according to claim 1, the representative value calculation circuit includes a filter circuit that takes an average of n consecutive amounts of motion detected by the motion detection circuit, and a previous value hold that holds the average. A signal processing circuit characterized by comprising a circuit. 5. In the signal processing circuit according to any one of claims 2 to 4, a switch circuit is provided for switching a signal for controlling the previous value hold circuit for each line; A signal processing circuit characterized in that the position at which signals are thinned out in a hold circuit is offset for each line.