JPS63118648U - - Google Patents
Info
- Publication number
- JPS63118648U JPS63118648U JP951587U JP951587U JPS63118648U JP S63118648 U JPS63118648 U JP S63118648U JP 951587 U JP951587 U JP 951587U JP 951587 U JP951587 U JP 951587U JP S63118648 U JPS63118648 U JP S63118648U
- Authority
- JP
- Japan
- Prior art keywords
- output
- flip
- flop
- gate
- ready
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Debugging And Monitoring (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP951587U JPS63118648U (fr) | 1987-01-26 | 1987-01-26 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP951587U JPS63118648U (fr) | 1987-01-26 | 1987-01-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63118648U true JPS63118648U (fr) | 1988-08-01 |
Family
ID=30794899
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP951587U Pending JPS63118648U (fr) | 1987-01-26 | 1987-01-26 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63118648U (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0282323A (ja) * | 1988-09-20 | 1990-03-22 | Fujitsu Ltd | ディジタルシグナルプロセッサのデバッグ方式 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56108155A (en) * | 1980-01-31 | 1981-08-27 | Omron Tateisi Electronics Co | Protecting device for microprocessor |
-
1987
- 1987-01-26 JP JP951587U patent/JPS63118648U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56108155A (en) * | 1980-01-31 | 1981-08-27 | Omron Tateisi Electronics Co | Protecting device for microprocessor |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0282323A (ja) * | 1988-09-20 | 1990-03-22 | Fujitsu Ltd | ディジタルシグナルプロセッサのデバッグ方式 |