JPS63118248U - - Google Patents

Info

Publication number
JPS63118248U
JPS63118248U JP754387U JP754387U JPS63118248U JP S63118248 U JPS63118248 U JP S63118248U JP 754387 U JP754387 U JP 754387U JP 754387 U JP754387 U JP 754387U JP S63118248 U JPS63118248 U JP S63118248U
Authority
JP
Japan
Prior art keywords
hybrid
built
operational amplifier
input terminal
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP754387U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP754387U priority Critical patent/JPS63118248U/ja
Publication of JPS63118248U publication Critical patent/JPS63118248U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)
JP754387U 1987-01-23 1987-01-23 Pending JPS63118248U (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP754387U JPS63118248U (en:Method) 1987-01-23 1987-01-23

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP754387U JPS63118248U (en:Method) 1987-01-23 1987-01-23

Publications (1)

Publication Number Publication Date
JPS63118248U true JPS63118248U (en:Method) 1988-07-30

Family

ID=30791095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP754387U Pending JPS63118248U (en:Method) 1987-01-23 1987-01-23

Country Status (1)

Country Link
JP (1) JPS63118248U (en:Method)

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